Combine the situation, I prefer the case by case handling to simplify the patch
series purpose for the smbase pre-relocation support.
Thanks,
Jiaxin
> -Original Message-
> From: Ni, Ray
> Sent: Friday, February 10, 2023 9:13 PM
> To: Gerd Hoffmann
> Cc: Wu, Jiaxin ; devel@edk2.group
Gerd,
Firstly, chunk idea allows to split the >64K hob to multiple one without using
domain knowledge, that means the split can happen in byte level. It will hurt
debuggability a lot: When I exam the HOB list during debugging, it's hard to
combine/group the chunk hobs with the same GUID into >64K b
On Fri, Feb 10, 2023 at 11:56:01AM +, Ni, Ray wrote:
> Gerd,
> That requires changing PI spec
Yes, but we have
https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Code-First-Process
> and all HOB consuming logic.
There is no need to change the existing logic. Code to handle
chunke
Gerd,
That requires changing PI spec and all HOB consuming logic.
But if you have a simple idea, please advise.
Thanks,
Ray
> -Original Message-
> From: Gerd Hoffmann
> Sent: Friday, February 10, 2023 7:24 PM
> To: Wu, Jiaxin
> Cc: devel@edk2.groups.io; Dong, Eric ; Ni, Ray
> ; Zeng, St
Hi,
> +#pragma pack(1)
> +typedef struct {
> + ///
> + /// CpuIndex tells which CPU range this specific HOB instance described.
> + /// If CpuIndex is set to 0, it indicats the HOB describes the CPU from 0
> to
> + /// NumberOfCpus - 1. The HOB list may contains multiple this HOB
> instanc
Hi Ray and Jiaxin,
Quick reminder that [1] invokes undefined behaviour and [0] is not legal C, but
a compiler extension. The canonical way is a flexible array member using [].
Off-topic and nitpicking, but I started wondering why so many structures are
packed. For UEFI, packing would only help
Hi Ray,
Both is fine to me, one thought is that we must have one CPU, so change to 1
and I also checked some existing usage cases like the
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK.Descriptor, WIN_CERTIFICATE_UEFI_GUID. CertData,
it also the same way.
Thanks,
Jiaxin
> -Original Message-
> From
Jiaxin,
> + ///
> + /// Pointer to SmBase address for each Processors.
> + ///
> + UINT64SmBase[1];
Why SmBase[1] instead of SmBase[0]?
I think using SmBase[0] can better help C code to calculate the HOB size.
Simply sizeof (SMM_BASE_HOB_DATA) * sizeof (UINT64) * CpuCount,
instead of sizeo
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
The default SMBASE for the x86 processor is 0x3. When
SMI happens, CPU runs the SMI handler at SMBASE+0x8000.
Also, the SMM save state area is within SMBASE+0x1.
One of the SMM initialization from CPU perspective is to relocate
and
