Ok, I will change to SmBase[] instead of SmBase[1].
> -Original Message-
> From: Ni, Ray
> Sent: Monday, February 13, 2023 5:35 PM
> To: Wu, Jiaxin ; devel@edk2.groups.io
> Cc: Dong, Eric ; Zeng, Star ;
> Laszlo Ersek ; Gerd Hoffmann ;
> Kumar, Rahul R
> Subject: RE: [PATCH v6 3/6] Uef
> + UINT64SmBase[1];
Can you please use "SmBase[]" as what Marvin pointed out?
Thanks,
Ray
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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
The default SMBASE for the x86 processor is 0x3. When
SMI happens, CPU runs the SMI handler at SMBASE+0x8000.
Also, the SMM save state area is within SMBASE+0x1.
One of the SMM initialization from CPU perspective is to relocate
and