>
> So you essentially are hoping this will never ever change and hard-code
> the 8k in both PEI module and PiSmmCpuDxeSmm. I'd suggest to add a
Yes, 8k is bigger than the real usage case.
> field to the HOB struct instead. If you want stick to the hardcoded 8k
> please add a note saying so to
Hi,
> In PEI module, it also has such assumption, so we don't pass in the
> HOB for the resolved smbase mem size, because we have avoided the
> possibility of error in the reference pi smm cpu driver.
So you essentially are hoping this will never ever change and hard-code
the 8k in both PEI mod
Hi Gerd,
>
> Ok, so TileSize is what the firmware needs to store code and state.
> Where does the SIZE_8KB come from? I assume this is the amount of
> per-cpu memory allocated by the PEI module? Shouldn't this be passed
> in the HOB instead of being hard-coded?
>
Yes, TileSize is for firmwar
Hi,
> + if (GuidHob != NULL) {
> +//
> +// Check whether the Required TileSize is enough.
> +//
> +if (TileSize > SIZE_8KB) {
> + DEBUG ((DEBUG_ERROR, "The Range of Smbase in SMRAM is not enough --
> Required TileSize = 0x%08x, Actual TileSize = 0x%08x\n", TileSize, SIZE_8
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
Existing SMBASE Relocation is in the PiSmmCpuDxeSmm driver, which
will relocate the SMBASE of each processor by setting the SMBASE
field in the saved state map (at offset 7EF8h) to a new value.
The RSM instruction reloads the internal SMBASE
