BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Add RISC-V architecture on RISC-V EDK2 CI.
Signed-off-by: Abner Chang <abner.ch...@hpe.com>
Cc: Bret Barkelew <bret.barke...@microsoft.com>
Cc: Sean Brogan <sean.bro...@microsoft.com>
Cc: Leif Lindholm <l...@nuviainc.com>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Gilbert Chen <gilbert.c...@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schae...@hpe.com>
---
.azurepipelines/Ubuntu-GCC5.yml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/.azurepipelines/Ubuntu-GCC5.yml b/.azurepipelines/Ubuntu-GCC5.yml
index a26a3a2cb2..7cd67c98da 100644
--- a/.azurepipelines/Ubuntu-GCC5.yml
+++ b/.azurepipelines/Ubuntu-GCC5.yml
@@ -2,6 +2,7 @@
# Azure Pipeline build file for a build using ubuntu and GCC5
#
# Copyright (c) Microsoft Corporation.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
trigger:
@@ -14,5 +15,5 @@ jobs:
parameters:
tool_chain_tag: 'GCC5'
vm_image: 'ubuntu-latest'
- arch_list: "IA32,X64,ARM,AARCH64"
+ arch_list: "IA32,X64,ARM,AARCH64,RISCV64"
--
2.25.0
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