Cc: Abner Chang <abner.ch...@hpe.com>
Cc: Sunil V L <suni...@ventanamicro.com>
Reviewed-by: Abner Chang <abner.ch...@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schae...@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
| 2 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
| 2 +-
Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/PeiCoreInfoHobLib.inf
| 43 ++++++++++++++++++++
Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
| 2 +-
Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
| 4 +-
Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c
| 37 +++++++++++++++++
6 files changed, 85 insertions(+), 5 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
index fce1c5057879..1dc6405a20f0 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
@@ -212,7 +212,7 @@
# RISC-V core libraries
#
SiliconSiFiveU54CoreInfoLib|Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
-
SiliconSiFiveU5MCCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
+
RiscVCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
[LibraryClasses.common.DXE_CORE]
TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
diff --git
a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index 14d83fb25a9f..18a99b86d849 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -213,7 +213,7 @@
# RISC-V core libraries
#
SiliconSiFiveU54CoreInfoLib|Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
-
SiliconSiFiveU5MCCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
+
RiscVCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
[LibraryClasses.common.DXE_CORE]
TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
diff --git
a/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/PeiCoreInfoHobLib.inf
b/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/PeiCoreInfoHobLib.inf
new file mode 100644
index 000000000000..5a8db5071f40
--- /dev/null
+++
b/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/PeiCoreInfoHobLib.inf
@@ -0,0 +1,43 @@
+## @file
+# Library instance to create core information HOB
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001b
+ BASE_NAME = RiscVCoreplexInfoLibNull
+ FILE_GUID = E5783AF0-B7C5-4FAA-BAB4-D52C06B98BBE
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = RiscVCoreplexInfoLib
+
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+[Sources]
+ CoreInfoHob.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ PcdLib
+ MemoryAllocationLib
+ PrintLib
+
+[Guids]
+
+[Ppis]
+
+[FixedPcd]
diff --git
a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
index e7f5eef6300f..0db88abba420 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
+++ b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
@@ -51,7 +51,7 @@
PeiServicesTablePointerLib
PeimEntryPoint
PcdLib
- SiliconSiFiveU5MCCoreplexInfoLib
+ RiscVCoreplexInfoLib
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved
diff --git
a/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
b/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
index b3124a6daf77..d741f0474769 100644
---
a/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
+++
b/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
@@ -1,7 +1,7 @@
## @file
# Library instance to create core information HOB
#
-# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -13,7 +13,7 @@
FILE_GUID = 4E397A71-5164-4E69-9884-70CBE2740AAB
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
- LIBRARY_CLASS = SiliconSiFiveU5MCCoreplexInfoLib
+ LIBRARY_CLASS = RiscVCoreplexInfoLib
#
# The following information is for reference only and not required by the
build tools.
diff --git
a/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c
b/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c
new file mode 100644
index 000000000000..9aad7991bc77
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c
@@ -0,0 +1,37 @@
+/**@file
+ Build up platform processor information.
+
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// The package level header files this module uses
+//
+#include <PiPei.h>
+
+//
+// The Library classes this module consumes
+//
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/BaseMemoryLib.h>
+
+#include <ProcessorSpecificHobData.h>
+
+
+/**
+ Build processor and platform information for a generic RISC-V
+
+ @return EFI_SUCCESS Status.
+
+**/
+EFI_STATUS
+BuildRiscVSmbiosHobs (
+ VOID
+)
+{
+ return EFI_SUCCESS;
+}
--
2.31.1
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