Hi guys,
I've finally found some spare time to push the changes from my local
'patched LM32' Mercurial repository up to my webserver.
This includes:
* LM32 core V3.6 (based on Diamond 1.1-lm32 Nov 2010), with the
following patches:
- JTAG patches from Wesley Terpstra, Michael Walle and Sebastien
Bordeauducq
- Interrupt polarity flip patch (interrupts are now pos-level
sensitive). At some point I should really look into making the interrupt
polarity configurable...
- Remove monitor ROM
* LM32 DMA, GPIO and Timer peripherals, verbatim, with sample device
driver code from Lattice.
* My SDRAM controller core. Apache license V2.0. This is a fairly
simplistic SDRAM controller; the configuration is fixed but
parameterised (i.e. not reconfigurable at runtime) and no caching is
performed. It can't even deal with WISHBONE burst transactions. Setting
the BURST_ENABLE bit on the DMA controller while using this core would
not be a good idea...
All these cores are located at:
http://hg.philpem.me.uk/IPCores/
As always, I'm interested to hear your comments on this "grand plan" :)
Thanks,
--
Phil.
phil...@philpem.me.uk
http://www.philpem.me.uk/
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