On Thu, 06 Oct 2011 11:00:04 +0200, sebastien.bourdeaud...@lekernel.net
wrote:
I think the FPGA should already have those internally (the same
pull-ups that make the LEDs go dimly lit when the FPGA is
unconfigured). But maybe there are glitches or something?
ug380 seems to say there are:
"FOE_
On Wed, 5 Oct 2011 09:55:14 -0300, Werner Almesberger wrote:
Uwe Bonnes wrote:
In the schematic (page 7 of rc3_schematic.pdf), I don't see a
pull-up on
the JS28F256 CE0 pin and neither on we_n. Shoudn't these pullup help
too?
This sounds like a very good idea to me. Also Xilinx have 4.7 kOhm
Uwe Bonnes wrote:
> In the schematic (page 7 of rc3_schematic.pdf), I don't see a pull-up on
> the JS28F256 CE0 pin and neither on we_n. Shoudn't these pullup help too?
This sounds like a very good idea to me. Also Xilinx have 4.7 kOhm
pull-ups in their reference design in figure 2-20 on page 48 o
> "Werner" == Werner Almesberger writes:
Werner> Summary: automated testing produced results consistent with the
Werner> work-arounds for NOR corruption indeed working a expected, but
Werner> do not yet provide a conclusive confirmation. Further testing to
Werner> focus on val
Summary: automated testing produced results consistent with the
work-arounds for NOR corruption indeed working a expected, but
do not yet provide a conclusive confirmation. Further testing to
focus on validating improved rc4 circuit.
Background:
During the last weeks, I've been torture-te
