Hi,
>> The digital core of the ADV7181B can be shut down by using a pin
>> (PWRDN) and a bit (PWRDN). U21's pin30 PWRDN_N is always at HIGH.The
>> PDBP controls which of the two has the higher priority. By default,
>> the pin (PWRDN) is given priority. This allows the user to have the
>> ADV71
Hi,
>From your replies, it seems that it's most a rework or sourcing issue.
Thanks for your clarification.
Adam
___
http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org
IRC: #milkym...@freenode
Webchat: www.milkymist.org/irc.html
Wiki: www.milkymi
Hi,
On Monday 12 July 2010 10:24:59 Adam Wang wrote:
> The #3 also "ever" but without test all current branches. So did that
> injection test make damages inside Spartan-6 already? We didn't know
> exactly then.
After PCBA #4 went into short-circuit and over-current, I removed the video
chip and
Hi,
>> It did not go well. Upon powering up the boards without a bitstream loaded
>> (FPGA idle with pre-configuration weak pull-up resistors on all I/Os) the
>> current was at the usual value (0.6A). Then, after about 30s it jumped to
>> more than 1A with a short circuit to ground appearing on t
Hi,
Le Saturday 10 July 2010 22:02:37, Sébastien Bourdeauducq a écrit :
> Hi,
>
> I have tested the two boards that I have received from Adam today, with the
> video input patched (P[15:8] connected instead of P[7:0], and P[7:0]
> disconnected by lifting the pins).
>
> It did not go well. Upon p
Hi,
I have tested the two boards that I have received from Adam today, with the
video input patched (P[15:8] connected instead of P[7:0], and P[7:0]
disconnected by lifting the pins).
It did not go well. Upon powering up the boards without a bitstream loaded
(FPGA idle with pre-configuration w
