Re: [riot-devel] Semihosting

n openocd command and > a couple tool-chain flags (in theory). but I'm not so sure of where to > start. > > [image: photo] > *Anthony Merlino* > CTO & Co-founder, Verge Aero > (609)-319-1399 > > On 1/21/2017 3:43:43 PM, DipSwitch <dipswi...@ownage4u.nl> wrote

Re: [riot-devel] Semihosting

Segger RTT only works with segger J-link. However if your st link came from a nucleo or discovery you can update the firmware to a J-Link with limited functionality. On Jan 21, 2017 21:36, "Anthony Merlino" wrote: > Thanks everyone for the suggestions. Segger RTT looks

Re: [riot-devel] PRs for hardware the maintainers cannot test

I've a 207, but I think that it shouldn't be a problem. Maybe we could add a "tag" of some sort that the support is experimental. Just like Linux :) On 22 Aug 2016 17:34, "Kaspar Schleiser" wrote: > Hey fellow RIOTers, > > how do we deal with PR's for boards or devices that

Re: [riot-devel] RIOT Release 2016.04

Nice work! Got some PR's up my sleeve for the next release :) hope to find more time for testing as well ^_^ ___ devel mailing list devel@riot-os.org https://lists.riot-os.org/mailman/listinfo/devel

Re: [riot-devel] picoTCP for RIOT

Cool! :D ___ devel mailing list devel@riot-os.org https://lists.riot-os.org/mailman/listinfo/devel

Re: [riot-devel] PWM API change

Welcome! It might also be an idea to create something like: #ifndef HAS_PWM_RES_T typedef uint16_t pwm_res_t #endif Which can be overridden by the CPU implementation. This way 8bit timers can use 8bit values and 32bit timers 32bit. Cheers, Nick

Re: [riot-devel] Call for conn Task Force

Goodevening, Always interesting to talk networking :) On 17 Mar 2016 10:58, "Jose Alamos" wrote: > Hi! > > I'd like to join too. > Cheers! > > ___ > devel mailing list > devel@riot-os.org >

Re: [riot-devel] exhausted Travis

> > I'd say it is easily customizable, but ask me again after I've added > support for distributed builds... Sounds more like fun ;) ___ devel mailing list devel@riot-os.org https://lists.riot-os.org/mailman/listinfo/devel

Re: [riot-devel] Interim Hack'n'ACK

Since the clock selection is an Hack 'n ACK candidate. I noticed that some STM discovery boards use the Stlink's MCO output as clock source. The code currently expects an external xtal to be connected. There should be a define to switch the clock input to bypass mode. Don't know if I can join