[PATCH 1/3] score: Move context validation declarations

The context validation support functions _CPU_Context_validate() and _CPU_Context_volatile_clobber() are used only by one test program (spcontext01). Move the function declarations to the CPU port implementation header file. --- cpukit/score/cpu/arm/include/rtems/score/cpu.h | 4 --- cpukit/

[PATCH 3/3] score: Add _CPU_Instruction_illegal()

On some architectures/simulators it is difficult to provoke an exception with misaligned or illegal data loads. Use an illegal instruction instead. Update #3433. --- cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h | 5 + cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h | 5 +

[PATCH 2/3] score: Add _CPU_Instruction_no_operation()

This helps to reduce the use of architecture-specific defines throughout the code base. --- cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h | 5 + cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h | 5 + cpukit/score/cpu/epiphany/include/rtems/score/cpuimpl.h | 5 + cp

coverage : error when running --coverage with rtems-test for whole testsuites

Hello, I used the following command $HOME/development/rtems/test/rtems-tools/tester/rtems-test \ --rtems-tools=$HOME/development/rtems/5 --log=coverage_analysis.log \ --no-clean --coverage=score --rtems-bsp=leon3-qemu-cov \ /home/lunatic/development/rtems/kernel/leon3/sparc-r

RTEMS Open Class in Huntsville AL US Oct 1-5

Hi There will be an RTEMS Open Class in Huntsville Alabama the week of October 1 - 5. October 1 - Getting Started October 4 - 5 - Open Class Details and registration forms at http://rtems.com/trainingschedule. If you have questions at all about the class, feel free to email me directly. I am

Re: QorIQ Boards

- Am 19. Jul 2018 um 20:44 schrieb joel j...@rtems.org: > On Thu, Jul 19, 2018 at 1:42 PM, Sebastian Huber < > sebastian.hu...@embedded-brains.de> wrote: > >> - Am 19. Jul 2018 um 17:01 schrieb joel j...@rtems.org: >> >> > Hi >> > >> > Is the list of boards in the BSP README up to date

Re: Bumping binutils and gcc

- Am 19. Jul 2018 um 20:47 schrieb joel j...@rtems.org: > On Thu, Jul 19, 2018 at 1:40 PM, Sebastian Huber < > sebastian.hu...@embedded-brains.de> wrote: > >> - Am 19. Jul 2018 um 17:53 schrieb joel j...@rtems.org: [...] >> An update to Binutils 2.31.1 is fine. It is already on my todo

Re: [PATCH] sptests/spfatal26: Use an illegal instruction

On Thu, Jul 19, 2018 at 1:37 PM, Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > > > - Am 19. Jul 2018 um 17:03 schrieb joel j...@rtems.org: > > > On Thu, Jul 19, 2018 at 8:49 AM, Gedare Bloom wrote: > > > >> For now we don't need to generalize this approach or make any kind of

Re: Bumping binutils and gcc

On Thu, Jul 19, 2018 at 1:40 PM, Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > - Am 19. Jul 2018 um 17:53 schrieb joel j...@rtems.org: > > > Hi > > > > Just curious if it was time to bump binutils to 2.31 > > and gcc to 8.1 (or 8.2 when out) for the targets > > that we can. >

Re: QorIQ Boards

On Thu, Jul 19, 2018 at 1:42 PM, Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > - Am 19. Jul 2018 um 17:01 schrieb joel j...@rtems.org: > > > Hi > > > > Is the list of boards in the BSP README up to date? > > > > === > > Board support package for the Freesca

Re: QorIQ Boards

- Am 19. Jul 2018 um 17:01 schrieb joel j...@rtems.org: > Hi > > Is the list of boards in the BSP README up to date? > > === > Board support package for the Freescale QorIQ platform: > > http://en.wikipedia.org/wiki/QorIQ > > Boards known to work P1020RDB, MVME2500, T2

Re: Bumping binutils and gcc

- Am 19. Jul 2018 um 17:53 schrieb joel j...@rtems.org: > Hi > > Just curious if it was time to bump binutils to 2.31 > and gcc to 8.1 (or 8.2 when out) for the targets > that we can. How does this get us closer to a RTEMS 5.1 release? At least for ARM and PowerPC it is a bit of work to upg

Re: [PATCH] sptests/spfatal26: Use an illegal instruction

- Am 19. Jul 2018 um 17:03 schrieb joel j...@rtems.org: > On Thu, Jul 19, 2018 at 8:49 AM, Gedare Bloom wrote: > >> For now we don't need to generalize this approach or make any kind of >> facility like this available outside of testing. >> >> (FYI: 0 is a "nop" on some architectures) >>

rtems-bsp-builder .ini file syntax question (for epiphany)

Hi Epiphany can't build any network services. The GCC gives an Internal Compiler Error. On top of that, I recall the epiphany is too small to really run one of our network stacks anyway. in rtems-bsps-ephipany.ini, I wanted to change exclude = smp to exclude = smp, network But that seems to b

Bumping binutils and gcc

Hi Just curious if it was time to bump binutils to 2.31 and gcc to 8.1 (or 8.2 when out) for the targets that we can. --joel ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel

Re: [PATCH] sptests/spfatal26: Use an illegal instruction

On Thu, Jul 19, 2018 at 8:49 AM, Gedare Bloom wrote: > For now we don't need to generalize this approach or make any kind of > facility like this available outside of testing. > > (FYI: 0 is a "nop" on some architectures) > > Gedare > > On Thu, Jul 19, 2018 at 9:37 AM, Sebastian Huber > wrote: >

QorIQ Boards

Hi Is the list of boards in the BSP README up to date? === Board support package for the Freescale QorIQ platform: http://en.wikipedia.org/wiki/QorIQ Boards known to work P1020RDB, MVME2500, T2080RDB and T4240RDB. === I was asked for PowerPC reference

Re: [PATCH] sptests/spfatal26: Use an illegal instruction

For now we don't need to generalize this approach or make any kind of facility like this available outside of testing. (FYI: 0 is a "nop" on some architectures) Gedare On Thu, Jul 19, 2018 at 9:37 AM, Sebastian Huber wrote: > I thought about adding a _CPU_Illegal_instruction() function to > . B

Re: [PATCH] sptests/spfatal26: Use an illegal instruction

I thought about adding a _CPU_Illegal_instruction() function to . But, do you want such a toxic function in a header file or librtemscpu.a? Now it is isolated in the test and can do no harm. On 19/07/18 15:35, Joel Sherrill wrote: This looks like a good approach. If 0 is a valid instruction on

Re: [PATCH] sptests/spfatal26: Use an illegal instruction

This looks like a good approach. If 0 is a valid instruction on some architecture, we can add a conditional. On Thu, Jul 19, 2018 at 5:55 AM, Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > On some architectures/simulators it is difficult to provoke an > exception with misaligned o

Re: [PATCH] RTEMS: Unconditionally define _off_t to int64_t

The background for this change is that the fsfseeko01 test fails on RISC-V without this change. Instead of adding yet another target to the list of standard targets, default _off_t to int64_t. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone :

[PATCH] RTEMS: Unconditionally define _off_t to int64_t

Exotic RTEMS targets can define this back to int32_t as an exception if there are good reasons. Signed-off-by: Sebastian Huber --- newlib/libc/sys/rtems/include/machine/_types.h | 4 1 file changed, 4 deletions(-) diff --git a/newlib/libc/sys/rtems/include/machine/_types.h b/newlib/libc/s

[PATCH] sptests/spfatal26: Use an illegal instruction

On some architectures/simulators it is difficult to provoke an exception with misaligned or illegal data loads. Use an illegal instruction instead. Update #3433. --- testsuites/sptests/spfatal26/init.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/testsuites/sptes