Re: [PATCH 0/3] Simplify generic interrupt controller support

2021-06-18 Thread Chris Johns
On 18/6/21 5:20 pm, Sebastian Huber wrote: > This patch set simplifies the generic interrupt controller support a bit to > prepare for more complex follow up changes. This change touches a large number of BSPs in an important area. I spent some time this year fixing a 10+ year old IRQ bug related

Re: [PATCH] covoar/ Explanations.cc: Handle newline at end of file

2021-06-18 Thread Chris Johns
On 19/6/21 7:00 am, Alex White wrote: > --- > tester/covoar/Explanations.cc | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/tester/covoar/Explanations.cc b/tester/covoar/Explanations.cc > index 1449fb2..64cad5c 100644 > --- a/tester/covoar/Explanations.cc > +++ b/tester/covoar/Explana

[PATCH] covoar/ Explanations.cc: Handle newline at end of file

2021-06-18 Thread Alex White
--- tester/covoar/Explanations.cc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tester/covoar/Explanations.cc b/tester/covoar/Explanations.cc index 1449fb2..64cad5c 100644 --- a/tester/covoar/Explanations.cc +++ b/tester/covoar/Explanations.cc @@ -87,6 +87,9 @@ namespace Coverage {

Re: GSoC POSIX Compliance: Can't Build RTEMS Tool Suite Anymore

2021-06-18 Thread Joel Sherrill
On Fri, Jun 18, 2021 at 8:33 AM Matthew Joyce wrote: > Dear Mentors, > > I'm sorry to report that I've taken one step forward and three steps > back. Since last night, I'm having trouble building the RTEMS tool > suite at all. I keep getting the same error (attached). > > Steps I've taken to atte

Re: Why is CPU_ISR_PASSES_FRAME_POINTER == FALSE on sparc?

2021-06-18 Thread Sebastian Huber
On 18/06/2021 16:44, Joel Sherrill wrote: Looks like someone forgot to change the ifdef when they added the ISR frame. Is the macro used anywhere? It looks like CPU_ISR_PASSES_FRAME_POINTER == TRUE is an unusual option. I get a lot of assignment to 'ISR_Handler_entry' {aka 'void (*)(unsigne

Re: Why is CPU_ISR_PASSES_FRAME_POINTER == FALSE on sparc?

2021-06-18 Thread Joel Sherrill
On Fri, Jun 18, 2021 at 9:23 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > Hello, > > I work currently on this ticket: > > https://devel.rtems.org/ticket/4458 > > This is also related to the strange set_vector() function. set_vector() was added long ago as a BSP wrapper for r

Why is CPU_ISR_PASSES_FRAME_POINTER == FALSE on sparc?

2021-06-18 Thread Sebastian Huber
Hello, I work currently on this ticket: https://devel.rtems.org/ticket/4458 This is also related to the strange set_vector() function. Why do we have this: /** * Does the RTEMS invoke the user's ISR with the vector number and * a pointer to the saved interrupt frame (1) or just the vector

Re: [PATCH 3/3] bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAX

2021-06-18 Thread Sebastian Huber
On 18/06/2021 15:53, Sebastian Huber wrote: On 18/06/2021 09:20, Sebastian Huber wrote: diff --git a/bsps/sparc/erc32/include/bsp/irq.h b/bsps/sparc/erc32/include/bsp/irq.h index ad3a65fcc1..7bf6cff2ff 100644 --- a/bsps/sparc/erc32/include/bsp/irq.h +++ b/bsps/sparc/erc32/include/bsp/irq.h @@ -

Re: [PATCH 3/3] bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAX

2021-06-18 Thread Sebastian Huber
On 18/06/2021 09:20, Sebastian Huber wrote: diff --git a/bsps/sparc/erc32/include/bsp/irq.h b/bsps/sparc/erc32/include/bsp/irq.h index ad3a65fcc1..7bf6cff2ff 100644 --- a/bsps/sparc/erc32/include/bsp/irq.h +++ b/bsps/sparc/erc32/include/bsp/irq.h @@ -20,8 +20,7 @@ #include -#define BSP_

Re: [PATCH] part of implimenting a monotonic clock in rtems part of this is not the final patch.

2021-06-18 Thread Christian Mauderer
Hello Zack, On 18/06/2021 04:34, zack_on_the_speed_chanel wrote: so I tested it with the but I have not made a new test file I'll do that soon. How do I add a new test? All the tests that test the timer functionality do work. I"m confident that all the changes I had to made to implement a mono

Re: [PATCH v6 1/2] Update Strong APA Scheduler

2021-06-18 Thread Sebastian Huber
On 16/06/2021 08:00, Richi Dubey wrote: This change allows for the migration of higher priority tasks on the arrival of a lower priority task limited by affinity constraints. Thanks, for the update. I will integrate this next week. If not, please send me a reminder. -- embedded brains GmbH H

[PATCH 0/3] Simplify generic interrupt controller support

2021-06-18 Thread Sebastian Huber
This patch set simplifies the generic interrupt controller support a bit to prepare for more complex follow up changes. Sebastian Huber (3): bsps/irq: Remove BSP_INTERRUPT_NO_HEAP_USAGE bsps/irq: Remove BSP_INTERRUPT_VECTOR_MIN bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAX bsps/aarch64/a53/inc

[PATCH 2/3] bsps/irq: Remove BSP_INTERRUPT_VECTOR_MIN

2021-06-18 Thread Sebastian Huber
This define was defined to be zero for all BSP except: * or1k/generic_or1k which has only an incomplete implementation. * m68k/genmcf548x which is a special case. This BSP uses a custom implementation for libbsd compatibility. This custom implementation didn't use BSP_INTERRUPT_VECTOR_MIN.

[PATCH 3/3] bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAX

2021-06-18 Thread Sebastian Huber
Replace it with BSP_INTERRUPT_VECTOR_COUNT. This allows a default implementation which supports no interrupt vector at all. Using COUNT instead of MAX may avoid some interpretation issues, for example is the maximum value a valid vector number or not. The change shows that BSP_INTERRUPT_VECTOR_M

[PATCH 1/3] bsps/irq: Remove BSP_INTERRUPT_NO_HEAP_USAGE

2021-06-18 Thread Sebastian Huber
Remove the support for BSP_INTERRUPT_NO_HEAP_USAGE. This was only used by one BSP and provides no real benefit. Update #3269. --- bsps/include/bsp/irq-generic.h| 8 -- bsps/powerpc/mpc55xxevb/include/bsp/irq.h | 1 - bsps/shared/irq/irq-generic.c | 34 ++