Hi @carlo.broker...@dlr.de ,
> the design for the rx data path including the RxFIFO looks promising. If
nobody is working on it yet, I would try to implement it. You said it still
needs to be approved -
> who do I have to contact for this?
I saw in discord there was a discussion for the rework
Hi will,
> On Wed, 2023-03-01 at 08:27 -0600, Will wrote:
>
> This functionality is ideally implemented in a platform-specific
> system level control register (SLCR) driver similar to ZynqMP and
> Versal. You could also just leave it as-is since the default does
> exactly the same thing. Th
Hi will,
> On Wed, 2023-03-01 at 08:20 -0600, Will wrote:
>
> On Tue, Feb 28, 2023 at 11:57 PM Padmarao Begari <
> padmarao.beg...@microchip.com> wrote:
> > Read the clock frequency from the device tree and use it to
> > calculate the mdc clock divider for the MII bus if not found
> > then
Hi Will,
Thanks for review comments.
> On Wed, 2023-03-01 at 08:10 -0600, Will wrote:
>
> On Tue, Feb 28, 2023 at 11:57 PM Padmarao Begari <
> padmarao.beg...@microchip.com> wrote:
> > Read the phy address from the device tree and use it to
> > find the phy device if not found then search
Hello Prashanth S,
the design for the rx data path including the RxFIFO looks promising. If nobody
is working on it yet, I would try to implement it. You said it still needs to
be approved - who do I have to contact for this?
I think you misunderstood me about the ioctl api. My main quest
Gabriel.. can you at least file a ticket and put your source on it for
others to start from? I suspect that if it works, it is likely OK to merge
unless you have other concerns.Posting it as a patch would be great.
Viraj.. there isn't a leon3 network controller simulation in qemu. There
were free
This functionality is ideally implemented in a platform-specific system
level control register (SLCR) driver similar to ZynqMP and Versal. You
could also just leave it as-is since the default does exactly the same
thing. This patch should be dropped unless you're going to define an
implementation t
On Tue, Feb 28, 2023 at 11:57 PM Padmarao Begari <
padmarao.beg...@microchip.com> wrote:
> Read the clock frequency from the device tree and use it to
> calculate the mdc clock divider for the MII bus if not found
> then use default clock divider.
> ---
> freebsd/sys/dev/cadence/if_cgem.c | 39 ++
On Tue, Feb 28, 2023 at 11:57 PM Padmarao Begari <
padmarao.beg...@microchip.com> wrote:
> Read the phy address from the device tree and use it to
> find the phy device if not found then search in the
> range of 0 to 31.
> ---
> freebsd/sys/dev/cadence/if_cgem.c | 41 -
Hello @Carlo Brokering,
> As part of an internship at the German Aerospace Center, I am currently
working on the implementation of a CAN driver for a Xilinx
> Zynq SoC. For this I used the existing CAN framework /dev/can/can.h. A
merge request will follow soon.
All the best for your Internship.
Hello,
As part of an internship at the German Aerospace Center, I am currently working
on the implementation of a CAN driver for a Xilinx Zynq SoC. For this I used
the existing CAN framework /dev/can/can.h. A merge request will follow soon.
Here's what I'd like to add to the framework if it ha
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