On 30/09/14 16:18, Tomasz Gregorek wrote:
Any chance for someone to take a look at this patch?
Thanks, I checked in the patch without really looking at it.
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Sebastian Huber, embedded brains GmbH
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2014-09-21 20:07 GMT+02:00 :
> From: Tomasz Gregorek
>
> Added simple math to caclulate register values for the PLL
> and for the prescalers. It will try to keep 48MHz for the USB OTG FS.
> Also it will set latency on the Flash memory for the high speeds.
>
> Limitations:
> It is assumed that 1MH
From: Tomasz Gregorek
Added simple math to caclulate register values for the PLL
and for the prescalers. It will try to keep 48MHz for the USB OTG FS.
Also it will set latency on the Flash memory for the high speeds.
Limitations:
It is assumed that 1MHz resolution is enough.
Best fits for the cl
