This breaks out AArch32-specific code so that the shared GICv3 code can be reused by other architectures. --- bsps/arm/beagle/irq/irq.c | 1 + bsps/arm/csb336/irq/irq.c | 1 + bsps/arm/csb337/irq/irq.c | 1 + bsps/arm/gumstix/irq/irq.c | 1 + bsps/arm/headers.am | 5 +- bsps/arm/include/bsp/irq-arch.h | 42 ++++++ bsps/arm/lpc24xx/irq/irq-dispatch.c | 1 + bsps/arm/lpc32xx/irq/irq.c | 1 + bsps/arm/raspberrypi/irq/irq.c | 1 + bsps/arm/rtl22xx/irq/irq.c | 1 + bsps/arm/shared/irq/irq-arm-gicv3-aarch32.c | 47 +++++++ bsps/arm/shared/irq/irq-gic.c | 1 + bsps/arm/smdk2410/irq/irq.c | 1 + bsps/arm/tms570/irq/irq.c | 1 + bsps/headers.am | 4 + bsps/{arm => }/include/bsp/arm-gic-irq.h | 12 ++ bsps/{arm => }/include/bsp/arm-gic-regs.h | 0 bsps/{arm => }/include/bsp/arm-gic-tm27.h | 0 bsps/{arm => }/include/bsp/arm-gic.h | 0 .../irq/irq-arm-gicv3.c} | 120 +++++++++++------- .../altera-cyclone-v/bspalteracyclonev.yml | 1 + spec/build/bsps/arm/atsam/bspatsam.yml | 1 + spec/build/bsps/arm/beagle/obj.yml | 1 + spec/build/bsps/arm/csb336/bspcsb336.yml | 1 + spec/build/bsps/arm/csb337/obj.yml | 1 + spec/build/bsps/arm/edb7312/bspedb7312.yml | 1 + spec/build/bsps/arm/grp.yml | 8 +- spec/build/bsps/arm/gumstix/bspgumstix.yml | 1 + spec/build/bsps/arm/imx/bspimx.yml | 1 + spec/build/bsps/arm/lm3s69xx/obj.yml | 1 + spec/build/bsps/arm/lpc176x/obj.yml | 1 + spec/build/bsps/arm/lpc24xx/obj.yml | 1 + spec/build/bsps/arm/lpc32xx/obj.yml | 1 + spec/build/bsps/arm/raspberrypi/obj.yml | 1 + .../arm/realview-pbx-a9/bsprealviewpbxa9.yml | 1 + spec/build/bsps/arm/rtl22xx/obj.yml | 1 + spec/build/bsps/arm/smdk2410/bspsmdk2410.yml | 1 + spec/build/bsps/arm/stm32f4/obj.yml | 1 + spec/build/bsps/arm/tms570/obj.yml | 1 + spec/build/bsps/arm/xen/bspxen.yml | 1 + spec/build/bsps/arm/xilinx-zynq/obj.yml | 1 + .../arm/xilinx-zynqmp/bspxilinxzynqmp.yml | 1 + 42 files changed, 215 insertions(+), 55 deletions(-) create mode 100644 bsps/arm/include/bsp/irq-arch.h create mode 100644 bsps/arm/shared/irq/irq-arm-gicv3-aarch32.c rename bsps/{arm => }/include/bsp/arm-gic-irq.h (88%) rename bsps/{arm => }/include/bsp/arm-gic-regs.h (100%) rename bsps/{arm => }/include/bsp/arm-gic-tm27.h (100%) rename bsps/{arm => }/include/bsp/arm-gic.h (100%) rename bsps/{arm/shared/irq/irq-gicv3.c => shared/irq/irq-arm-gicv3.c} (87%)
diff --git a/bsps/arm/beagle/irq/irq.c b/bsps/arm/beagle/irq/irq.c index 2fa1a5b0f0..202d2d7aa9 100644 --- a/bsps/arm/beagle/irq/irq.c +++ b/bsps/arm/beagle/irq/irq.c @@ -16,6 +16,7 @@ */ #include <bsp.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <bsp/linker-symbols.h> #include <bsp/fatal.h> diff --git a/bsps/arm/csb336/irq/irq.c b/bsps/arm/csb336/irq/irq.c index e5887b9717..32b3d1734f 100644 --- a/bsps/arm/csb336/irq/irq.c +++ b/bsps/arm/csb336/irq/irq.c @@ -14,6 +14,7 @@ #include <bsp.h> #include <bsp/irq.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <mc9328mxl.h> diff --git a/bsps/arm/csb337/irq/irq.c b/bsps/arm/csb337/irq/irq.c index 95e93845b9..465e41e91c 100644 --- a/bsps/arm/csb337/irq/irq.c +++ b/bsps/arm/csb337/irq/irq.c @@ -14,6 +14,7 @@ #include <bsp.h> #include <bsp/irq.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <at91rm9200.h> diff --git a/bsps/arm/gumstix/irq/irq.c b/bsps/arm/gumstix/irq/irq.c index 425795b165..4168bc2da6 100644 --- a/bsps/arm/gumstix/irq/irq.c +++ b/bsps/arm/gumstix/irq/irq.c @@ -13,6 +13,7 @@ #include <bsp.h> #include <bsp/irq.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <pxa255.h> diff --git a/bsps/arm/headers.am b/bsps/arm/headers.am index f0d498c8f4..29f2426a96 100644 --- a/bsps/arm/headers.am +++ b/bsps/arm/headers.am @@ -17,10 +17,6 @@ include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a9mpcore-regs.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a9mpcore-start.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-cp15-start.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-errata.h -include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-gic-irq.h -include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-gic-regs.h -include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-gic-tm27.h -include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-gic.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-pl050-regs.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-pl050.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-pl111-fb.h @@ -28,6 +24,7 @@ include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-pl111-regs.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-release-id.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/armv7m-irq.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/clock-armv7m.h +include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/irq-arch.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/linker-symbols.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/lpc-dma.h include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/lpc-emc.h diff --git a/bsps/arm/include/bsp/irq-arch.h b/bsps/arm/include/bsp/irq-arch.h new file mode 100644 index 0000000000..c902f68953 --- /dev/null +++ b/bsps/arm/include/bsp/irq-arch.h @@ -0,0 +1,42 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (C) 2020 On-Line Applications Research Corporation (OAR) + * Written by Kinsey Moore <kinsey.mo...@oarcorp.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef LIBBSP_ARM_SHARED_IRQ_ARCH_H +#define LIBBSP_ARM_SHARED_IRQ_ARCH_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +void bsp_interrupt_dispatch( void ); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* LIBBSP_ARM_SHARED_IRQ_ARCH_H */ diff --git a/bsps/arm/lpc24xx/irq/irq-dispatch.c b/bsps/arm/lpc24xx/irq/irq-dispatch.c index 66d05fdf9d..7baa527595 100644 --- a/bsps/arm/lpc24xx/irq/irq-dispatch.c +++ b/bsps/arm/lpc24xx/irq/irq-dispatch.c @@ -24,6 +24,7 @@ #include <bsp.h> #include <bsp/irq.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <bsp/lpc24xx.h> diff --git a/bsps/arm/lpc32xx/irq/irq.c b/bsps/arm/lpc32xx/irq/irq.c index eac320000b..f0c1f4f548 100644 --- a/bsps/arm/lpc32xx/irq/irq.c +++ b/bsps/arm/lpc32xx/irq/irq.c @@ -23,6 +23,7 @@ #include <bsp.h> #include <bsp/irq.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <bsp/lpc32xx.h> #include <bsp/linker-symbols.h> diff --git a/bsps/arm/raspberrypi/irq/irq.c b/bsps/arm/raspberrypi/irq/irq.c index 835cdf97d9..1e5e4735b3 100644 --- a/bsps/arm/raspberrypi/irq/irq.c +++ b/bsps/arm/raspberrypi/irq/irq.c @@ -25,6 +25,7 @@ #include <bsp.h> #include <bsp/irq.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <bsp/raspberrypi.h> #include <bsp/linker-symbols.h> diff --git a/bsps/arm/rtl22xx/irq/irq.c b/bsps/arm/rtl22xx/irq/irq.c index 83e140bd7b..7f94958105 100644 --- a/bsps/arm/rtl22xx/irq/irq.c +++ b/bsps/arm/rtl22xx/irq/irq.c @@ -13,6 +13,7 @@ #include <bsp.h> #include <bsp/irq.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <lpc22xx.h> diff --git a/bsps/arm/shared/irq/irq-arm-gicv3-aarch32.c b/bsps/arm/shared/irq/irq-arm-gicv3-aarch32.c new file mode 100644 index 0000000000..bff1256533 --- /dev/null +++ b/bsps/arm/shared/irq/irq-arm-gicv3-aarch32.c @@ -0,0 +1,47 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (C) 2020 On-Line Applications Research Corporation (OAR) + * Written by Kinsey Moore <kinsey.mo...@oarcorp.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <libcpu/arm-cp15.h> +#include <bsp/arm-gic-irq.h> +#include <bsp/irq-generic.h> + +void aarch_interrupt_handler_dispatch(rtems_vector_number vector) +{ + uint32_t psr = _ARMV4_Status_irq_enable(); + bsp_interrupt_handler_dispatch(vector); + + _ARMV4_Status_restore(psr); +} + +void aarch_interrupt_facility_set_exception_handler(void) +{ + arm_cp15_set_exception_handler( + ARM_EXCEPTION_IRQ, + _ARMV4_Exception_interrupt + ); +} diff --git a/bsps/arm/shared/irq/irq-gic.c b/bsps/arm/shared/irq/irq-gic.c index 42ae6c4d7d..8f195965cd 100644 --- a/bsps/arm/shared/irq/irq-gic.c +++ b/bsps/arm/shared/irq/irq-gic.c @@ -19,6 +19,7 @@ #include <libcpu/arm-cp15.h> #include <bsp/irq.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <bsp/start.h> diff --git a/bsps/arm/smdk2410/irq/irq.c b/bsps/arm/smdk2410/irq/irq.c index ea8f610353..7edf042f27 100644 --- a/bsps/arm/smdk2410/irq/irq.c +++ b/bsps/arm/smdk2410/irq/irq.c @@ -16,6 +16,7 @@ #include <bsp.h> #include <bsp/irq.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <s3c24xx.h> diff --git a/bsps/arm/tms570/irq/irq.c b/bsps/arm/tms570/irq/irq.c index 7129915c93..874a942718 100644 --- a/bsps/arm/tms570/irq/irq.c +++ b/bsps/arm/tms570/irq/irq.c @@ -23,6 +23,7 @@ */ #include <bsp.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <bsp/tms570-vim.h> #include <bsp/irq.h> diff --git a/bsps/headers.am b/bsps/headers.am index 825574a5a9..ffb5fd5513 100644 --- a/bsps/headers.am +++ b/bsps/headers.am @@ -6,6 +6,10 @@ include_HEADERS += ../../bsps/include/shm_driver.h include_bspdir = $(includedir)/bsp include_bsp_HEADERS = +include_bsp_HEADERS += ../../bsps/include/bsp/arm-gic-irq.h +include_bsp_HEADERS += ../../bsps/include/bsp/arm-gic-regs.h +include_bsp_HEADERS += ../../bsps/include/bsp/arm-gic-tm27.h +include_bsp_HEADERS += ../../bsps/include/bsp/arm-gic.h include_bsp_HEADERS += ../../bsps/include/bsp/bootcard.h include_bsp_HEADERS += ../../bsps/include/bsp/console-polled.h include_bsp_HEADERS += ../../bsps/include/bsp/console-termios.h diff --git a/bsps/arm/include/bsp/arm-gic-irq.h b/bsps/include/bsp/arm-gic-irq.h similarity index 88% rename from bsps/arm/include/bsp/arm-gic-irq.h rename to bsps/include/bsp/arm-gic-irq.h index 219c3c7189..fd85b9bafd 100644 --- a/bsps/arm/include/bsp/arm-gic-irq.h +++ b/bsps/include/bsp/arm-gic-irq.h @@ -108,6 +108,18 @@ static inline rtems_status_code arm_gic_irq_generate_software_irq( return sc; } +/** + * This architecture-specific function sets the exception vector for handling IRQs. + */ +void aarch_interrupt_facility_set_exception_handler(void); + +/** + * This architecture-specific function dispatches a triggered IRQ. + * + * @param[in] vector The vector on which the IRQ occurred. + */ +void aarch_interrupt_handler_dispatch(rtems_vector_number vector); + static inline uint32_t arm_gic_irq_processor_count(void) { volatile gic_dist *dist = ARM_GIC_DIST; diff --git a/bsps/arm/include/bsp/arm-gic-regs.h b/bsps/include/bsp/arm-gic-regs.h similarity index 100% rename from bsps/arm/include/bsp/arm-gic-regs.h rename to bsps/include/bsp/arm-gic-regs.h diff --git a/bsps/arm/include/bsp/arm-gic-tm27.h b/bsps/include/bsp/arm-gic-tm27.h similarity index 100% rename from bsps/arm/include/bsp/arm-gic-tm27.h rename to bsps/include/bsp/arm-gic-tm27.h diff --git a/bsps/arm/include/bsp/arm-gic.h b/bsps/include/bsp/arm-gic.h similarity index 100% rename from bsps/arm/include/bsp/arm-gic.h rename to bsps/include/bsp/arm-gic.h diff --git a/bsps/arm/shared/irq/irq-gicv3.c b/bsps/shared/irq/irq-arm-gicv3.c similarity index 87% rename from bsps/arm/shared/irq/irq-gicv3.c rename to bsps/shared/irq/irq-arm-gicv3.c index 138b565b9b..2f527d5daf 100644 --- a/bsps/arm/shared/irq/irq-gicv3.c +++ b/bsps/shared/irq/irq-arm-gicv3.c @@ -27,16 +27,41 @@ #include <bsp/arm-gic.h> -#include <rtems/score/armv4.h> - -#include <libcpu/arm-cp15.h> - #include <bsp/irq.h> +#include <bsp/irq-arch.h> #include <bsp/irq-generic.h> #include <bsp/start.h> #define PRIORITY_DEFAULT 127 +#define MPIDR_AFFINITY2(val) BSP_FLD64(val, 16, 23) +#define MPIDR_AFFINITY2_GET(reg) BSP_FLD64GET(reg, 16, 23) +#define MPIDR_AFFINITY2_SET(reg, val) BSP_FLD64SET(reg, val, 16, 23) +#define MPIDR_AFFINITY1(val) BSP_FLD64(val, 8, 15) +#define MPIDR_AFFINITY1_GET(reg) BSP_FLD64GET(reg, 8, 15) +#define MPIDR_AFFINITY1_SET(reg, val) BSP_FLD64SET(reg, val, 8, 15) +#define MPIDR_AFFINITY0(val) BSP_FLD64(val, 0, 7) +#define MPIDR_AFFINITY0_GET(reg) BSP_FLD64GET(reg, 0, 7) +#define MPIDR_AFFINITY0_SET(reg, val) BSP_FLD64SET(reg, val, 0, 7) + +#define ICC_SGIR_AFFINITY3(val) BSP_FLD64(val, 48, 55) +#define ICC_SGIR_AFFINITY3_GET(reg) BSP_FLD64GET(reg, 48, 55) +#define ICC_SGIR_AFFINITY3_SET(reg, val) BSP_FLD64SET(reg, val, 48, 55) +#define ICC_SGIR_IRM BSP_BIT32(40) +#define ICC_SGIR_AFFINITY2(val) BSP_FLD64(val, 32, 39) +#define ICC_SGIR_AFFINITY2_GET(reg) BSP_FLD64GET(reg, 32, 39) +#define ICC_SGIR_AFFINITY2_SET(reg, val) BSP_FLD64SET(reg, val, 32, 39) +#define ICC_SGIR_INTID(val) BSP_FLD64(val, 24, 27) +#define ICC_SGIR_INTID_GET(reg) BSP_FLD64GET(reg, 24, 27) +#define ICC_SGIR_INTID_SET(reg, val) BSP_FLD64SET(reg, val, 24, 27) +#define ICC_SGIR_AFFINITY1(val) BSP_FLD64(val, 16, 23) +#define ICC_SGIR_AFFINITY1_GET(reg) BSP_FLD64GET(reg, 16, 23) +#define ICC_SGIR_AFFINITY1_SET(reg, val) BSP_FLD64SET(reg, val, 16, 23) +#define ICC_SGIR_CPU_TARGET_LIST(val) BSP_FLD64(val, 0, 15) +#define ICC_SGIR_CPU_TARGET_LIST_GET(reg) BSP_FLD64GET(reg, 0, 15) +#define ICC_SGIR_CPU_TARGET_LIST_SET(reg, val) BSP_FLD64SET(reg, val, 0, 15) + +#ifdef ARM_MULTILIB_ARCH_V4 /* cpuif->iccicr */ #define ICC_CTLR "p15, 0, %0, c12, c12, 4" @@ -60,40 +85,8 @@ #define ICC_IGRPEN0 "p15, 0, %0, c12, c12, 6" #define ICC_IGRPEN1 "p15, 0, %0, c12, c12, 7" -#define ICC_SGI1 "p15, 0, %Q0, %R0, c12" - -#define ICC_SGIR_AFFINITY3(val) BSP_FLD64(val, 48, 55) -#define ICC_SGIR_AFFINITY3_GET(reg) BSP_FLD64GET(reg, 48, 55) -#define ICC_SGIR_AFFINITY3_SET(reg, val) BSP_FLD64SET(reg, val, 48, 55) -#define ICC_SGIR_IRM BSP_BIT32(40) -#define ICC_SGIR_AFFINITY2(val) BSP_FLD64(val, 32, 39) -#define ICC_SGIR_AFFINITY2_GET(reg) BSP_FLD64GET(reg, 32, 39) -#define ICC_SGIR_AFFINITY2_SET(reg, val) BSP_FLD64SET(reg, val, 32, 39) -#define ICC_SGIR_INTID(val) BSP_FLD64(val, 24, 27) -#define ICC_SGIR_INTID_GET(reg) BSP_FLD64GET(reg, 24, 27) -#define ICC_SGIR_INTID_SET(reg, val) BSP_FLD64SET(reg, val, 24, 27) -#define ICC_SGIR_AFFINITY1(val) BSP_FLD64(val, 16, 23) -#define ICC_SGIR_AFFINITY1_GET(reg) BSP_FLD64GET(reg, 16, 23) -#define ICC_SGIR_AFFINITY1_SET(reg, val) BSP_FLD64SET(reg, val, 16, 23) -#define ICC_SGIR_CPU_TARGET_LIST(val) BSP_FLD64(val, 0, 15) -#define ICC_SGIR_CPU_TARGET_LIST_GET(reg) BSP_FLD64GET(reg, 0, 15) -#define ICC_SGIR_CPU_TARGET_LIST_SET(reg, val) BSP_FLD64SET(reg, val, 0, 15) - #define MPIDR "p15, 0, %0, c0, c0, 5" -#define MPIDR_AFFINITY3(val) BSP_FLD64(val, 25, 29) -#define MPIDR_AFFINITY3_GET(reg) BSP_FLD64GET(reg, 25, 29) -#define MPIDR_AFFINITY3_SET(reg, val) BSP_FLD64SET(reg, val, 25, 29) -#define MPIDR_AFFINITY2(val) BSP_FLD64(val, 16, 23) -#define MPIDR_AFFINITY2_GET(reg) BSP_FLD64GET(reg, 16, 23) -#define MPIDR_AFFINITY2_SET(reg, val) BSP_FLD64SET(reg, val, 16, 23) -#define MPIDR_AFFINITY1(val) BSP_FLD64(val, 8, 15) -#define MPIDR_AFFINITY1_GET(reg) BSP_FLD64GET(reg, 8, 15) -#define MPIDR_AFFINITY1_SET(reg, val) BSP_FLD64SET(reg, val, 8, 15) -#define MPIDR_AFFINITY0(val) BSP_FLD64(val, 0, 7) -#define MPIDR_AFFINITY0_GET(reg) BSP_FLD64GET(reg, 0, 7) -#define MPIDR_AFFINITY0_SET(reg, val) BSP_FLD64SET(reg, val, 0, 7) - #define READ_SR(SR_NAME) \ ({ \ uint32_t value; \ @@ -104,9 +97,41 @@ #define WRITE_SR(SR_NAME, VALUE) \ __asm__ volatile("mcr " SR_NAME " \n" : : "r" (VALUE) ); +#define ICC_SGI1 "p15, 0, %Q0, %R0, c12" #define WRITE64_SR(SR_NAME, VALUE) \ __asm__ volatile("mcrr " SR_NAME " \n" : : "r" (VALUE) ); +#else /* ARM_MULTILIB_ARCH_V4 */ + +/* AArch64 GICv3 registers are not named in GCC */ +#define ICC_IGRPEN0 "S3_0_C12_C12_6, %0" +#define ICC_IGRPEN1 "S3_0_C12_C12_7, %0" +#define ICC_PMR "S3_0_C4_C6_0, %0" +#define ICC_EOIR1 "S3_0_C12_C12_1, %0" +#define ICC_SRE "S3_0_C12_C12_5, %0" +#define ICC_BPR0 "S3_0_C12_C8_3, %0" +#define ICC_CTLR "S3_0_C12_C12_4, %0" +#define ICC_IAR1 "%0, S3_0_C12_C12_0" +#define MPIDR "%0, mpidr_el1" +#define MPIDR_AFFINITY3(val) BSP_FLD64(val, 32, 39) +#define MPIDR_AFFINITY3_GET(reg) BSP_FLD64GET(reg, 32, 39) +#define MPIDR_AFFINITY3_SET(reg, val) BSP_FLD64SET(reg, val, 32, 39) + +#define ICC_SGI1 "S3_0_C12_C11_5, %0" +#define WRITE64_SR(SR_NAME, VALUE) \ + __asm__ volatile("msr " SR_NAME " \n" : : "r" (VALUE) ); +#define WRITE_SR(SR_NAME, VALUE) WRITE64_SR(SR_NAME, VALUE) + +#define READ_SR(SR_NAME) \ +({ \ + uint64_t value; \ + __asm__ volatile("mrs " SR_NAME : "=&r" (value) ); \ + value; \ +}) + + +#endif /* ARM_MULTILIB_ARCH_V4 */ + #define ARM_GIC_REDIST ((volatile gic_redist *) BSP_ARM_GIC_REDIST_BASE) #define ARM_GIC_SGI_PPI (((volatile gic_sgi_ppi *) ((char*)BSP_ARM_GIC_REDIST_BASE + (1 << 16)))) @@ -117,10 +142,7 @@ void bsp_interrupt_dispatch(void) rtems_vector_number spurious = 1023; if (vector != spurious) { - uint32_t psr = _ARMV4_Status_irq_enable(); - bsp_interrupt_handler_dispatch(vector); - - _ARMV4_Status_restore(psr); + aarch_interrupt_handler_dispatch(vector); WRITE_SR(ICC_EOIR1, icciar); } @@ -199,10 +221,7 @@ rtems_status_code bsp_interrupt_facility_initialize(void) uint32_t id_count = get_id_count(dist); uint32_t id; - arm_cp15_set_exception_handler( - ARM_EXCEPTION_IRQ, - _ARMV4_Exception_interrupt - ); + aarch_interrupt_facility_set_exception_handler(); dist->icddcr = GIC_DIST_ICDDCR_ARE_NS | GIC_DIST_ICDDCR_ARE_S | GIC_DIST_ICDDCR_ENABLE_GRP1S | GIC_DIST_ICDDCR_ENABLE_GRP1NS @@ -319,11 +338,18 @@ void arm_gic_trigger_sgi( * ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST, * ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_EXCEPT_SELF, * ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF */ - uint32_t mpidr = READ_SR(MPIDR); - uint64_t value = ICC_SGIR_AFFINITY3(MPIDR_AFFINITY3_GET(mpidr)) - | ICC_SGIR_AFFINITY2(MPIDR_AFFINITY2_GET(mpidr)) +#ifndef ARM_MULTILIB_ARCH_V4 + uint64_t mpidr; +#else + uint32_t mpidr; +#endif + mpidr = READ_SR(MPIDR); + uint64_t value = ICC_SGIR_AFFINITY2(MPIDR_AFFINITY2_GET(mpidr)) | ICC_SGIR_INTID(vector) | ICC_SGIR_AFFINITY1(MPIDR_AFFINITY1_GET(mpidr)) | ICC_SGIR_CPU_TARGET_LIST(1); +#ifndef ARM_MULTILIB_ARCH_V4 + value |= ICC_SGIR_AFFINITY3(MPIDR_AFFINITY3_GET(mpidr)); +#endif WRITE64_SR(ICC_SGI1, value); } diff --git a/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml b/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml index abe3d7f490..bf628c8685 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml @@ -34,6 +34,7 @@ install: - bsps/arm/altera-cyclone-v/include/bsp/hwlib.h - bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h - bsps/arm/altera-cyclone-v/include/bsp/irq.h + - bsps/arm/include/bsp/irq-arch.h - destination: ${BSP_INCLUDEDIR}/bsp/socal source: - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_acpidmap.h diff --git a/spec/build/bsps/arm/atsam/bspatsam.yml b/spec/build/bsps/arm/atsam/bspatsam.yml index f0aaa17cf7..8cb16053e3 100644 --- a/spec/build/bsps/arm/atsam/bspatsam.yml +++ b/spec/build/bsps/arm/atsam/bspatsam.yml @@ -32,6 +32,7 @@ install: - bsps/arm/atsam/include/bsp/power.h - bsps/arm/atsam/include/bsp/sc16is752.h - bsps/arm/atsam/include/bsp/spi.h + - bsps/arm/include/bsp/irq-arch.h - destination: ${BSP_INCLUDEDIR}/libchip source: - bsps/arm/atsam/include/libchip/chip.h diff --git a/spec/build/bsps/arm/beagle/obj.yml b/spec/build/bsps/arm/beagle/obj.yml index 87c0ad873d..634bd63d3b 100644 --- a/spec/build/bsps/arm/beagle/obj.yml +++ b/spec/build/bsps/arm/beagle/obj.yml @@ -20,6 +20,7 @@ install: - bsps/arm/beagle/include/bsp/i2c.h - bsps/arm/beagle/include/bsp/irq.h - bsps/arm/beagle/include/bsp/spi.h + - bsps/arm/include/bsp/irq-arch.h - destination: ${BSP_LIBDIR} source: - bsps/arm/beagle/start/linkcmds diff --git a/spec/build/bsps/arm/csb336/bspcsb336.yml b/spec/build/bsps/arm/csb336/bspcsb336.yml index 2842b0d5ac..475b487e6f 100644 --- a/spec/build/bsps/arm/csb336/bspcsb336.yml +++ b/spec/build/bsps/arm/csb336/bspcsb336.yml @@ -18,6 +18,7 @@ install: - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/csb336/include/bsp/irq.h + - bsps/arm/include/bsp/irq-arch.h - destination: ${BSP_LIBDIR} source: - bsps/arm/csb336/start/linkcmds diff --git a/spec/build/bsps/arm/csb337/obj.yml b/spec/build/bsps/arm/csb337/obj.yml index c541cfc207..36b194a280 100644 --- a/spec/build/bsps/arm/csb337/obj.yml +++ b/spec/build/bsps/arm/csb337/obj.yml @@ -26,6 +26,7 @@ install: - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/csb337/include/bsp/irq.h + - bsps/arm/include/bsp/irq-arch.h - destination: ${BSP_LIBDIR} source: - bsps/arm/csb337/start/linkcmds.csb337 diff --git a/spec/build/bsps/arm/edb7312/bspedb7312.yml b/spec/build/bsps/arm/edb7312/bspedb7312.yml index aa73f7a51b..dbef0b961c 100644 --- a/spec/build/bsps/arm/edb7312/bspedb7312.yml +++ b/spec/build/bsps/arm/edb7312/bspedb7312.yml @@ -18,6 +18,7 @@ install: - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/edb7312/include/bsp/irq.h + - bsps/arm/include/bsp/irq-arch.h - destination: ${BSP_LIBDIR} source: - bsps/arm/edb7312/start/linkcmds diff --git a/spec/build/bsps/arm/grp.yml b/spec/build/bsps/arm/grp.yml index b6fcb56a25..9dc7984d05 100644 --- a/spec/build/bsps/arm/grp.yml +++ b/spec/build/bsps/arm/grp.yml @@ -22,10 +22,10 @@ install: - bsps/arm/include/bsp/arm-a9mpcore-start.h - bsps/arm/include/bsp/arm-cp15-start.h - bsps/arm/include/bsp/arm-errata.h - - bsps/arm/include/bsp/arm-gic-irq.h - - bsps/arm/include/bsp/arm-gic-regs.h - - bsps/arm/include/bsp/arm-gic-tm27.h - - bsps/arm/include/bsp/arm-gic.h + - bsps/include/bsp/arm-gic-irq.h + - bsps/include/bsp/arm-gic-regs.h + - bsps/include/bsp/arm-gic-tm27.h + - bsps/include/bsp/arm-gic.h - bsps/arm/include/bsp/arm-pl050-regs.h - bsps/arm/include/bsp/arm-pl050.h - bsps/arm/include/bsp/arm-pl111-fb.h diff --git a/spec/build/bsps/arm/gumstix/bspgumstix.yml b/spec/build/bsps/arm/gumstix/bspgumstix.yml index 49b809561f..38dffbd148 100644 --- a/spec/build/bsps/arm/gumstix/bspgumstix.yml +++ b/spec/build/bsps/arm/gumstix/bspgumstix.yml @@ -19,6 +19,7 @@ install: - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/gumstix/include/bsp/irq.h + - bsps/arm/include/bsp/irq-arch.h - destination: ${BSP_LIBDIR} source: - bsps/arm/gumstix/start/linkcmds diff --git a/spec/build/bsps/arm/imx/bspimx.yml b/spec/build/bsps/arm/imx/bspimx.yml index f1f679f8d7..34a3abba26 100644 --- a/spec/build/bsps/arm/imx/bspimx.yml +++ b/spec/build/bsps/arm/imx/bspimx.yml @@ -30,6 +30,7 @@ install: - bsps/arm/imx/include/bsp/imx-gpio.h - bsps/arm/imx/include/bsp/irq.h - bsps/include/bsp/clock-arm-generic-timer.h + - bsps/arm/include/bsp/irq-arch.h - destination: ${BSP_LIBDIR} source: - bsps/arm/imx/start/linkcmds diff --git a/spec/build/bsps/arm/lm3s69xx/obj.yml b/spec/build/bsps/arm/lm3s69xx/obj.yml index 5e01ce7a61..37a6f9efb7 100644 --- a/spec/build/bsps/arm/lm3s69xx/obj.yml +++ b/spec/build/bsps/arm/lm3s69xx/obj.yml @@ -16,6 +16,7 @@ install: source: - bsps/arm/lm3s69xx/include/bsp/io.h - bsps/arm/lm3s69xx/include/bsp/irq.h + - bsps/arm/include/bsp/irq-arch.h - bsps/arm/lm3s69xx/include/bsp/lm3s69xx.h - bsps/arm/lm3s69xx/include/bsp/ssi.h - bsps/arm/lm3s69xx/include/bsp/syscon.h diff --git a/spec/build/bsps/arm/lpc176x/obj.yml b/spec/build/bsps/arm/lpc176x/obj.yml index c77a7ce404..b451e716ee 100644 --- a/spec/build/bsps/arm/lpc176x/obj.yml +++ b/spec/build/bsps/arm/lpc176x/obj.yml @@ -14,6 +14,7 @@ install: - bsps/arm/lpc176x/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: + - bsps/arm/include/bsp/irq-arch.h - bsps/arm/lpc176x/include/bsp/adc-defs.h - bsps/arm/lpc176x/include/bsp/adc.h - bsps/arm/lpc176x/include/bsp/can-defs.h diff --git a/spec/build/bsps/arm/lpc24xx/obj.yml b/spec/build/bsps/arm/lpc24xx/obj.yml index 43bdf40820..62d5dade69 100644 --- a/spec/build/bsps/arm/lpc24xx/obj.yml +++ b/spec/build/bsps/arm/lpc24xx/obj.yml @@ -14,6 +14,7 @@ install: - bsps/arm/lpc24xx/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: + - bsps/arm/include/bsp/irq-arch.h - bsps/arm/lpc24xx/include/bsp/dma.h - bsps/arm/lpc24xx/include/bsp/i2c.h - bsps/arm/lpc24xx/include/bsp/io.h diff --git a/spec/build/bsps/arm/lpc32xx/obj.yml b/spec/build/bsps/arm/lpc32xx/obj.yml index 70ee86302c..ca980e87e1 100644 --- a/spec/build/bsps/arm/lpc32xx/obj.yml +++ b/spec/build/bsps/arm/lpc32xx/obj.yml @@ -14,6 +14,7 @@ install: - bsps/arm/lpc32xx/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: + - bsps/arm/include/bsp/irq-arch.h - bsps/arm/lpc32xx/include/bsp/boot.h - bsps/arm/lpc32xx/include/bsp/emc.h - bsps/arm/lpc32xx/include/bsp/hsu.h diff --git a/spec/build/bsps/arm/raspberrypi/obj.yml b/spec/build/bsps/arm/raspberrypi/obj.yml index a120d8007b..9c964aae70 100644 --- a/spec/build/bsps/arm/raspberrypi/obj.yml +++ b/spec/build/bsps/arm/raspberrypi/obj.yml @@ -14,6 +14,7 @@ install: - bsps/arm/raspberrypi/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: + - bsps/arm/include/bsp/irq-arch.h - bsps/arm/raspberrypi/include/bsp/fbcons.h - bsps/arm/raspberrypi/include/bsp/i2c.h - bsps/arm/raspberrypi/include/bsp/irq.h diff --git a/spec/build/bsps/arm/realview-pbx-a9/bsprealviewpbxa9.yml b/spec/build/bsps/arm/realview-pbx-a9/bsprealviewpbxa9.yml index 9b24f8eae2..49a7b48121 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/bsprealviewpbxa9.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/bsprealviewpbxa9.yml @@ -16,6 +16,7 @@ install: - bsps/arm/realview-pbx-a9/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: + - bsps/arm/include/bsp/irq-arch.h - bsps/arm/realview-pbx-a9/include/bsp/console.h - bsps/arm/realview-pbx-a9/include/bsp/irq.h - destination: ${BSP_LIBDIR} diff --git a/spec/build/bsps/arm/rtl22xx/obj.yml b/spec/build/bsps/arm/rtl22xx/obj.yml index 1889f0d842..fd66b4c322 100644 --- a/spec/build/bsps/arm/rtl22xx/obj.yml +++ b/spec/build/bsps/arm/rtl22xx/obj.yml @@ -15,6 +15,7 @@ install: - bsps/arm/rtl22xx/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: + - bsps/arm/include/bsp/irq-arch.h - bsps/arm/rtl22xx/include/bsp/irq.h - destination: ${BSP_LIBDIR} source: diff --git a/spec/build/bsps/arm/smdk2410/bspsmdk2410.yml b/spec/build/bsps/arm/smdk2410/bspsmdk2410.yml index 3b15c7ca91..f4d1ce4471 100644 --- a/spec/build/bsps/arm/smdk2410/bspsmdk2410.yml +++ b/spec/build/bsps/arm/smdk2410/bspsmdk2410.yml @@ -20,6 +20,7 @@ install: - bsps/arm/smdk2410/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: + - bsps/arm/include/bsp/irq-arch.h - bsps/arm/smdk2410/include/bsp/irq.h - destination: ${BSP_LIBDIR} source: diff --git a/spec/build/bsps/arm/stm32f4/obj.yml b/spec/build/bsps/arm/stm32f4/obj.yml index 22b73177cd..181326d27f 100644 --- a/spec/build/bsps/arm/stm32f4/obj.yml +++ b/spec/build/bsps/arm/stm32f4/obj.yml @@ -14,6 +14,7 @@ install: - bsps/arm/stm32f4/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: + - bsps/arm/include/bsp/irq-arch.h - bsps/arm/stm32f4/include/bsp/i2c.h - bsps/arm/stm32f4/include/bsp/io.h - bsps/arm/stm32f4/include/bsp/irq.h diff --git a/spec/build/bsps/arm/tms570/obj.yml b/spec/build/bsps/arm/tms570/obj.yml index 8e5b665a78..e393a43c77 100644 --- a/spec/build/bsps/arm/tms570/obj.yml +++ b/spec/build/bsps/arm/tms570/obj.yml @@ -14,6 +14,7 @@ install: - bsps/arm/tms570/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: + - bsps/arm/include/bsp/irq-arch.h - bsps/arm/tms570/include/bsp/irq.h - bsps/arm/tms570/include/bsp/system-clocks.h - bsps/arm/tms570/include/bsp/tms570-pinmux.h diff --git a/spec/build/bsps/arm/xen/bspxen.yml b/spec/build/bsps/arm/xen/bspxen.yml index 4bd86b5c60..506423d642 100644 --- a/spec/build/bsps/arm/xen/bspxen.yml +++ b/spec/build/bsps/arm/xen/bspxen.yml @@ -18,6 +18,7 @@ install: source: - bsps/arm/xen/include/bsp/irq.h - bsps/include/bsp/clock-arm-generic-timer.h + - bsps/arm/include/bsp/irq-arch.h links: - role: build-dependency uid: ../grp diff --git a/spec/build/bsps/arm/xilinx-zynq/obj.yml b/spec/build/bsps/arm/xilinx-zynq/obj.yml index 6f7f8ab39a..5224cb3bf0 100644 --- a/spec/build/bsps/arm/xilinx-zynq/obj.yml +++ b/spec/build/bsps/arm/xilinx-zynq/obj.yml @@ -14,6 +14,7 @@ install: - bsps/arm/xilinx-zynq/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: + - bsps/arm/include/bsp/irq-arch.h - bsps/arm/xilinx-zynq/include/bsp/cadence-i2c-regs.h - bsps/arm/xilinx-zynq/include/bsp/cadence-i2c.h - bsps/arm/xilinx-zynq/include/bsp/i2c.h diff --git a/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml b/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml index 67bd1b0dd3..1070cdf425 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml @@ -18,6 +18,7 @@ install: source: - bsps/arm/xilinx-zynqmp/include/bsp/irq.h - bsps/include/bsp/clock-arm-generic-timer.h + - bsps/arm/include/bsp/irq-arch.h links: - role: build-dependency uid: ../grp -- 2.20.1 _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel