I read this discussion, and it's pretty fascinating. I just want to
point out that "linear address" and "linear address space" are both
terms defined in Intel documentation for the address you get after
doing segmentation but before paging. Just to further complicate the
choice of terminology. :)
On 28.03.23 07:53, Chris Johns wrote:
On 23/3/2023 3:59 am, Sebastian Huber wrote:
Hello Chris,
I would like to come back to this topic, because it blocks the integration of
the sparc/gr712rc and sparc/gr740 changes we have done for the pre-qualification
activity.
On 27.09.21 02:23, Chris
On 23/3/2023 3:59 am, Sebastian Huber wrote:
> Hello Chris,
>
> I would like to come back to this topic, because it blocks the integration of
> the sparc/gr712rc and sparc/gr740 changes we have done for the
> pre-qualification
> activity.
>
> On 27.09.21 02:23, Chris Johns wrote:
>> On 24/9/21
Hello Chris,
I would like to come back to this topic, because it blocks the
integration of the sparc/gr712rc and sparc/gr740 changes we have done
for the pre-qualification activity.
On 27.09.21 02:23, Chris Johns wrote:
On 24/9/21 11:09 pm, Sebastian Huber wrote:
A register block may be
On 24/9/21 11:09 pm, Sebastian Huber wrote:
> A register block may be used to specify the interface of devices which
> use a linear address space. Register blocks consist of register block
Can we please move away from the "linear address" in the definitions? As stated
previously it only serves a
A register block may be used to specify the interface of devices which
use a linear address space. Register blocks consist of register block
members specified by the ``definition`` attribute. Register block
members are either instances of registers specified by the ``registers``
attribute or
