--- c/src/lib/libbsp/riscv32/hifive1/clock/clock.c | 60 ++++++++++++++++++++++++ c/src/lib/libbsp/riscv32/hifive1/include/fe310.h | 5 +- c/src/lib/libbsp/riscv32/hifive1/include/irq.h | 6 ++- c/src/lib/libbsp/riscv32/hifive1/irq/irq.c | 4 +- 4 files changed, 71 insertions(+), 4 deletions(-) create mode 100644 c/src/lib/libbsp/riscv32/hifive1/clock/clock.c
diff --git a/c/src/lib/libbsp/riscv32/hifive1/clock/clock.c b/c/src/lib/libbsp/riscv32/hifive1/clock/clock.c new file mode 100644 index 0000000..ce20663 --- /dev/null +++ b/c/src/lib/libbsp/riscv32/hifive1/clock/clock.c @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2017 Denis Obrezkov <denisobrez...@gmail.com> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include <bsp/irq.h> +#include <bsp/fatal.h> +#include <bsp/fe310.h> + +static void FE310_clock_driver_support_install_isr( + rtems_isr_entry Clock_isr +) +{ + rtems_status_code sc = RTEMS_SUCCESSFUL; + + sc = rtems_interrupt_handler_install( + 1, + "Clock", + RTEMS_INTERRUPT_UNIQUE, + (rtems_interrupt_handler) Clock_isr, + NULL + ); + if ( sc != RTEMS_SUCCESSFUL ) { + rtems_fatal_error_occurred(0xdeadbeef); + } +} + +static void FE310_clock_driver_support_at_tick ( void ) +{ + (*MTIMECMP) += FE310_CLOCK_PERIOD; +} + +static void FE310_clock_init ( void ) +{ + (*MTIMECMP) = (*MTIME) + FE310_CLOCK_PERIOD; + enable_mtime_interrupts(); +} + +static void FE310_clock_driver_support_shutdown_hardware( void ) +{ +} + +#define Clock_driver_support_initialize_hardware() \ + FE310_clock_init() + +#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER + +#define Clock_driver_support_install_isr(isr,old) \ + FE310_clock_driver_support_install_isr ( isr ) + +#define Clock_driver_support_at_tick() \ + FE310_clock_driver_support_at_tick() + +#define Clock_driver_support_shutdown_hardware() \ + FE310_clock_driver_support_shutdown_hardware() + +#include "../../../shared/clockdrv_shell.h" diff --git a/c/src/lib/libbsp/riscv32/hifive1/include/fe310.h b/c/src/lib/libbsp/riscv32/hifive1/include/fe310.h index c73db99..e32bc38 100644 --- a/c/src/lib/libbsp/riscv32/hifive1/include/fe310.h +++ b/c/src/lib/libbsp/riscv32/hifive1/include/fe310.h @@ -23,8 +23,11 @@ #define USE_PLL /* Clock parameters */ +/* + * FIXME: 512 is a good value just to try out the BSP, + * but additional configuration is required + */ #define FE310_CLOCK_PERIOD 512 -#define CONFIGURE_MICROSECONDS_PER_TICK 15625 #endif /* FE310_H */ diff --git a/c/src/lib/libbsp/riscv32/hifive1/include/irq.h b/c/src/lib/libbsp/riscv32/hifive1/include/irq.h index 46d29c7..8f44089 100644 --- a/c/src/lib/libbsp/riscv32/hifive1/include/irq.h +++ b/c/src/lib/libbsp/riscv32/hifive1/include/irq.h @@ -47,7 +47,6 @@ #define BSP_INTERRUPT_VECTOR_MIN 0x0 #define BSP_INTERRUPT_VECTOR_MAX 0x24 - #define MCAUSE_INT 0x80000000 #define MCAUSE_MSWI 0x3 @@ -65,5 +64,10 @@ #define MTIME ((volatile uint64_t *)0x0200bff8) #define MSIP_REG ((volatile uint32_t *) 0x02000000) +static inline void enable_mtime_interrupts() { + asm volatile ("li t0, 0x80\n\t" + "csrs mie, t0"); +} + #endif /* ASM */ #endif /* LIBBSP_GENERIC_RISCV_IRQ_H */ diff --git a/c/src/lib/libbsp/riscv32/hifive1/irq/irq.c b/c/src/lib/libbsp/riscv32/hifive1/irq/irq.c index fadfdb7..7d7a80b 100644 --- a/c/src/lib/libbsp/riscv32/hifive1/irq/irq.c +++ b/c/src/lib/libbsp/riscv32/hifive1/irq/irq.c @@ -70,8 +70,8 @@ void handle_trap (uint32_t cause) if (cause & MCAUSE_INT) { /* an interrupt occurred */ if ((cause & MCAUSE_MTIME) == MCAUSE_MTIME) { - /* Timer interrupt */ - (*MTIMECMP) = (*MTIME) + FE310_CLOCK_PERIOD; + /* Timer interrupt */ + /* TODO: Proper (not manual) dispatching should be implemented */ bsp_interrupt_handler_table[1].handler(bsp_interrupt_handler_table[1].arg); } else if ((cause & MCAUSE_MEXT) == MCAUSE_MEXT) { /*External interrupt */ -- 2.1.4 _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel