Hello,
I'm a newbie to devicetrees, and am trying to understand and create device tree
for a new powerpc platform. My questions:
1) For a PCI-PCI bridge that I'm representing like this:
pcie@2,3 {
vendor-id = <0x10b5>;
device-id = <0x8618>;
class-code = <0x060400>;
#s
On Fri, Dec 6, 2013 at 3:45 PM, Tim Kryger wrote:
> Add the DTS nodes for all the i2c busses in the SoC.
>
> Signed-off-by: Tim Kryger
> Reviewed-by: Christian Daudt
> Reviewed-by: Matt Porter
> Reviewed-by: Markus Mayer
> ---
> arch/arm/boot/dts/bcm11351.dtsi | 40 +++
Applied to armsoc/for-3.14/dt
thanks,
csd
On Thu, Dec 5, 2013 at 11:20 AM, Tim Kryger wrote:
> Declare clocks that are enabled and configured by bootloaders as fixed
> rate clocks in the DTS such that device drivers may use standard clock
> function calls.
>
> Signed-off-by: Tim Kryger
> R
This device tree binding document describes the Tegra124 pincontrol
DT bindings. This document lists all valid properties, names, mux
options of Tegra124 pins.
Signed-off-by: Laxman Dewangan
Acked-by: Stephen Warren
---
Changes from V1:
- Referred the dt-binding header file on describing the no
Applied to armsoc/for-3.14/dt
thanks,
csd
On Fri, Dec 6, 2013 at 3:45 PM, Tim Kryger wrote:
> Enable all available i2c busses.
>
> Signed-off-by: Tim Kryger
> Reviewed-by: Christian Daudt
> Reviewed-by: Matt Porter
> Reviewed-by: Markus Mayer
> ---
> arch/arm/boot/dts/bcm28155-ap.dts |
Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.
This patch adds the device tree nodes to the DT device list.
Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.
Signed-off-by: Leela Krishna Amuda
Hi Lorenzo,
Lorenzo Pieralisi writes:
> + - latency
> + Usage: Required
> + Value type:
> + Definition: Worst case latency in microseconds required to
> + enter and exit the C-state.
> +
> + - min-residency
> + Usage
Exynos5420 has 5 TMU channels, the TRIMINFO register is
misplaced for TMU channels 2, 3 and 4
TRIMINFO at 0x1006c000 contains data for TMU channel 3
TRIMINFO at 0x100a contains data for TMU channel 4
TRIMINFO at 0x10068000 contains data for TMU channel 2
This patch
1 Adds the neccessary regist
On Exynos5440 and Exynos5420 there are registers common
across the TMU channels.
To support that, we introduced a ADDRESS_MULTIPLE flag in the
driver and the 2nd set of register base and size are provided
in the "reg" property of the node.
As per Amit's suggestion, this patch changes the base_com
This patch replaces the inten_rise_shift/mask and inten_fall_shift/mask
with intclr_rise_shift/mask and intclr_fall_shift/mask respectively.
Currently, inten_rise_shift/mask and inten_fall_shift/mask bits are only used
to configure intclr related registers.
Description of H/W:
The offset for the b
This patchset does a little clean up of the existing code (linux-soc-thermal)
1. [v11] thermal: samsung: replace inten_ bit fields with intclr_
2. [v11] thermal: samsung: change base_common to more meaningful base_second
adds support for Exynos5420 in the driver and (linux-soc-thermal)
3. [v11]
Added PMIC node to Arndale-Octa board.
Signed-off-by: Sachin Kamat
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 220 +
1 file changed, 220 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
in
On Monday 09 December 2013 11:12 PM, Tony Lindgren wrote:
* Sourav Poddar [131206 06:29]:
These add device tree entry for qspi controller driver on dra7.
FYI these .dts changes need to be queued separately by Benoit and
should be posted as a seprate series in general to avoid confusion.
Ok,
On Tue, 2013-12-10 at 01:25 +0100, Arnd Bergmann wrote:
> We never intentionally break things that people are using, but there are
> cases where doing blind changes is the best way forward. We should
> always try to find people to test patches on real hardware if possible,
> which is only possible
On Tue, Dec 10, 2013 at 1:48 AM, Florian Fainelli wrote:
> 2013/12/8 Chen-Yu Tsai :
>> Florian, Giuseppe:
>>
>> On Sat, Dec 7, 2013 at 9:57 AM, Florian Fainelli
>> wrote:
>>> 2013/12/6 Chen-Yu Tsai :
On Sat, Dec 7, 2013 at 5:09 AM, Florian Fainelli
wrote:
> 2013/12/6 Chen-Yu Tsai
Hi Grant, Rob,
On Sun, 24 Nov 2013, Grant Likely wrote:
> On Fri, 22 Nov 2013 17:50:35 -0800, Tony Lindgren wrote:
> > * Tony Lindgren [131122 17:16]:
> > > * Tony Lindgren [131122 17:09]:
> > > > * Russell King - ARM Linux [131122 16:56]:
> > > > > On Fri, Nov 22, 2013 at 04:43:35PM -0800, T
* John W. Linville [131115 06:46]:
> On Thu, Nov 14, 2013 at 03:22:18PM -0800, Tony Lindgren wrote:
> > * Sebastian Reichel [131114 15:04]:
> > > On Thu, Nov 14, 2013 at 10:51:33AM -0800, Tony Lindgren wrote:
> > > > [...]
> > > >
> > > > If this is not going into v3.13, these will cause conflict
Hi Kamil,
Same USB2.0 PHY may be used by several HCDs, for example EHCI and OHCI.
Consider the situation, when EHCI stops using the PHY and calls power_off,
then OHCI becomes non-operational. In other words, PHY power_on and
power_off calls must be balanced.
Shall we handle it in your driver? (u
Hi Thierry,
On 12/03/2013 11:09 AM, Bo Shen wrote:
+atmel_pwm->chip.of_xlate = of_pwm_xlate_with_flags;
+atmel_pwm->chip.of_pwm_n_cells = 3;
+atmel_pwm->chip.base = -1;
+} else {
+atmel_pwm->chip.base = pdev->id;
That's not correct. The chip cannot be tied t
On Mon, Dec 09, 2013 at 09:20:08PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 12/09/2013 09:31 AM, Peter Chen wrote:
>
> >After clear portsc.phcd, PHY needs 200us stable time for switch
> >32K clock to AHB clock.
>
> >Signed-off-by: Peter Chen
> >---
> > drivers/usb/phy/phy-mxs-usb.c | 11
On Mon, Dec 09, 2013 at 10:52:33AM +0100, Marc Kleine-Budde wrote:
> On 12/09/2013 10:07 AM, Peter Chen wrote:
> > On Mon, Dec 09, 2013 at 09:38:17AM +0100, Marc Kleine-Budde wrote:
> >> On 12/09/2013 07:30 AM, Peter Chen wrote:
> >>> Some PHY bugs are fixed by IC logic, but these bits are not
> >>
On 12/10/2013 02:40 AM, Olof Johansson wrote:
On Sun, Dec 08, 2013 at 03:13:57PM +0100, Sebastian Hesselbarth wrote:
Hopefully last round of initial support patches for Marvell Berlin SoCs
before I can send the final PR for v3.14.
Compared to last version sent, this patch set has now a Reviewed
Hi,
On Sun, Dec 08, 2013 at 03:13:57PM +0100, Sebastian Hesselbarth wrote:
> Hopefully last round of initial support patches for Marvell Berlin SoCs
> before I can send the final PR for v3.14.
>
> Compared to last version sent, this patch set has now a Reviewed-by from
> Thomas Gleixner for the i
On Fri 06 Dec 14:22 PST 2013, Stephen Boyd wrote:
> > +config PINCTRL_MSM8X74
> > + bool "Qualcomm 8x74 pin controller driver"
> > + select PINCTRL_MSM
>
> No help?
>
I could write something up, although I guess someone will add a
select PINCTRL_MSM8X74 in the mach-msm Kconfig and then we'r
Hi Thomas,
before respinning the complete series, I thought we could take a look at
the changes to the timer core, since I expect them to need to be refined
for an actual submission.
The first patch is the patch you proposed to serialize callers of
clockevents_update_freq(). I guess you may find
To adjust the timer's interval in periodic mode, the clockevent device
is put into periodic mode during clockevents_update_freq() in case the
timer is in periodic mode.
Cc: Thomas Gleixner
Signed-off-by: Soren Brinkmann
---
kernel/time/clockevents.c | 9 ++---
1 file changed, 6 insertions(+
From: Thomas Gleixner
We can identify the broadcast device in the core and serialize all
callers including interrupts on a different CPU against the update.
Also, disabling interrupts is moved into the core allowing callers to
leave interrutps enabled when calling clockevents_update_freq().
Cc:
On Mon 09 Dec 13:37 PST 2013, Stephen Boyd wrote:
> On 12/09/13 00:18, Linus Walleij wrote:
> > On Fri, Dec 6, 2013 at 11:22 PM, Stephen Boyd wrote:
> >> On 12/05/13 18:10, Bjorn Andersson wrote:
> > As the driver is merged I expect fixes to come in as additional patches.
> >
> >>> Add initial de
On Monday 09 December 2013, Sergei Ianovich wrote:
> On Mon, 2013-12-09 at 11:21 +0100, Daniel Mack wrote:
> > On 12/09/2013 10:34 AM, Sergei Ianovich wrote:
> > > Nice to have Daniel in this conversation. Your patch series is a big and
> > > important work. However, I am not sure I will ever land
On Monday, December 09, 2013 at 09:15:11 PM, Stefan Agner wrote:
> Fix bindings for STMPE touchscreen device to match the documented
> bindings and the actual bindings used by the driver.
>
> Signed-off-by: Stefan Agner
> ---
> I don't have any of these hardware, but the error is obvious. The dev
On Fri 06 Dec 13:40 PST 2013, Stephen Boyd wrote:
> General nitpick: There seems to be a lot of checks for invalid input in
> the op functions. I hope that they're all unnecessary debugging that can
> be removed.
>
Most of them checks that a gpio number is not larger than the number of
pingroup
* Sebastian Reichel [131209 10:25]:
> On Mon, Dec 09, 2013 at 09:46:38AM -0800, Tony Lindgren wrote:
> > > +Optional properties:
> > > + - ti,fuzz-x : integer, X noise value of the
> > > touchscreen
> > > + (defaults to 4)
> > > + - ti,fuzz-y
On Nov 26, 2013, at 10:27 AM, Grygorii Strashko
wrote:
> On 11/22/2013 11:04 PM, Kumar Gala wrote:
>>
>> On Nov 20, 2013, at 9:46 AM, Ivan Khoronzhuk wrote:
>>
>>> Add bindings for AEMIF controller drivers/memory/ti-aemif.c
>>>
>>
>> Binding shouldn’t normally refer to code.
>>
>> Just sa
From: Stephen Warren
This ensures that the PMIC RTC provides the system time, rather than
the on-SoC RTC, which is not battery-backed.
Signed-off-by: Stephen Warren
---
This patch is just an example. If the previous two patches are accepted,
I'll flesh this patch out to cover all boards, and re
From: Stephen Warren
Assign RTC device IDs based on device tree /aliases entries if present,
falling back to the existing numbering scheme if there is no /aliases
entry (which includes when the system isn't booted using DT), or there
is a numbering conflict.
This is useful in systems with multip
From: Stephen Warren
mfd_add_device() assigns .of_node in the device objects it creates only
if the mfd_cell for the device has the .of_compatible field set and the
DT node for the top-level MFD device contains a child whose compatible
property matches the cell's .of_compatible field.
This leave
Craneboard is a hardware development platform based on the Sitara
AM3517 ARM Cortex - A8 microprocessor device - see [1] for more
details. Add basic devices for craneboard as replacement for the board
file scheduled for removal as part of device tree conversion
[1] http://craneboard.org
Signed-of
On 12/09/13 00:18, Linus Walleij wrote:
> On Fri, Dec 6, 2013 at 11:22 PM, Stephen Boyd wrote:
>> On 12/05/13 18:10, Bjorn Andersson wrote:
> As the driver is merged I expect fixes to come in as additional patches.
>
>>> Add initial definition of parameters for pinctrl-msm for the msm8x74
>>> plat
Hi Kukjin,
On Tuesday 10 of December 2013 06:15:08 Kukjin Kim wrote:
> On 11/19/13 22:05, Naveen Krishna Chatradhi wrote:
> > Exynos5420 SoC has per core thermal management unit.
> > 5 TMU channels 4 for CPUs and 5th for GPU.
> >
> > This patch adds the device tree nodes to the DT device list.
> >
On 12/05/13 18:44, Sachin Kamat wrote:
Added regulator entries to Exynos5420 SMDK board.
Signed-off-by: Sachin Kamat
---
Changes since v1:
Changed node name
---
arch/arm/boot/dts/exynos5420-smdk5420.dts | 216 +
1 file changed, 216 insertions(+)
diff --git a/arch
The Haoyu Microelectronics HYM8563 provides rtc- and alarm functions
as well as a clock output of up to 32kHz.
Signed-off-by: Heiko Stuebner
---
drivers/rtc/Kconfig | 11 +
drivers/rtc/Makefile |1 +
drivers/rtc/rtc-hym8563.c | 601 +
Add binding documentation for the hym8563 rtc chip.
Signed-off-by: Heiko Stuebner
---
.../devicetree/bindings/rtc/haoyu,hym8563.txt | 27
.../devicetree/bindings/vendor-prefixes.txt|1 +
2 files changed, 28 insertions(+)
create mode 100644 Documentation/d
This series adds support for the Haoyu Microelectronics HYM8563 rtc. This
chip is often used in designs around the Cortex-A9 SoCs from Rockchip to
provide rtc functionality and the 32kHz suspend clock the SoC needs.
changes since v3:
- follow suggestion from Mark Brown to use the interrupt without
On 11/19/13 22:05, Naveen Krishna Chatradhi wrote:
Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.
This patch adds the device tree nodes to the DT device list.
Nodes carry the misplaced second base address and the second
clock to access the mispla
On Monday 09 December 2013, boris brezillon wrote:
> Are you talking about drivers or clk binding documentation ?
> In either cases they're not defined :-), but I'd like to know which
> file(s) I should update.
I mean bindings for the devices using these clocks. Each of them should
list among its
On 12/10/13 01:16, Doug Anderson wrote:
Yuvaraj,
On Sun, Dec 8, 2013 at 10:38 PM, Yuvaraj Kumar C D wrote:
Commit 0c3de788 ("ARM: dts: change status property of dwmmc nodes
for exynos5250") missed out handling the exynos5250 snow dts file.
Signed-off-by : Abhilash Kesavan
Signed-off-by: Yuva
On 12/10/13 01:19, Doug Anderson wrote:
Yuvaraj,
On Sun, Dec 8, 2013 at 10:38 PM, Yuvaraj Kumar C D wrote:
Commit 64c138a ("ARM: dts: Move fifo-depth property from exynos5250
board dts") missed out handling the exynos5250 snow dts file.
Deletes the fifo-depth property, as this property has bee
On 12/10/13 01:34, Tomasz Figa wrote:
Hi Vyacheslav, Tarek,
On Tuesday 26 of November 2013 12:58:06 Vyacheslav Tyrtov wrote:
From: Tarek Dakhran
The EXYNOS5410 clocks are statically listed and registered
using the Samsung specific common clock helper functions.
Signed-off-by: Tarek Dakhran
Si
On 12/10/13 01:37, Tomasz Figa wrote:
Hi Sachin,
On Thursday 28 of November 2013 16:08:01 Sachin Kamat wrote:
Arndale Octa board is based on Exynos5420 SoC. This patch
adds the basic support required for booting it through DT.
Signed-off-by: Sachin Kamat
---
arch/arm/boot/dts/Makefile
Fix bindings for STMPE touchscreen device to match the documented
bindings and the actual bindings used by the driver.
Signed-off-by: Stefan Agner
---
I don't have any of these hardware, but the error is obvious. The device
probably works anyway since the device/driver will use default values.
--
On Sat, Dec 07, 2013 at 12:47:39PM +0100, Olliver Schinagl wrote:
> Hey maxime,
> On 06-12-13 19:33, Maxime Ripard wrote:
> >Hi Oliver,
> >
> >On Wed, Dec 04, 2013 at 01:10:55PM +0100, oli...@schinagl.nl wrote:
> >>From: Oliver Schinagl
> >>
> >>This patch adds sunxi sata support to A10 and A20 bo
Hi,
On 12/09/2013 06:56 PM, Chen-Yu Tsai wrote:
Hi,
On Tue, Dec 10, 2013 at 12:16 AM, Hans de Goede wrote:
Hi,
On 12/09/2013 12:10 PM, srinivas kandagatla wrote:
Hi Chen,
Good to know that Allwinner uses gmac.
On ST SoC, we have very similar requirements, before we merge any of
these cha
On Fri, 2013-12-06 at 13:14 +, Mark Brown wrote:
> From: Mark Brown
>
> The clock-frequency property is meaningless for the models but it's a
> mandatory property so claim that all the cores run at 1MHz.
Is it a mandatory property? I know we seem to get ugly warnings if it's
missing but I se
On 12/09/2013 03:32 AM, Laxman Dewangan wrote:
> From: Ashwini Ghuge
>
> This adds a driver for the Tegra124 pinmux, and required
> parameterization data for Tegra124.
>
> The driver uses the common Tegra pincontrol driver utility
> functions to implement the majority of the driver.
>
> This dr
On Mon, Dec 09, 2013 at 09:46:38AM -0800, Tony Lindgren wrote:
> > +Optional properties:
> > + - ti,fuzz-x : integer, X noise value of the
> > touchscreen
> > + (defaults to 4)
> > + - ti,fuzz-y : integer, Y noise value of the
> >
On 12/09/2013 10:48 AM, Mark Rutland wrote:
> On Mon, Dec 09, 2013 at 05:39:42PM +, Stephen Warren wrote:
>> On 12/09/2013 03:51 AM, Mark Rutland wrote:
>>> On Mon, Dec 09, 2013 at 10:32:19AM +, Laxman Dewangan wrote:
This device tree binding document describes the Tegra124 pincontrol
On Wed, Nov 27, 2013 at 04:54:20PM +0100, Denis Carikli wrote:
> Signed-off-by: Denis Carikli
Applied, thanks. The way you split [PATCHv8][ 1/5] is a bit odd, as is
the space there.
signature.asc
Description: Digital signature
On Mon, Dec 09, 2013 at 05:56:05PM +, Jon Medhurst (Tixy) wrote:
> On Fri, 2013-12-06 at 13:14 +, Mark Brown wrote:
> > The clock-frequency property is meaningless for the models but it's a
> > mandatory property so claim that all the cores run at 1MHz.
> Is it a mandatory property? I kno
* Tomi Valkeinen [131209 04:46]:
> On 2013-12-05 19:05, Tony Lindgren wrote:
> > * Tomi Valkeinen [131204 04:31]:
> >
> > Description missing.. But other than that can you please check that
> > the latest patch I posted in thread "[PATCH] ARM: OMAP2+: Fix populating
> > the hwmod data from devic
On Thu, Dec 05, 2013 at 01:39:05PM +0200, Baruch Siach wrote:
> Commit 743179849015 (of_spi: add generic binding support to specify cs gpio)
> introduced generic binding for gpio chip-select. The cs_gpio struct field,
> however, is an internal implementation detail of the Linux SPI subsystem, and
>
Hi,
On Tue, Dec 10, 2013 at 12:16 AM, Hans de Goede wrote:
> Hi,
>
>
> On 12/09/2013 12:10 PM, srinivas kandagatla wrote:
>>
>> Hi Chen,
>> Good to know that Allwinner uses gmac.
>>
>> On ST SoC, we have very similar requirements, before we merge any of
>> these changes I think we need to come up
On Mon, Dec 09, 2013 at 05:39:42PM +, Stephen Warren wrote:
> On 12/09/2013 03:51 AM, Mark Rutland wrote:
> > On Mon, Dec 09, 2013 at 10:32:19AM +, Laxman Dewangan wrote:
> >> This device tree binding document describes the Tegra124 pincontrol
> >> DT bindings. This document lists all valid
2013/12/8 Chen-Yu Tsai :
> Florian, Giuseppe:
>
> On Sat, Dec 7, 2013 at 9:57 AM, Florian Fainelli wrote:
>> 2013/12/6 Chen-Yu Tsai :
>>> On Sat, Dec 7, 2013 at 5:09 AM, Florian Fainelli
>>> wrote:
2013/12/6 Chen-Yu Tsai :
> The CubieTruck uses the GMAC with an RGMII phy.
>
> Si
* Sebastian Reichel [131205 15:11]:
> Add devicetree binding documentation for TSC2005 touchscreen.
>
> Signed-off-by: Sebastian Reichel
> ---
> .../bindings/input/touchscreen/tsc2005.txt | 49
> ++
> 1 file changed, 49 insertions(+)
> create mode 100644
> Documen
On Fri, Dec 06, 2013 at 11:02:49AM +0100, Lars-Peter Clausen wrote:
> This patch adds the devicetree documentation for the ADI AXI-SPDIF audio
> controller. The controller has:
Applied all, thanks.
signature.asc
Description: Digital signature
* Sourav Poddar [131206 06:29]:
> These add device tree entry for qspi controller driver on dra7.
FYI these .dts changes need to be queued separately by Benoit and
should be posted as a seprate series in general to avoid confusion.
Regards,
Tony
> Signed-off-by: Sourav Poddar
> ---
> v1->v2:
On 12/09/2013 03:51 AM, Mark Rutland wrote:
> On Mon, Dec 09, 2013 at 10:32:19AM +, Laxman Dewangan wrote:
>> This device tree binding document describes the Tegra124 pincontrol
>> DT bindings. This document lists all valid properties, names, mux
>> options of Tegra124 pins.
>>
>> Signed-off-by
Hi,
On Mon, Dec 9, 2013 at 7:10 PM, srinivas kandagatla
wrote:
> Hi Chen,
> Good to know that Allwinner uses gmac.
To my knowledge, Allwinner has never confirmed this.
> On ST SoC, we have very similar requirements, before we merge any of
> these changes I think we need to come up with common w
On 12/02/2013 05:48 PM, Alexandre Courbot wrote:
> On Tue, Nov 26, 2013 at 9:10 AM, Olof Johansson wrote:
>> On Sun, Nov 24, 2013 at 03:30:45PM +0900, Alexandre Courbot wrote:
>>> New rebase that should be ready-to-apply on the latest Tegra tree. The last
>>> remaining blocker is Russell's approva
Hello.
On 12/09/2013 09:31 AM, Peter Chen wrote:
After clear portsc.phcd, PHY needs 200us stable time for switch
32K clock to AHB clock.
Signed-off-by: Peter Chen
---
drivers/usb/phy/phy-mxs-usb.c | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/drive
On Mon, Dec 09, 2013 at 11:22:44AM +0100, Linus Walleij wrote:
> On Thu, Dec 5, 2013 at 4:07 PM, Mark Brown wrote:
> > Or should we be going and applying the default state to all devices on
> > init without worrying about a driver appearing?
> That doesn't really work: if you have an unused devi
Hi Heiko,
On Tuesday 03 of December 2013 16:23:09 Heiko Stübner wrote:
> Starting with the s3c2443 the s3c24xx series got a new clock tree
> compared to the previous s3c24xx socs. This binding describes the
> clock controller found in the s3c2443, s3c2416 and s3c2450 socs.
>
> Signed-off-by: Heik
On 09/12/2013 17:48, Arnd Bergmann wrote:
On Monday 09 December 2013, boris brezillon wrote:
Hello Arnd,
On 09/12/2013 16:48, Arnd Bergmann wrote:
On Monday 09 December 2013, boris brezillon wrote:
You are adding "clock-names" properties in a lot of cases. Are you sure you
are using the strin
On Wed, Nov 06, 2013 at 04:56:45PM +0100, Georgi Djakov wrote:
> This platform driver adds the initial support of Secure
> Digital Host Controller Interface compliant controller
> found in Qualcomm MSM chipsets.
>
> Signed-off-by: Georgi Djakov
[...]
> +static int sdhci_msm_probe(struct platform_
Hi Tomi,
On Mon, Dec 9, 2013 at 4:30 PM, Tomi Valkeinen wrote:
> On 2013-12-09 17:09, Javier Martinez Canillas wrote:
>> Hi Tomi,
>>
>> On Mon, Dec 9, 2013 at 1:56 PM, Tomi Valkeinen wrote:
>>> On 2013-12-06 10:57, Javier Martinez Canillas wrote:
>>>
> + tfp410: encoder@0 {
> +
On Monday 09 December 2013, boris brezillon wrote:
> Hello Arnd,
>
> On 09/12/2013 16:48, Arnd Bergmann wrote:
> > On Monday 09 December 2013, boris brezillon wrote:
> >>> You are adding "clock-names" properties in a lot of cases. Are you sure
> >>> you
> >>> are using the strings that are docume
David,
On Thursday 05 December 2013 12:25 PM, Ivan Khoronzhuk wrote:
> This series contains fixes and updates of Davinci nand driver in
> order to reuse it for Keystone platform.
>
> v2..v3:
> - mtd: nand: davinci: don't set timings if AEMIF is used
> dropped, it would be replaced by alone
On Monday 09 December 2013, Sergei Ianovich wrote:
> anovich wrote:
> > On Mon, 2013-12-09 at 02:47 +0100, Arnd Bergmann wrote:
> > > On Sunday 08 December 2013, Sergei Ianovich wrote:
> > > > +
> > > > +#ifdef CONFIG_PXA27x
> > > > +extern void __init pxa27x_dt_init_irq(void);
> >
> > > > +static
Hi Sachin,
On Thursday 28 of November 2013 16:08:01 Sachin Kamat wrote:
> Arndale Octa board is based on Exynos5420 SoC. This patch
> adds the basic support required for booting it through DT.
>
> Signed-off-by: Sachin Kamat
> ---
> arch/arm/boot/dts/Makefile|1 +
> arch
Kumar,
On Tuesday 26 November 2013 11:27 AM, Grygorii Strashko wrote:
> On 11/22/2013 11:04 PM, Kumar Gala wrote:
>>
>> On Nov 20, 2013, at 9:46 AM, Ivan Khoronzhuk wrote:
>>
>>> Add bindings for AEMIF controller drivers/memory/ti-aemif.c
>>>
>>
>> Binding shouldn’t normally refer to code.
>>
>>
Hi Vyacheslav, Tarek,
On Tuesday 26 of November 2013 12:58:06 Vyacheslav Tyrtov wrote:
> From: Tarek Dakhran
>
> The EXYNOS5410 clocks are statically listed and registered
> using the Samsung specific common clock helper functions.
>
> Signed-off-by: Tarek Dakhran
> Signed-off-by: Vyacheslav T
On Wed, Oct 02, 2013 at 04:17:51PM -0700, Mike Turquette wrote:
> Quoting Sören Brinkmann (2013-10-02 10:20:38)
> > Hi Mike,
> >
> > could you please comment on this/apply it to clk-next?
>
> It looks good and is in the queue. Will show up in clk-next in a few
> days.
>
What happened with this d
Wim,
On Wednesday 04 December 2013 02:39 PM, Ivan Khoronzhuk wrote:
> These patches are intended to update Davinci watchdog to use WDT core
> and reuse driver for keystone arch, because Keystone uses the similar
> IP like Davinci.
>
[..]
> v4..v5:
> - watchdog: davinci: change driver to use WDT
On Monday 09 December 2013, Sergei Ianovich wrote:
> On Mon, 2013-12-09 at 02:47 +0100, Arnd Bergmann wrote:
> > On Sunday 08 December 2013, Sergei Ianovich wrote:
> > > +
> > > +#ifdef CONFIG_PXA27x
> > > +extern void __init pxa27x_dt_init_irq(void);
>
> > This is not the right place to put an 'e
Yuvaraj,
On Sun, Dec 8, 2013 at 10:38 PM, Yuvaraj Kumar C D wrote:
> Commit 64c138a ("ARM: dts: Move fifo-depth property from exynos5250
> board dts") missed out handling the exynos5250 snow dts file.
> Deletes the fifo-depth property, as this property has been moved to
> SOC specific exynos5250.
Hi,
On 12/09/2013 12:10 PM, srinivas kandagatla wrote:
Hi Chen,
Good to know that Allwinner uses gmac.
On ST SoC, we have very similar requirements, before we merge any of
these changes I think we need to come up with common way to solve both
Allwinner and ST SOCs use cases.
I have already pos
Hello Arnd,
On 09/12/2013 16:48, Arnd Bergmann wrote:
On Monday 09 December 2013, boris brezillon wrote:
You are adding "clock-names" properties in a lot of cases. Are you sure you
are using the strings that are documented in the respective device bindings
for each name? In a lot of cases, driv
Yuvaraj,
On Sun, Dec 8, 2013 at 10:38 PM, Yuvaraj Kumar C D wrote:
> Commit 0c3de788 ("ARM: dts: change status property of dwmmc nodes
> for exynos5250") missed out handling the exynos5250 snow dts file.
>
> Signed-off-by : Abhilash Kesavan
>
> Signed-off-by: Yuvaraj Kumar C D
> ---
> arch/arm
On Mon, 2013-12-09 at 19:16 +0400, Sergei Ianovich wrote:
> On Mon, 2013-12-09 at 02:47 +0100, Arnd Bergmann wrote:
> > On Sunday 08 December 2013, Sergei Ianovich wrote:
> > > +
> > > +#ifdef CONFIG_PXA27x
> > > +extern void __init pxa27x_dt_init_irq(void);
>
> > > +static void __init pxa27x_init
On Monday 09 December 2013, boris brezillon wrote:
> > You are adding "clock-names" properties in a lot of cases. Are you sure you
> > are using the strings that are documented in the respective device bindings
> > for each name? In a lot of cases, drivers just want an anonymous clock
> > and we do
Hi,
On Mon, Dec 9, 2013 at 9:44 PM, Sergei Shtylyov
wrote:
> Hello.
>
>
> On 09-12-2013 15:21, srinivas kandagatla wrote:
>
>>> +static int sun7i_gmac_init(struct platform_device *pdev)
>>> +{
>>> + struct resource *res;
>>> + struct device *dev = &pdev->dev;
>>> + void __iomem
On 2013-12-09 17:09, Javier Martinez Canillas wrote:
> Hi Tomi,
>
> On Mon, Dec 9, 2013 at 1:56 PM, Tomi Valkeinen wrote:
>> On 2013-12-06 10:57, Javier Martinez Canillas wrote:
>>
+ tfp410: encoder@0 {
+ compatible = "ti,tfp410";
+ gpios = <&gpio1
On Mon, 2013-12-09 at 02:47 +0100, Arnd Bergmann wrote:
> On Sunday 08 December 2013, Sergei Ianovich wrote:
> > +
> > +#ifdef CONFIG_PXA27x
> > +extern void __init pxa27x_dt_init_irq(void);
> This is not the right place to put an 'extern' declaration, it should go into
> a header file if it's rea
Hi Tomi,
On Mon, Dec 9, 2013 at 1:56 PM, Tomi Valkeinen wrote:
> On 2013-12-06 10:57, Javier Martinez Canillas wrote:
>
>>> + tfp410: encoder@0 {
>>> + compatible = "ti,tfp410";
>>> + gpios = <&gpio1 0 0>; /* 0, power-down */
>>> +
>>
>> Please use the constant
Hello.
On 09-12-2013 15:21, srinivas kandagatla wrote:
+static int sun7i_gmac_init(struct platform_device *pdev)
+{
+ struct resource *res;
+ struct device *dev = &pdev->dev;
+ void __iomem *addr = NULL;
+ struct plat_stmmacenet_data *plat_dat = NULL;
No need to ini
Hi,
> From: Kishon Vijay Abraham I [mailto:kis...@ti.com]
> Sent: Monday, December 09, 2013 8:56 AM
>
> Hi,
>
> On Friday 06 December 2013 09:58 PM, Kamil Debski wrote:
> > Hi Kishon,
> >
> > Thank you for the review.
> >
> >> From: Kishon Vijay Abraham I [mailto:kis...@ti.com]
> >> Sent: Frida
On Mon, 2013-12-09 at 11:21 +0100, Daniel Mack wrote:
> On 12/09/2013 10:34 AM, Sergei Ianovich wrote:
> > On Mon, 2013-12-09 at 10:04 +0100, Daniel Mack wrote:
> >> On 12/09/2013 02:33 AM, Arnd Bergmann wrote:
> >>> It hasn't made it upstream yet, but see
> >>> http://list-archives.org/2013/08/07
Hi Naveen,
On Tuesday 12 of November 2013 12:07:48 Naveen Krishna Chatradhi wrote:
> Exynos5420 SoC has per core thermal management unit.
> 5 TMU channels 4 for CPUs and 5th for GPU.
>
> This patch adds the device tree nodes to the DT device list.
>
> Nodes carry the misplaced second base addres
On Fri, Dec 6, 2013 at 12:54 AM, Stephen Warren wrote:
> On 12/03/2013 02:29 AM, Linus Walleij wrote:
(skipped the conversation on weak hogs, we are on the same page
here, just waiting for someone to start working on it ...)
> Related, I prefer to put /all/ static pinctrl configuration into the
On 2013-12-06 10:57, Javier Martinez Canillas wrote:
>> + tfp410: encoder@0 {
>> + compatible = "ti,tfp410";
>> + gpios = <&gpio1 0 0>; /* 0, power-down */
>> +
>
> Please use the constants from include/dt-bindings/ instead of magic
> numbers, i.e:
>
> gpios =
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