On Thursday, February 06, 2014 7:18 PM, Liviu Dudau wrote:
On Wed, Feb 05, 2014 at 10:26:27PM +, Tanmay Inamdar wrote:
Hello Liviu,
I did not get the first email of this particular patch on any of
subscribed mailing lists (don't know why), hence replying here.
Strange, it shows in
On
-Original Message-
From: Jingoo Han [mailto:jg1@samsung.com]
Sent: Thursday, February 13, 2014 5:10 PM
To: 'Liviu Dudau'; 'Tanmay Inamdar'
Cc: 'Arnd Bergmann'; devicetree@vger.kernel.org; 'linaro-kernel';
'linux-pci'; 'Will Deacon'; 'LKML';
'Catalin Marinas'; 'Bjorn
Why is the devicetree list not on CC? (Added now)
On Thu, Feb 06, 2014 at 10:51:25AM +0100, Maxime Ripard wrote:
Switch the device tree to the new compatibles introduced in the i2c drivers
to have a common pattern accross all Allwinner SoCs.
Signed-off-by: Maxime Ripard
Hi Morimoto-san,
On Thu, Feb 13, 2014 at 8:11 AM, Kuninori Morimoto
kuninori.morimoto...@gmail.com wrote:
could you test this series as Geert does not have access to a bockw board?
On Tue, Feb 11, 2014 at 09:56:47AM +0100, Geert Uytterhoeven wrote:
From: Geert Uytterhoeven
On Thu, Feb 13, 2014 at 12:10 AM, Jingoo Han jg1@samsung.com wrote:
On Thursday, February 06, 2014 7:18 PM, Liviu Dudau wrote:
On Wed, Feb 05, 2014 at 10:26:27PM +, Tanmay Inamdar wrote:
Hello Liviu,
I did not get the first email of this particular patch on any of
subscribed
On 28 January 2014 11:48, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 28 January 2014, Ulf Hansson wrote:
On 28 January 2014 01:59, Tomasz Figa tomasz.f...@gmail.com wrote:
On 27.01.2014 11:19, Ulf Hansson wrote:
There is already a host capability that I think we could use to handle
-Original Message-
From: Tanmay Inamdar [mailto:tinam...@apm.com]
Sent: Thursday, February 13, 2014 5:37 PM
To: Jingoo Han
Cc: Liviu Dudau; Arnd Bergmann; devicetree@vger.kernel.org; linaro-kernel;
linux-pci; Will Deacon;
LKML; Catalin Marinas; Bjorn Helgaas; LAKML
Subject: Re:
default-rate property can now be used to define default rates for clocks,
which get configured during boot.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prm_common.c |2 ++
drivers/clk/ti/clk.c |1 +
2 files changed, 3 insertions(+)
diff --git
Setup dpll_usb_ck and dpll_abe_ck using DT properties instead of hardcoding
the parents and rates in kernel.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/omap4.dtsi | 12
drivers/clk/ti/clk-44xx.c| 42 --
2 files
default-rate property can now be used to set initial rates for clocks.
This is added by default for all clocks which get initialized through
of_clk_init().
Signed-off-by: Tero Kristo t-kri...@ti.com
---
.../devicetree/bindings/clock/clock-bindings.txt |9 ++
drivers/clk/clk.c
On 13.02.2014 09:56, Ulf Hansson wrote:
On 28 January 2014 11:48, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 28 January 2014, Ulf Hansson wrote:
On 28 January 2014 01:59, Tomasz Figa tomasz.f...@gmail.com wrote:
On 27.01.2014 11:19, Ulf Hansson wrote:
There is already a host capability
Hi,
This set is a mix-match of new DT properties for generic and TI specific
clock drivers. Basically provided for commenting purposes. The patches
provide a way to configure clock parents / rates during boot through DT.
default-rate : sets rate of a clock during boot, supported for any DT
ti,mux-clock now supports ti,default-parent property, which can be used
to configure the default parent of the clock during boot. This property
can be added to board specific files, or under the clock data itself.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
Hi Geert
CC Simon
Thank you for your help
* Based on the value of the compatible property, this routine will attempt
* to choose an appropriate modalias value for a particular device tree node.
* It does this by stripping the manufacturer prefix (as delimited by a ',')
* from the first
Hi Arend,
On 10.02.2014 20:17, Arend van Spriel wrote:
The Broadcom bcm43xx sdio devices are fullmac devices that may be
integrated in ARM platforms. Currently, the brcmfmac driver for
these devices support use of platform data. This patch specifies
the bindings that allow this platform data to
Add bindings documentation for S2MPS14 device to the s2mps11 driver.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Cc: Mark Brown broo...@kernel.org
Cc: Liam Girdwood lgirdw...@gmail.com
Cc: Tomasz Figa t.f...@samsung.com
Cc: devicetree@vger.kernel.org
Cc: Rob Herring
Document the op_mode properties parsed from DTS by s2mps11 driver.
S2MPS11/S2MPS14 regulators support different modes of operation:
- Always off;
- On/Off controlled by pin/GPIO (PWREN/LDOEN/EMMCEN);
- Always on;
This is very similar to S5M8767 regulator driver which also supports
opmodes
Hi,
On Thu, Feb 13, 2014 at 5:13 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Arend,
On 10.02.2014 20:17, Arend van Spriel wrote:
The Broadcom bcm43xx sdio devices are fullmac devices that may be
integrated in ARM platforms. Currently, the brcmfmac driver for
these devices support use
The goal of this patch is to allow drivers to be probed even if at the time of
the DT parsing some of their ressources are not available yet.
In the current situation, the resource of a platform device are filled from the
DT at the time the device is created (of_device_alloc()). The drawbackof
Any comments on this?
On Sat, Feb 01, 2014 at 04:14:20PM +, Russell King - ARM Linux wrote:
On Thu, Jan 30, 2014 at 09:49:17PM +, Russell King - ARM Linux wrote:
On Sun, Jan 19, 2014 at 07:56:52PM -0800, Olof Johansson wrote:
This is a small series enhancing the MMC core code to
On Tue, Jan 28, 2014 at 11:48:10AM +0100, Arnd Bergmann wrote:
I think there is another option, which does have its own pros and cons:
We could move all the power handling back into the sdio function driver
if we allow a secondary detection path using DT rather than the probing
of the SDIO
Hi all,
I forgot to add the link to the discussion that lead to this patch:
https://lkml.org/lkml/2014/2/12/306.
Jean-Jacques
2014-02-13 10:57 GMT+01:00 Jean-Jacques Hiblot jjhib...@traphandler.com:
The goal of this patch is to allow drivers to be probed even if at the time of
the DT parsing
Florian Fainelli f.faine...@gmail.com :
[...]
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
new file mode 100644
index 000..6aea6e2
--- /dev/null
+++ b/drivers/net/phy/bcm7xxx.c
[...]
+static int bcm7445_config_init(struct phy_device *phydev)
+{
+ int ret;
It
Florian Fainelli f.faine...@gmail.com :
[...]
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
new file mode 100644
index 000..ab71e81
--- /dev/null
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
[...]
+static int
Signed-off-by: Adam Thomson adam.thomson.opensou...@diasemi.com
---
drivers/mfd/da9055-i2c.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/mfd/da9055-i2c.c b/drivers/mfd/da9055-i2c.c
index 8103e43..d4d4c16 100644
--- a/drivers/mfd/da9055-i2c.c
+++
This patch set adds DT support for the MFD core of the da9055 PMIC, and adds
the accompanying DT binding documentation for the device.
Adam Thomson (2):
mfd: da9055: Add DT support for PMIC
mfd: da9055: Add DT binding documentation for PMIC
Documentation/devicetree/bindings/mfd/da9055.txt |
Signed-off-by: Adam Thomson adam.thomson.opensou...@diasemi.com
---
Documentation/devicetree/bindings/mfd/da9055.txt | 73 ++
1 files changed, 73 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/da9055.txt
diff --git
On Thu, 2014-02-13 at 11:35 +0100, Francois Romieu wrote:
Florian Fainelli f.faine...@gmail.com :
[...]
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
[]
+static int bcmgenet_set_rx_csum(struct net_device *dev,
+
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.
Cc: devicetree@vger.kernel.org
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Signed-off-by: Lee
+- interrupts:
+ Usage: required
+ Value type: prop-encoded-array
Either provide an example or a comment to see the description of
#interrupt-cells
It is part of the example. We also state that the format is
defined by the interrupt parent binding.
Okay, fair enough.
+
On Thu, Feb 13, 2014 at 05:29:54AM +, Florian Fainelli wrote:
This patch adds the Device Tree bindings for the Broadcom GENET Gigabit
Ethernet controller. A bunch of examples are provided to illustrate the
versatile aspect of the hardare.
Signed-off-by: Florian Fainelli
On Thu, Feb 13, 2014 at 10:45:52AM +, Adam Thomson wrote:
Signed-off-by: Adam Thomson adam.thomson.opensou...@diasemi.com
Acked-by: Mark Brown broo...@kernel.org
signature.asc
Description: Digital signature
On Thursday 13 February 2014 17:57:41 Jingoo Han wrote:
I want to use 'drivers/pci/host/pcie-designware.c' for both arm32
and arm64, without any code changes. However, it looks impossible.
It is impossible at the moment, and I agree we have to fix that.
I made
Signed-off-by: Adam Thomson adam.thomson.opensou...@diasemi.com
---
drivers/mfd/da9055-i2c.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/mfd/da9055-i2c.c b/drivers/mfd/da9055-i2c.c
index 8103e43..d4d4c16 100644
--- a/drivers/mfd/da9055-i2c.c
On Thu, Feb 13, 2014 at 05:29:51AM +, Florian Fainelli wrote:
This patch adds the BCMGENET main driver file which supports the
following:
- GENET hardware from V1 to V4
- support for reading the UniMAC MIB counters statistics
- support for the 5 transmit queues
- support for RX/TX
On Thu, Feb 13, 2014 at 05:29:52AM +, Florian Fainelli wrote:
This patch adds support for configuring the port multiplexer hardware
which resides in front of the GENET Ethernet MAC controller. This allows
us to support:
- internal PHYs (using drivers/net/phy/bcm7xxx.c)
- MoCA PHYs which
On Thu, Feb 13, 2014 at 12:27:05PM +0100, Arnd Bergmann wrote:
I would rather get rid of struct hw_pci for architecture independent
drivers and add a different registration method on arm32 that is
compatible with what we come up with on arm64. The main purpose of
hw_pci is to allow multiple
On 02/13/2014 10:13 AM, Tomasz Figa wrote:
Hi Arend,
On 10.02.2014 20:17, Arend van Spriel wrote:
The Broadcom bcm43xx sdio devices are fullmac devices that may be
integrated in ARM platforms. Currently, the brcmfmac driver for
these devices support use of platform data. This patch
On Thursday 13 February 2014 11:53:27 Russell King - ARM Linux wrote:
On Thu, Feb 13, 2014 at 12:27:05PM +0100, Arnd Bergmann wrote:
I would rather get rid of struct hw_pci for architecture independent
drivers and add a different registration method on arm32 that is
compatible with what we
On Thu, Feb 13, 2014 at 08:57:41AM +, Jingoo Han wrote:
-Original Message-
From: Tanmay Inamdar [mailto:tinam...@apm.com]
Sent: Thursday, February 13, 2014 5:37 PM
To: Jingoo Han
Cc: Liviu Dudau; Arnd Bergmann; devicetree@vger.kernel.org; linaro-kernel;
linux-pci; Will
On Thu, Feb 13, 2014 at 11:03:14AM +, Lee Jones wrote:
The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.
Cc: devicetree@vger.kernel.org
Cc:
Hi,
Here is DT binding documentation for OMAP Display Subsystem. I've sent these
earlier as part of the whole DSS DT series, but I'm now sending them separately
to get comments for them.
These patches are essentially the same as what I already sent earlier. The only
difference is that I added
Add DT binding documentation for Analog TV Connector.
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
.../bindings/video/analog-tv-connector.txt | 23 ++
1 file changed, 23 insertions(+)
create mode 100644
Add device tree bindings for OMAP Display Subsystem for the following
SoCs: OMAP2, OMAP3, OMAP4.
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
.../devicetree/bindings/video/ti,omap-dss.txt | 203 +
.../devicetree/bindings/video/ti,omap2-dss.txt | 54 ++
Add DT binding documentation for tpd12s015 encoder
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
.../devicetree/bindings/video/ti,tpd12s015.txt | 44 ++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/video/ti,tpd12s015.txt
Add DT binding documentation for MIPI DSI Command Mode Panel.
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
.../devicetree/bindings/video/panel-dsi-cm.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644
Add DT binding documentation for HDMI Connector.
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
.../devicetree/bindings/video/hdmi-connector.txt | 23 ++
1 file changed, 23 insertions(+)
create mode 100644 Documentation/devicetree/bindings/video/hdmi-connector.txt
Add DT binding documentation for TFP410 encoder
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
.../devicetree/bindings/video/ti,tfp410.txt| 41 ++
1 file changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/video/ti,tfp410.txt
diff
Add DT binding documentation for Sony acx565akm panel
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
Reviewed-by: Sebastian Reichel s...@debian.org
---
.../devicetree/bindings/video/sony,acx565akm.txt | 28 ++
1 file changed, 28 insertions(+)
create mode 100644
Add DT binding documentation for MIPI DPI Panel.
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
.../devicetree/bindings/video/panel-dpi.txt| 43 ++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/video/panel-dpi.txt
On 13.02.2014 13:07, Arend van Spriel wrote:
On 02/13/2014 10:13 AM, Tomasz Figa wrote:
Hi Arend,
On 10.02.2014 20:17, Arend van Spriel wrote:
The Broadcom bcm43xx sdio devices are fullmac devices that may be
integrated in ARM platforms. Currently, the brcmfmac driver for
these devices
On Wed, Feb 12, 2014 at 05:43:04PM +0100, Philippe De Muyter wrote:
Thanks Shawn.
On Tue, Feb 11, 2014 at 10:50:11AM +0800, Shawn Guo wrote:
For imx6q-weim type of device, there might a WEIM CS space configuration
register in General Purpose Register controller, e.g. IOMUXC_GPR1 on
On Thursday 13 February 2014 10:42:48 Russell King - ARM Linux wrote:
What if we have a platform where things subtly change, like for instance,
the wiring on the SD slot to fix a problem with UHS-1 cards, which means
you don't have UHS-1 support for some platforms but do for others.
What
On Tue, Feb 11, 2014 at 12:37 PM, Mark Rutland mark.rutl...@arm.com wrote:
Currently the pl022 driver expects clocks, and dts provide them, yet the
binding does not mention clocks at all.
This patch adds a description of the clocks, apb_pclk (as required by
the primecell binding) and sspclk
For imx6q-weim type of device, there might a WEIM CS space configuration
register in General Purpose Register controller, e.g. IOMUXC_GPR1 on
i.MX6Q.
Depending on which configuration of the following 4 is chosen for given
system, IOMUXC_GPR1[11:0] should be set up as 05, 033, 0113 or 0
In panel_probe() the backlight node is never found, correct this.
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Anatolij Gustschin ag...@denx.de
Cc: Benoit Parrot bpar...@ti.com
Cc: Rob Clark robdcl...@gmail.com
Cc: David Airlie airl...@linux.ie
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob
On Tue, 2014-02-11 at 21:09 +0100, Richard Cochran wrote:
-#define EXT_EVENT 1
Regarding this EXT_EVENT thing ...
@@ -430,12 +419,12 @@ static int ptp_dp83640_enable(struct ptp_clock_info
*ptp,
switch (rq-type) {
case PTP_CLK_REQ_EXTTS:
index =
On Tue, 2014-02-11 at 21:19 +0100, Richard Cochran wrote:
+- dp83640,slave: If present, this phy will be slave to another dp83640
+ on the same mdio bus.
Wouldn't it be more natural to have one dp83640,master property
rather than multiple slave properties?
I wanted to keep the common
This patch series add DT configuration to the DP83640 PHY driver and makes
the configuration of periodic output pins dynamic.
Changes since v2:
- Add patch to properly configure perout triggers 0+1
- Keep extts and perout numbers separate
- Shorten pr_err lines
Changes since v1:
- Add
Periodic output triggers 0 and 1 of the dp83640 has a programmable
duty-cycle which is controlled by the Pulsewidth2 field of the trigger
data register. This field is not documented in the datasheet, but it
is described in the PHYTER Software Development Guide section
3.1.4.1. Failing to set the
This patch series add DT configuration to the DP83640 PHY driver and makes
the configuration of periodic output pins dynamic.
Changes since v2:
- Add patch to properly configure perout triggers 0+1
- Keep extts and perout numbers separate
- Shorten pr_err lines
Changes since v1:
- Add
The driver is currently limited to a single periodic output. This patch makes
the number of peridodic output dynamic by dropping the gpio_tab module
parameter and adding calibrate_pin, perout_pins, and extts_pins parameters.
Signed-off-by: Stefan Sørensen stefan.soren...@spectralink.com
---
The driver is currently limited to a single periodic output. This patch makes
the number of peridodic output dynamic by dropping the gpio_tab module
parameter and adding calibrate_pin, perout_pins, and extts_pins parameters.
Signed-off-by: Stefan Sørensen stefan.soren...@spectralink.com
---
Periodic output triggers 0 and 1 of the dp83640 has a programmable
duty-cycle which is controlled by the Pulsewidth2 field of the trigger
data register. This field is not documented in the datasheet, but it
is described in the PHYTER Software Development Guide section
3.1.4.1. Failing to set the
This patch adds configuration of the periodic output and external timestamp
pins available on the dp83640 family of PHYs. It also configures the
master/slave relationship in a group of PHYs on the same MDIO bus and the pins
used for clock calibration in the group.
The configuration is retrieved
This avoids the ... latency exceeded, new value ... warnings
emitted by the power domain framework code whenever the PU domain
is enabled or disabled.
Signed-off-by: Philipp Zabel p.za...@pengutronix.de
---
arch/arm/mach-imx/gpc.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
The PU regulator is enabled during boot, but not necessarily always-on.
It can be disabled by the generic pm domain framework when the PU power
domain is shut down. The ramp delay of 150 us might be a bit conservative,
the value is taken from the Freescale kernel.
Signed-off-by: Philipp Zabel
The PGC that is part of GPC controls isolation and power sequencing of the
power domains. The PU power domain will be handled by the generic pm domain
framework and needs a phandle to the PU regulator to turn off power when
the domain is disabled.
Signed-off-by: Philipp Zabel
When generic pm domain support is enabled, the PGC can be used
to completely gate power to the PU power domain containing GPU3D,
GPU2D, and VPU cores.
This code triggers the PGC powerdown sequence to disable the GPU/VPU
isolation cells and gate power and then disables the PU regulator.
To
The i.MX6Q can gate off the CPU and PU (GPU/VPU) power domains using the
Power Gating Controller (PGC) in the GPC register space. The CPU power
domain is already handled by wait state code, but the PU power domain can
be controlled using the generic power domain framework and power off the PU
The i.MX6 contains a power controller that controls power gating and
sequencing for the SoC's power domains.
Signed-off-by: Philipp Zabel p.za...@pengutronix.de
---
.../devicetree/bindings/power/fsl,imx-gpc.txt | 61 ++
1 file changed, 61 insertions(+)
create mode
On Thu, Feb 13, 2014 at 01:48:55PM +0100, Arnd Bergmann wrote:
On Thursday 13 February 2014 10:42:48 Russell King - ARM Linux wrote:
What if we have a platform where things subtly change, like for instance,
the wiring on the SD slot to fix a problem with UHS-1 cards, which means
you
This patch adds configuration of the periodic output and external timestamp
pins available on the dp83640 family of PHYs. It also configures the
master/slave relationship in a group of PHYs on the same MDIO bus and the pins
used for clock calibration in the group.
The configuration is retrieved
Hi,
On 13.02.2014 10:14, Krzysztof Kozlowski wrote:
Add bindings documentation for S2MPS14 device to the s2mps11 driver.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Cc: Mark Brown broo...@kernel.org
Cc: Liam Girdwood lgirdw...@gmail.com
Cc: Tomasz Figa t.f...@samsung.com
Cc:
The similar GPIO HW block is used by keystone SoCs as
in Davinci SoCs.
Hence, reuse Davinci GPIO driver for Keystone taking into
account that Keystone contains ARM GIC IRQ controller which
is implemented using IRQ Chip.
Documentation:
http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
Signed-off-by: Paolo Pisati paolo.pis...@canonical.com
---
arch/arm/boot/dts/omap4-panda-common.dtsi |9 -
arch/arm/boot/dts/omap4-panda-es.dts |3 ++-
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi
Signed-off-by: Paolo Pisati paolo.pis...@canonical.com
---
arch/arm/boot/dts/omap4-panda-common.dtsi |9 -
arch/arm/boot/dts/omap4-panda-es.dts |3 ++-
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi
On Thursday 13 February 2014 14:41:06 Russell King - ARM Linux wrote:
On Thu, Feb 13, 2014 at 01:48:55PM +0100, Arnd Bergmann wrote:
On Thursday 13 February 2014 10:42:48 Russell King - ARM Linux wrote:
What if we have a platform where things subtly change, like for instance,
the
From: Ivan T. Ivanov iiva...@mm-sol.com
Hi,
Following two patches are adding initial support for SPI controller
available in Qualcomm SoC's.
Controller initialization is based on spi_qsd driver available in
CAF repository.
Controller supports SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP
From: Ivan T. Ivanov iiva...@mm-sol.com
Qualcomm Universal Peripheral (QUP) core is an AHB slave that
provides a common data path (an output FIFO and an input FIFO)
for serial peripheral interface (SPI) mini-core. SPI in master
mode supports up to 50MHz, up to four chip selects, programmable
data
On Thu, Feb 13, 2014 at 01:35:41PM +0100, Tomasz Figa wrote:
On 13.02.2014 13:07, Arend van Spriel wrote:
On 02/13/2014 10:13 AM, Tomasz Figa wrote:
The BCM43xx WLAN chips I used to work always have been controlled by a
simple power enable GPIO of the chip itself. Has this changed in newer
Am Donnerstag, den 13.02.2014, 15:39 +0100 schrieb Philipp Zabel:
When generic pm domain support is enabled, the PGC can be used
to completely gate power to the PU power domain containing GPU3D,
GPU2D, and VPU cores.
This code triggers the PGC powerdown sequence to disable the GPU/VPU
Hi Mark,
2014-02-13 3:13 GMT-08:00 Mark Rutland mark.rutl...@arm.com:
On Thu, Feb 13, 2014 at 05:29:54AM +, Florian Fainelli wrote:
This patch adds the Device Tree bindings for the Broadcom GENET Gigabit
Ethernet controller. A bunch of examples are provided to illustrate the
versatile
Hi Mark,
2014-02-13 3:50 GMT-08:00 Mark Rutland mark.rutl...@arm.com:
On Thu, Feb 13, 2014 at 05:29:52AM +, Florian Fainelli wrote:
This patch adds support for configuring the port multiplexer hardware
which resides in front of the GENET Ethernet MAC controller. This allows
us to support:
The Power Management Unit Service block also controls the Coherency
Fabric subsystem. This new set of registers is needed for the CPU idle
implementation for the Armada XP, it allows to enter in a deep CPU
idle state where the Coherency Fabric and the L2 cache are powerdown.
Cc:
[adding devicetree, Grant, Rob]
Apologies to all those who aren't too bothered about the naming, I'm
going to derail this subthread for a general device tree policy
discussion.
On Thu, Feb 13, 2014 at 04:28:20PM +, Arnd Bergmann wrote:
On Thursday 13 February 2014 10:22:25 Kumar Gala wrote:
From: Florian Vaussard florian.vauss...@epfl.ch
When booting with a devicetree, no platform data is provided.
Do not prematurely exit iommu_enable() and iommu_disable() in
such a case.
Note: As OMAP do not yet has a proper reset controller driver,
IOMMUs requiring a reset signal should use
Hi,
This is an updated series to the initial OMAP IOMMU DT driver
adaptation series [1], that primarily dealt with just the OMAP3
ISP MMU. This series is based on 3.14-rc2, and the patches were
developed in collaboration with Florian. I am hoping that the
series can make the 3.15 merge window.
From: Florian Vaussard florian.vauss...@epfl.ch
omap_iommu_attach() returns NULL or ERR_PTR in case of error, but
omap_iommu_attach_dev() only checks for IS_ERR. Thus a NULL return value (in
case driver_find_device fails) will cause the kernel to panic when
omap_iommu_attach_dev() dereferences
From: Laurent Pinchart laurent.pinch...@ideasonboard.com
The OMAP IOMMU driver locates the IOMMU associated to a device using the
IOMMU name stored in the device archdata iommu field. That field is
expected to be populated by platform code and is left unset for DT-based
devices. This results in a
A new MMU hwmod class and data structures are created
to represent the MMUs within the IPU and DSP processor
subsystems in OMAP5. The MMUs in OMAP5 are identical to
those in OMAP4.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 83
Use the various devm_ interfaces to simplify the cleanup in
probe and remove functions.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/iommu/omap-iommu.c | 52 +-
1 file changed, 10
The OMAP iommu driver performs the reset management for the
iommu instances in processor sub-systems using the omap_device
API which are currently supplied as platform data ops. Use pdata
quirks to maintain the functionality as the OMAP iommu driver
gets converted to use DT nodes, until the reset
From: Florian Vaussard florian.vauss...@epfl.ch
This patch adds the iommu bindings for all OMAP2+ SoCs. Apart from
the standard bindings used by OMAP peripherals, this patch uses a
'dma-window' (already used by Tegra SMMU) and adds two OMAP custom
bindings - 'ti,#tlb-entries' and
From: Florian Vaussard florian.vauss...@epfl.ch
The irq numbers, ocp address space and device attribute data
have all been cleaned up for OMAP3 IOMMUs. All this data is
populated via the corresponding dt node.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
Signed-off-by: Suman Anna
The remoteproc MMUs in OMAP4+ SoCs have some additional debug
registers that can give out the PC value in addition to the
MMU fault address. The PC value can be extracted properly only
on the DSP cores, and is not available on the ARM processors
within the IPU sub-systems. Instead, the MMUs have
From: Florian Vaussard florian.vauss...@epfl.ch
With full DT boot, the legacy mode of platform device creation
for OMAP IOMMUs is not needed anymore.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/mach-omap2/Makefile | 3 --
arch/arm/mach-omap2/omap-iommu.c | 79
OMAP5 has the same iommus as OMAP4, so extend the OMAP4
iommu pdata quirks for OMAP5 as well.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/pdata-quirks.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-omap2/pdata-quirks.c
The IVA MMU is not functional when used through the hwmod and
omap_device layers. Add fixes to clockdomain and hwmod data
to have it functional. The hwmod changes are needed to enable
the clock, and the SWSUP change is needed to wakeup the domain
because the power domain is programmed to be in
The IOMMU DT adaptation support uses the device name instead
of an iommu object name. The iommu object names should eventually
vanish when all the IOMMU users have been converted to DT nodes.
NOTE: This change is not compatible with legacy boots, but OMAP3
is expected to be DT-boot only going
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