Adds the google peach-pit board dts file which uses
exynos5420 SoC.
Signed-off-by: Arun Kumar K
Signed-off-by: Doug Anderson
---
arch/arm/boot/dts/Makefile |1 +
arch/arm/boot/dts/exynos5420-peach-pit.dts | 225
2 files changed, 226 insertions(+
Hi,
On Fri, Apr 18, 2014 at 12:22:39PM +0200, Gregory CLEMENT wrote:
> The usb3-utmi registers allow to configure the internal USB PHY of the
> Armada 380/385 SoCs. A small initialization is needed to be able to use
> the USB3 ports.
>
> Signed-off-by: Gregory CLEMENT
looks like this should be
On Fri, Apr 18, 2014 at 12:22:38PM +0200, Gregory CLEMENT wrote:
> Extend the compatible string list with xhci-armada-380. It is used to
> describe xhci controller which is in the Armada 38x SoCs.
>
> Signed-off-by: Gregory CLEMENT
> ---
> Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 +
On Fri, Apr 18, 2014 at 12:22:37PM +0200, Gregory CLEMENT wrote:
> For the armada 38x SoCs which come with an xhci controller, specific
> initialization must be done during probe, especially in relation with
> the MBus windows initialization. This patch adds this support.
>
> Signed-off-by: Gregor
Hi,
On Fri, Apr 18, 2014 at 12:22:36PM +0200, Gregory CLEMENT wrote:
> This patch allow to register specific glue code for xhci controller.
> It creates a structure called xhci_plat_ops to register functions
> specific to an SoC. Currently there are only probe() and remove() but
What SoC-specific
Hi Andrzej
Thank you for comments.
On 04/18/2014 09:32 PM, Andrzej Hajda wrote:
Hi again,
On 04/17/2014 01:53 PM, YoungJun Cho wrote:
In case of using CPU interface panel, the relevant registers should be set.
So this patch adds relevant dt bindings.
Changelog v2:
- Changes "samsung,sysreg-p
Hi Andrzej
Thank you for comments.
On 04/18/2014 09:15 PM, Andrzej Hajda wrote:
Hi YoungJun,
Thanks for the whole patchset.
On 04/15/2014 07:47 AM, YoungJun Cho wrote:
Some phy control registers are not kept after software reset.
So this patch makes the clocks containing phy control to be se
On Wed, Apr 16, 2014 at 10:49:29AM +0200, Gabriel Fernandez wrote:
> On 13 April 2014 07:10, Dmitry Torokhov wrote:
> >
> > Does the version of the patch below still work for you?
> >
> Yes it's was tested on b2000 and b2089 sti boards.
>
> > Thanks.
> >
> > --
> > Dmitry
> >
> Thanks for yours r
On Sat 2014-03-29 01:31:50, Sebastian Reichel wrote:
> Add modem device tree data to Nokia N900's DTS file.
>
> Signed-off-by: Sebastian Reichel
Reviewed-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/hor
On Sat 2014-03-29 01:31:49, Sebastian Reichel wrote:
> Add SSI device tree data for OMAP3 and Nokia N900.
>
> Signed-off-by: Sebastian Reichel
Reviewed-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/hors
On Sat 2014-03-29 01:31:47, Sebastian Reichel wrote:
> The Nokia N900's modem is connected via Synchronous Serial Interface (SSI),
> which is a legacy version of MIPI's High-speed Synchronous Serial Interface
> (HSI).
>
> The handles the GPIOs for enabling and resetting the modem and instanciates
On Sat 2014-03-29 01:31:48, Sebastian Reichel wrote:
> From: Sebastian Reichel
>
> update aliases for the ssi clocks ssi_ssr_fck, ssi_sst_fck and ssi_ick
> to make them consistent for omap34xx and omap36xx. This makes it
> possible to reference the clocks from generic omap3 dts files.
>
> Signed
Hi!
> This adds a driver for the SSI McSAAB protocol as used in
> the Nokia N900.
>
> Signed-off-by: Carlos Chinea
> Signed-off-by: Sebastian Reichel
> +#define SSIP_MIN_PN_HDR 6 /* FIXME: Revisit */
> +#define SSIP_WDTOUT 2000/* FIXME: has to be 500 msecs> */
On Sat, Apr 19, 2014 at 10:32:50AM -0400, Santosh Shilimkar wrote:
> From: Grygorii Strashko
>
> In most of cases DMA addresses can be performed using offset value of
> Bus address space relatively to physical address space as following:
>
> PFN->DMA:
> __pfn_to_phys(pfn + [-]dma_pfn_offset)
>
On Sat 2014-03-29 01:31:45, Sebastian Reichel wrote:
> Create device tree binding documentation for
> OMAP Synchronous Serial Interface (SSI) device.
>
> Signed-off-by: Sebastian Reichel
Reviewed-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://a
Hi!
> Add OMAP SSI driver to the HSI subsystem.
>
> The Synchronous Serial Interface (SSI) is a legacy version
> of HSI. As in the case of HSI, it is mainly used to connect
> Application engines (APE) with cellular modem engines (CMT)
> in cellular handsets.
>
> It provides a multichannel, full-
On Sat 2014-03-29 01:31:43, Sebastian Reichel wrote:
> Implement and document generic DT bindings for HSI clients.
>
> Signed-off-by: Sebastian Reichel
Reviewed-by: Pavel Machek
> diff --git a/drivers/hsi/hsi.c b/drivers/hsi/hsi.c
> index 07e1639..5973906 100644
> --- a/drivers/hsi/hsi.c
> +++
On Sat 2014-03-29 01:31:42, Sebastian Reichel wrote:
> Expose method for registering and unregistering HSI clients, so that
> client drivers can register other client drivers.
>
> This is useful for HSI drivers, which want to use the functionality
> of other HSI drivers. For example the N900 modem
Hi!
> Make HSI channel ids platform data, which can be provided
> by platform data.
>
> static void hsi_client_release(struct device *dev)
> {
> - kfree(to_hsi_client(dev));
> + struct hsi_client *cl = to_hsi_client(dev);
> +
> + if (cl->tx_cfg.channels)
> + kfree(cl->tx
On Sat 2014-03-29 01:31:39, Sebastian Reichel wrote:
> Fix return code check of alloc_chrdev_region, which
> returns 0 on success.
>
> Signed-off-by: Sebastian Reichel
Reviewed-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cu
On Sat 2014-03-29 01:31:40, Sebastian Reichel wrote:
> This exports a method to unregister all clients from
> an hsi port.
>
> Signed-off-by: Sebastian Reichel
Reviewed-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~p
On Sat 2014-03-29 01:31:38, Sebastian Reichel wrote:
> Add git tree for hsi subsystem, update Sebastian Reichel's e-mail
> address and add Documentation/hsi.txt as maintained file.
>
> Signed-off-by: Sebastian Reichel
Reviewed-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmac
On Sat 2014-03-29 01:31:37, Sebastian Reichel wrote:
> Add a document, which gives a rough introduction about what HSI
> is and how its handled by the Linux kernel.
>
> Signed-off-by: Sebastian Reichel
Reviewed-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pict
Dear Santosh Shilimkar,
On Sat, 19 Apr 2014 10:32:45 -0400, Santosh Shilimkar wrote:
> Here is an updated version of [2] based on discussion. Series introduces
> support for setting up dma parameters based on device tree properties
> like 'dma-ranges' and 'dma-coherent' and also update to ARM 32 b
Add madc node to twl4030 so DT boards can use it.
Signed-off-by: Marek Belisko
---
arch/arm/boot/dts/twl4030.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi
index 86cfc7d..36ae916 100644
--- a/arch/arm/boot/dts/twl403
On a 32 bit ARM architecture with LPAE extension physical addresses
cannot fit into unsigned long variable.
So fix it by using phys_addr_t instead of unsigned long.
Signed-off-by: Santosh Shilimkar
---
arch/arm/mm/dma-mapping.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
Implement the set_arch_dma_coherent_ops() for ARM architecture.
Cc: Greg Kroah-Hartman
Cc: Russell King
Cc: Arnd Bergmann
Cc: Olof Johansson
Cc: Grant Likely
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
Signed-off-by: Grygorii Strashko
Signed-off-by: Santosh Shilimkar
---
arch/
From: Grygorii Strashko
In most of cases DMA addresses can be performed using offset value of
Bus address space relatively to physical address space as following:
PFN->DMA:
__pfn_to_phys(pfn + [-]dma_pfn_offset)
DMA->PFN:
__phys_to_pfn(dma_addr) + [-]dma_pfn_offset
Cc: Greg Kroah-Hartman
C
Here is an updated version of [2] based on discussion. Series introduces
support for setting up dma parameters based on device tree properties
like 'dma-ranges' and 'dma-coherent' and also update to ARM 32 bit port.
Earlier version of the same series is here [1].
The 'dma-ranges' helps to take car
On few architectures, there are few restrictions on DMAble area of system
RAM. That also means that devices needs to know about this restrictions so
that the dma_masks can be updated accordingly and dma address translation
helpers can add/subtract the dma offset.
In most of cases DMA addresses can
Retrieve DMA configuration from DT and setup platform device's DMA
parameters. The DMA configuration in DT has to be specified using
"dma-ranges" and "dma-coherent" properties if supported.
We setup dma_pfn_offset using "dma-ranges" and dma_coherent_ops
using "dma-coherent" device tree properties.
From: Grygorii Strashko
The of_dma_get_range() allows to find "dma-range" property for
the specified device and parse it.
dma-ranges format:
DMA addr (dma_addr) : naddr cells
CPU addr (phys_addr_t) : pna cells
size : nsize cells
Cc: Greg Kroah-Har
The of_dma_is_coherent() helper parses the given DT device
node to see if the "dma-coherent" property is supported and
returns true or false accordingly.
If the arch is always coherent or always noncoherent, then the default
DMA ops has to be specified accordingly.
Cc: Greg Kroah-Hartman
Cc: Rus
Hi,
On Mon, Apr 14, 2014 at 01:46:16PM +0200, Robert Baldyga wrote:
> dev_info(&pdev->dev,
> - "OMAP USB OTG controller rev %d.%d (%s, id=%d, vbus=%d)\n",
> - (rev >> 4) & 0xf, rev & 0xf, config->extcon, otg_dev->id,
> + "OMAP USB OTG controller rev %d.
[added devtree ML and Sascha Hauer]
On 04/19/2014 09:46 AM, Thomas Petazzoni wrote:
> Dear Sebastian Hesselbarth,
>
> On Mon, 14 Apr 2014 13:26:18 +0200, Sebastian Hesselbarth wrote:
>
>>> + chosen {
>>> + bootargs = "console=ttyS0,115200n8 earlyprintk";
>>
>> + [linux,]stdout-path =
Hi Chanwoo,
On 19.04.2014 09:47, Chanwoo Choi wrote:
Hi Tomasz,
On Fri, Apr 18, 2014 at 11:42 PM, Tomasz Figa wrote:
On SoCs with more than 2 cores there are more than 2 S5P_ARM_CORE_*
registers that can be addressed with fixed stride of 0x80. This patch
renames the definitions of S5P_ARM_COR
Hi Tomasz,
On Fri, Apr 18, 2014 at 11:42 PM, Tomasz Figa wrote:
> On SoCs with more than 2 cores there are more than 2 S5P_ARM_CORE_*
> registers that can be addressed with fixed stride of 0x80. This patch
> renames the definitions of S5P_ARM_CORE1_* registers to be S5P_ARM_CORE_*
> and make them
37 matches
Mail list logo
