This patch adds devicetree support for mc13783-codec.
Signed-off-by: Alexander Shiyan
---
Documentation/devicetree/bindings/mfd/mc13xxx.txt | 3 +++
sound/soc/codecs/mc13783.c| 14 +-
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/Documentatio
Ühel kenal päeval, K, 30.04.2014 kell 21:16, kirjutas Alexander
Bersenev:
> This patch introduces Consumer IR(CIR) support for sunxi boards.
>
> This is based on Alexsey Shestacov's work based on the original driver
> supplied by Allwinner.
>
> Signed-off-by: Alexander Bersenev
> Signed-off-by:
On Wed, Apr 30, 2014 at 1:26 AM, Philipp Zabel wrote:
> Am Dienstag, den 29.04.2014, 15:44 -0500 schrieb Rob Herring:
>> On Tue, Apr 29, 2014 at 11:37 AM, Philipp Zabel
>> wrote:
>> > Add Linear Technology Corporation to the list of device tree vendor
>> > prefixes.
>> >
>> > Signed-off-by: Phi
On Wed, Apr 30, 2014 at 11:25:00AM -0700, Mark Brown wrote:
> On Wed, Apr 30, 2014 at 09:10:12AM +0200, Richard Cochran wrote:
> > Shouldn't this go to the arm list and rmk for review, too?
>
> Is there any particular reason for including rmk? It's generally not
> helpful to spam people with seri
On Wed, Apr 30, 2014 at 11:56:08AM -0700, Doug Anderson wrote:
> I cornered Rob and Mark Rutland a little bit about this at ELC today
> (sorry!). Neither of them was a huge ran of adding a pseudo device.
> Rob suggested that Mark Brown might be the best person to give
> direction here. Mark Brow
On Wed, Apr 30, 2014 at 10:12:36PM +0400, Alexander Shiyan wrote:
> Wed, 30 Apr 2014 11:06:53 -0700 от Mark Brown :
> >
> > ASoC: mc13783 DT support
> Sorry, this means that I should not create v2?
It's probably not going to achie
On Wed, Apr 30, 2014 at 09:10:12AM +0200, Richard Cochran wrote:
> Shouldn't this go to the arm list and rmk for review, too?
Is there any particular reason for including rmk? It's generally not
helpful to spam people with serieses without reason, we all get quite a
lot of mail already...
signa
Add support for the HW randomizer available in the sunxi IP.
Signed-off-by: Boris BREZILLON
---
drivers/mtd/nand/sunxi_nand.c | 511 +-
1 file changed, 500 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/sunxi_nand.c b/drivers/mtd/nand/sunxi_
Signed-off-by: Boris BREZILLON
---
drivers/of/of_mtd.c| 35 +++
include/linux/of_mtd.h | 6 ++
2 files changed, 41 insertions(+)
diff --git a/drivers/of/of_mtd.c b/drivers/of/of_mtd.c
index a862c08..f941a5e 100644
--- a/drivers/of/of_mtd.c
+++ b/drivers/o
Hello,
This series is a proposal to add support for randomizers (either software
or hardware) to NAND flash controller drivers.
The last patch is the sunxi HW randomizer implementation and is just given
as an example (it won't apply on the MTD tree, because it depends on other
stuff not yet poste
This patch introduce a new layer in the NAND framework to support both HW
and SW randomizers.
This randomization is required on some MLC/TLC NAND chips which do not
support large islands of same patterns.
The randomizer layer defines a nand_rnd_ctrl struct which is intended to
be used by NAND cor
On Wed, Apr 30, 2014 at 5:32 PM, Geert Uytterhoeven
wrote:
> Hi Wolfram,
>
> CC devicetree
>
> On Thu, May 1, 2014 at 12:21 AM, Wolfram Sang wrote:
>> From: Wolfram Sang
>>
>> Reported-by: Geert Uytterhoeven
>> Signed-off-by: Wolfram Sang
>> ---
>> .../devicetree/bindings/i2c/i2c-sh_mobile.tx
This patch adds three new OF helper functions to use/request
locks from a hwspinlock device instantiated through a
device-tree blob.
1. The of_hwspin_lock_get_num_locks() is a common helper
function to read the common 'hwlock-num-locks' property.
2. The of_hwspin_lock_simple_xlate() is a simple
The hwspinlock_device structure is used for registering a bank of
locks with the driver core. The structure already contains the
necessary members to identify the bank of locks. The core does not
maintain the hwspinlock_devices itself, but maintains only a radix
tree for all the registered locks. A
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
base support for parsing the DT nodes, and removes the code
dealing with the traditional platform device instantiation.
Signed-off-by: Suman Anna
[t...@atomide.com: ack for legacy
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
DT bindings information for OMAP hwspinlock module.
Cc: Rob Herring
Signed-off-by: Suman Anna
---
.../devicetree/bindings/hwlock/omap-hwspinlock.txt | 24 ++
Hi Ohad,
This is a refresh/update of the hwspinlock dt support series. The
series is rebased onto v3.15-rc3, and adds 8 new patches (RFC) to
handle various discussion points arised on v4.
Following are the main changes in v5:
- Base DT patches (Patches 1 to 7, except for 4) are identical to v4.
The property 'hwlock-reserved-locks' will be used to represent
the number of locks to be reserved for clients that would need
to request/operate on specific locks. A new OF helper function,
of_hwspin_lock_get_num_reserved_locks(), is added to minimize
duplication in different platform implementatio
HwSpinlocks are supported on AM33xx, AM43xx and DRA7xx SoC
device families as well. The IPs are identical to that of
OMAP4/OMAP5, except for the number of locks.
Add a depends on to the above family of SoCs to enable the
build support for OMAP hwspinlock driver for any of the above
SoC configs.
S
The HwSpinlock core allows requesting either a specific lock or an
available normal lock. The specific locks are usually reserved during
board init time, while the normal available locks are intended to be
assigned at runtime.
The HwSpinlock core has been enhanced to:
1. allow the platform imple
Retrieve the number of reserved locks for OMAP by using the
of_hwspin_lock_get_num_reserved_locks() OF helper function
provided by the hwspinlock core. The range sanity check will
be performed by the hwspinlock core during the registration.
Signed-off-by: Suman Anna
---
drivers/hwspinlock/omap_h
The HwSpinlock core requires a base id for registering a bank
of hwspinlocks. This base id needs to be unique across multiple
IP instances of a hwspinlock device, so that each hwlock can be
represented uniquely in a system.
Support has been added to represent this in DT through a common
property '
The number of hwspinlocks are determined based on the value read
from the IP block's SYSSTATUS register. However, the module may
not be enabled and clocked, and the read may result in a bus error.
This particular issue is seen rather easily on AM33XX, since the
module wakeup is software controlled
Rearrange the code between hwspin_lock_unregister() and the underlying
hwspin_lock_unregister_single() functions so that the semantics are
similar to the _register_ functions. This change prepares the hwspinlock
driver core to support unregistration of reserved locks better.
Signed-off-by: Suman A
Changed the return statements to return an ERR_PTR instead of NULL
in case of an error. This patch helps with deferred probing of any
client users if the corresponding hwspinlock bank is not yet registered
with the hwspinlock core.
Signed-off-by: Suman Anna
---
TODO: Collapse into Patch4,
The various hwspin_lock_request* interfaces return a NULL pointer
on error, or a valid hwlock pointer on success. It is standard
practice to pass the error value back to the consumers on failure
cases, so change the functions to return an equivalent ERR_PTR()
value instead of NULL. The regular clie
The HwSpinlock core allows requesting either a specific lock or
an available normal lock. The specific locks are usually reserved
during board init time, while the normal available locks are
intended to be assigned at runtime.
This patch prepares the hwspinlock core to support this concept
of rese
This patch adds the generic common bindings used to represent
a hwlock device and use/request locks in a device-tree build.
All the platform-specific hwlock driver implementations need the
number of locks and associated base id for registering the locks
present within the device with the driver co
On Sunday, April 27, 2014 02:28:50 PM Russell King wrote:
> Signed-off-by: Russell King
Acked-by: Rafael J. Wysocki
Since you need this one and [2/5] for the rest of the patchset, please feel
free to take them through your tree if that's convenient.
> ---
> drivers/base/power/domain.c | 6 +++
On Sunday, April 27, 2014 02:28:55 PM Russell King wrote:
> pm_genpd_remove_device() should only be called with valid and present
> pm domain. There are circumstances where we may end up with something
> that isn't a generic PM domain in dev->pm_domain (eg, vga_switcheroo
> stuff.)
>
> Signed-off
Hi,
On Wed, Apr 30, 2014 at 09:39:11PM +0100, Jim Quinlan wrote:
> In most examples of .dtsi files I have perused, a device is associated with
> typically one clock, maybe two. In the SoC I'm working on, some devices
> need to turn off multiple clocks for PM, as many as 13. The driver gets
> th
On 04.04.2014 16:53, Tomasz Stanislawski wrote:
Export sclk_hdmiphy clock to be usable from DT.
Signed-off-by: Tomasz Stanislawski
---
drivers/clk/samsung/clk-exynos4.c |2 +-
include/dt-bindings/clock/exynos4.h |1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a
* Dan Murphy [140430 11:14]:
> On 04/30/2014 01:10 PM, Tony Lindgren wrote:
> > * Dan Murphy [140430 11:00]:
> >> Tony and Arnd
> >>
> >> Thanks for the comments
> >>
> >> On 04/29/2014 07:22 PM, Tony Lindgren wrote:
> >>> * Arnd Bergmann [140429 13:35]:
> On Tuesday 29 April 2014 15:19:47
On Mon, Apr 28, 2014 at 09:43:17AM -0400, Santosh Shilimkar wrote:
> On Wednesday 16 April 2014 05:47 AM, Ivan Khoronzhuk wrote:
> > On 04/16/2014 10:08 AM, Brian Norris wrote:
> >> On Tue, Apr 08, 2014 at 03:51:34PM +0300, Ivan Khoronzhuk wrote:
> >>> Could you pick up subj patch?
> >> Pushed to l
Hi Wolfram,
CC devicetree
On Thu, May 1, 2014 at 12:21 AM, Wolfram Sang wrote:
> From: Wolfram Sang
>
> Reported-by: Geert Uytterhoeven
> Signed-off-by: Wolfram Sang
> ---
> .../devicetree/bindings/i2c/i2c-sh_mobile.txt | 26
> ++
> 1 file changed, 26 insertions(+)
Mike,
On 08.04.2014 17:45, Tomasz Figa wrote:
Hi,
On 04.04.2014 16:53, Tomasz Stanislawski wrote:
This patch adds support for propagation of setup of clock's parent one
level
up.
This feature is helpful when a driver changes topology of its clocks
using
clk_set_parent(). The problem occurs w
Hi Laurent,
On Wed, Apr 30, 2014 at 11:29 PM, Laurent Pinchart
wrote:
> On Thursday 24 April 2014 12:13:19 Geert Uytterhoeven wrote:
>> On SoCs like ARM/SH-mobile, gate clocks are available for modules, allowing
>> Runtime PM for a device controlled by a gate clock.
>>
>> On legacy shmobile kerne
Hi Laurent,
On Wed, Apr 30, 2014 at 11:23 PM, Laurent Pinchart
wrote:
> On Thursday 24 April 2014 15:11:24 Ulf Hansson wrote:
>> On 24 April 2014 12:13, Geert Uytterhoeven wrote:
>> > When adding a device from DT, check if its clocks are suitable for Runtime
>> > PM, and register them with the P
Hi Vinod,
On Wed, Apr 30, 2014 at 12:34:08PM +0530, Vinod Koul wrote:
> On Thu, Apr 24, 2014 at 04:22:44PM +0200, Maxime Ripard wrote:
> > The Allwinner A31 has a 16 channels DMA controller that it shares with the
> > newer A23. Although sharing some similarities with the DMA controller of the
> >
Hi Grant,
On Tue, Apr 29, 2014 at 3:16 PM, Grant Likely wrote:
> On Fri, 25 Apr 2014 16:44:58 -0700, Kevin Hilman wrote:
>> Geert Uytterhoeven writes:
>>
>> > When adding a device from DT, check if its clocks are suitable for Runtime
>> > PM, and register them with the PM core.
>> > If Runtime
Hi Kevin,
On Sat, Apr 26, 2014 at 1:44 AM, Kevin Hilman wrote:
> Geert Uytterhoeven writes:
>> When adding a device from DT, check if its clocks are suitable for Runtime
>> PM, and register them with the PM core.
>> If Runtime PM is disabled, just enable the clock.
>>
>> This allows the PM core
On Tue, Apr 15, 2014 at 05:08:31PM +0530, Srikanth Thokala wrote:
> This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
>
> Signed-off-by: Srikanth Thokala
> ---
> Changes in v3:
> - Rebased on v3.15.0-rc1
> - Added support for interrupt-map DT functionality.
> - Removed map_irq() wrapper,
On 30/04/14 14:25, Laurent Pinchart wrote:
On Tuesday 29 April 2014 14:16:10 Grant Likely wrote:
On Fri, 25 Apr 2014 16:44:58 -0700, Kevin Hilman wrote:
Geert Uytterhoeven writes:
When adding a device from DT, check if its clocks are suitable for
Runtime PM, and register them with the PM cor
Hi Geert,
On Thursday 24 April 2014 12:13:19 Geert Uytterhoeven wrote:
> On SoCs like ARM/SH-mobile, gate clocks are available for modules, allowing
> Runtime PM for a device controlled by a gate clock.
>
> On legacy shmobile kernels, this is handled by the PM runtime code in
> drivers/sh/pm_runt
On Tuesday 29 April 2014 14:16:10 Grant Likely wrote:
> On Fri, 25 Apr 2014 16:44:58 -0700, Kevin Hilman wrote:
> > Geert Uytterhoeven writes:
> > > When adding a device from DT, check if its clocks are suitable for
> > > Runtime PM, and register them with the PM core.
> > > If Runtime PM is disa
Hi Ulf and Geert,
On Thursday 24 April 2014 15:11:24 Ulf Hansson wrote:
> On 24 April 2014 12:13, Geert Uytterhoeven wrote:
> > When adding a device from DT, check if its clocks are suitable for Runtime
> > PM, and register them with the PM core.
> > If Runtime PM is disabled, just enable the clo
On 04/29, Mike Turquette wrote:
> Quoting Stephen Boyd (2014-04-04 11:45:36)
> > +Example:
> > + clock-controller@400 {
> > + compatible = "qcom,mmcc-msm8974";
> > + reg = <0x400 0x1000>;
> > + #clock-cells = <1>;
> > + #reset-ce
On Wed, 30 Apr 2014 10:21:07 -0600
Stephen Warren wrote:
> On 04/30/2014 01:52 AM, Marc Dietrich wrote:
> > Am Montag, 28. April 2014, 17:04:13 schrieb Stephen Warren:
> >> On 04/26/2014 07:14 PM, Andrey Danin wrote:
> >>
> >> This patch isn't adding DT bindings for NVEC, but rather add DT nodes.
In most examples of .dtsi files I have perused, a device is associated with
typically one clock, maybe two. In the SoC I'm working on, some devices
need to turn off multiple clocks for PM, as many as 13. The driver gets
the clocks from the device tree, and when the driver wants to turn off
clock
On Wednesday 30 April 2014 22:21:30 Andrew Lunn wrote:
> > Yes, we *can* move it in kirkwood.dtsi, but IMHO we *should* keep it in
> > the board files. I see the "chosen" node and its properties as _the_
> > board node.
> >
> > One could argue then, that we should count the memory properties too a
> Yes, we *can* move it in kirkwood.dtsi, but IMHO we *should* keep it in
> the board files. I see the "chosen" node and its properties as _the_
> board node.
>
> One could argue then, that we should count the memory properties too and
> put the most common in the SoC dtsi. But you are right, as U
On 04/30/2014 09:44 PM, Jason Gunthorpe wrote:
> On Wed, Apr 30, 2014 at 09:39:41PM +0200, Sebastian Hesselbarth wrote:
>> On 04/30/2014 06:42 PM, Jason Gunthorpe wrote:
>>> On Wed, Apr 30, 2014 at 02:56:34PM +0200, Sebastian Hesselbarth wrote:
All SoCs have the same pinctrl setting for NAND,
On 04/30/2014 06:38 PM, Andrew Lunn wrote:
> On Wed, Apr 30, 2014 at 02:56:30PM +0200, Sebastian Hesselbarth wrote:
>> ePAPR allows to reference the device used for console output by
>> stdout-path property. With node labels for Kirkwood UART0, now
>> reference it on all Kirkwood boards that alread
On Wed, Apr 30, 2014 at 09:39:41PM +0200, Sebastian Hesselbarth wrote:
> On 04/30/2014 06:42 PM, Jason Gunthorpe wrote:
> > On Wed, Apr 30, 2014 at 02:56:34PM +0200, Sebastian Hesselbarth wrote:
> >> All SoCs have the same pinctrl setting for NAND, UART0/1, SPI, TWSI0,
> >> and GBE1. Move it to the
On 04/30/2014 06:42 PM, Jason Gunthorpe wrote:
> On Wed, Apr 30, 2014 at 02:56:34PM +0200, Sebastian Hesselbarth wrote:
>> All SoCs have the same pinctrl setting for NAND, UART0/1, SPI, TWSI0,
>> and GBE1. Move it to the common pinctrl node that we now have.
>
> There are two possible choices for
Quoting Nicolas Ferre (2014-04-30 11:12:51)
> On 22/04/2014 06:12, Boris BREZILLON :
> > Hello,
> >
> > This series introduce the real clock model (as described in atmel
> > datasheets)
> > for slow and main clocks.
> >
> > The modifications introduced by this series break the DT compat, but, as
Hi,
On Mon, Apr 28, 2014 at 10:35 PM, Inderpal Singh wrote:
> On some SoCs there could be requirements that two or more voltage
> regulators need to maintain certain skew for proper functioning.
>
> This patch implements a new vitual locker type regulator which can
> have multiple output and inpu
On Wed, Apr 30, 2014 at 10:54:22AM +0200, Philipp Zabel wrote:
> Hi Maxime,
>
> Am Donnerstag, den 17.04.2014, 13:58 +0200 schrieb Maxime Ripard:
> > I still feel like we should really treat gpios like just another reset
> > controller, ie. using the resets property.
>
> I now feel like we really
On Wed, Apr 30, 2014 at 3:41 AM, Simon Horman wrote:
> On Tue, Apr 29, 2014 at 12:03:32PM +0200, Wolfram Sang wrote:
>> From: Wolfram Sang
>>
>> Signed-off-by: Wolfram Sang
>> ---
>> Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
>> 1 file changed, 1 insertion(+)
>>
Hi Thierry,
On Monday 28 April 2014 23:25:50 Thierry Reding wrote:
> On Mon, Apr 28, 2014 at 05:05:24PM +0200, Laurent Pinchart wrote:
> > On Tuesday 22 April 2014 10:24:39 YoungJun Cho wrote:
> > > On 04/22/2014 08:00 AM, Laurent Pinchart wrote:
> > > > Hi YoungJun,
> > > >
> > > > Thank you for
On Wed, Mar 12, 2014 at 07:07:38PM +0100, Boris BREZILLON wrote:
> Add a function to retrieve NAND timing mode (ONFI timing mode) from a given
> DT node.
>
> Signed-off-by: Boris BREZILLON
> ---
> drivers/of/of_mtd.c| 19 +++
> include/linux/of_mtd.h |8
> 2 fi
Tony
On 04/30/2014 01:10 PM, Tony Lindgren wrote:
> * Dan Murphy [140430 11:00]:
>> Tony and Arnd
>>
>> Thanks for the comments
>>
>> On 04/29/2014 07:22 PM, Tony Lindgren wrote:
>>> * Arnd Bergmann [140429 13:35]:
On Tuesday 29 April 2014 15:19:47 Dan Murphy wrote:
> + * AM33xx reset i
On 22/04/2014 06:12, Boris BREZILLON :
> Hello,
>
> This series introduce the real clock model (as described in atmel datasheets)
> for slow and main clocks.
>
> The modifications introduced by this series break the DT compat, but, as the
> at91 CCF based implementation is pretty new (introduced
Wed, 30 Apr 2014 11:06:53 -0700 от Mark Brown :
> On Wed, Apr 30, 2014 at 03:17:08PM +0100, Lee Jones wrote:
>
> > Neither Mark, nor I can apply this patch independently, we need to
> > create a shared branch somewhere, or we'll risk conflicts at merge
> > time.
>
> You acked it without saying yo
* Dan Murphy [140430 11:00]:
> Tony and Arnd
>
> Thanks for the comments
>
> On 04/29/2014 07:22 PM, Tony Lindgren wrote:
> > * Arnd Bergmann [140429 13:35]:
> >> On Tuesday 29 April 2014 15:19:47 Dan Murphy wrote:
> >>> + * AM33xx reset index for PRCM Module
> >>> + *
> >>> + * Copyright 2014
On Wed, Apr 30, 2014 at 03:17:08PM +0100, Lee Jones wrote:
> Neither Mark, nor I can apply this patch independently, we need to
> create a shared branch somewhere, or we'll risk conflicts at merge
> time.
You acked it without saying you didn't want me to apply it... usually
that means someone is
Hi,
On Wed, Mar 12, 2014 at 07:07:37PM +0100, Boris BREZILLON wrote:
> Add a converter to retrieve NAND timings from an ONFI NAND timing mode.
> This only support SDR NAND timings for now.
>
> Signed-off-by: Boris BREZILLON
> ---
> drivers/mtd/nand/Makefile |2 +-
> drivers/mtd/nand/n
On Wed, Apr 30, 2014 at 05:30:39PM +0530, Tushar Behera wrote:
> XCLKOUT mux register (0x10040a00) is not part of core clock SFR range,
> rather it is part of pmu-system-controller node.
> One option would be to add a clock provider for XCLKOUT. That would
> require me to extend current clock dri
Tony and Arnd
Thanks for the comments
On 04/29/2014 07:22 PM, Tony Lindgren wrote:
> * Arnd Bergmann [140429 13:35]:
>> On Tuesday 29 April 2014 15:19:47 Dan Murphy wrote:
>>> + * AM33xx reset index for PRCM Module
>>> + *
>>> + * Copyright 2014 Texas Instruments Inc.
>>> + *
>>> + * This progra
This series adds the most critical cros_ec changes for newer boards
using cros_ec. Specifically:
* Fixes timing/locking issues with the previously upstreamed (but
never used upstream) cros_ec_spi driver.
* Updates the cros_ec header file to the latest version which allows
us to use newer EC fe
Hi Boris,
On Wed, Mar 12, 2014 at 07:07:36PM +0100, Boris BREZILLON wrote:
> Define a struct containing the standard NAND timings as described in NAND
> datasheets.
>
> Signed-off-by: Boris BREZILLON
> ---
> include/linux/mtd/nand.h | 49
> ++
> 1
Philipp and Arnd
Thank you for the comments
On 04/30/2014 03:20 AM, Philipp Zabel wrote:
> Hi Dan,
>
> Am Dienstag, den 29.04.2014, 15:19 -0500 schrieb Dan Murphy:
>> The TI SoC reset controller support utilizes the
>> reset controller framework to give device drivers or
>> function drivers a com
* Joachim Eastwood [140429 18:08]:
> On 30 April 2014 01:52, Tony Lindgren wrote:
> > Looks like quite a few omaps have sharp ls037v7dw01 that's configured
> > as various panel dpi entries for whatever legacy reasons. For device
> > tree based support, let's just configure these properly for pane
This adds the EC i2c tunnel (and devices under it) to the
tegra124-venice2 device tree.
Signed-off-by: Doug Anderson
Tested-by: Andrew Bresticker
Tested-by: Stephen Warren
---
Changes in v3: None
Changes in v2:
- Removed i2c20 alias for i2c tunnel
arch/arm/boot/dts/tegra124-venice2.dts | 26 +
On ARM Chromebooks we have a few devices that are accessed by both the
AP (the main "Application Processor") and the EC (the Embedded
Controller). These are:
* The battery (sbs-battery).
* The power management unit tps65090.
On the original Samsung ARM Chromebook these devices were on an I2C
bus
Hi Brian,
On Wed, 2014-04-30 at 10:21 -0700, Brian Norris wrote:
> A few more small comments.
>
> On Wed, Apr 16, 2014 at 09:17:15PM +0400, Sergei Ianovich wrote:
> > +++ b/Documentation/devicetree/bindings/mtd/sram-lp8x4x.txt
> > @@ -0,0 +1,22 @@
> > +512kB battery backed up SRAM on LP-8x4x indu
Hi Sergei,
A few more small comments.
On Wed, Apr 16, 2014 at 09:17:15PM +0400, Sergei Ianovich wrote:
> This provides an MTD device driver for 512kB of battery backed up SRAM
> on ICPDAS LP-8X4X programmable automation controllers.
>
> SRAM chip is connected via FPGA and is not accessible witho
Hi,
On Wed, Apr 23, 2014 at 09:57:52AM +0530, sundeep subbaraya wrote:
> >> > I get the impression that the two of you are arguing past each other.
> >> > It appears that Sundeep is talking about transferring data from the
> >> > gadget driver's buffer to an internal buffer in the UDC hardware, bu
On Wed, Apr 30, 2014 at 02:56:27PM +0200, Sebastian Hesselbarth wrote:
> This is a patch set starting Kirkwood DT cleanup since over time some
> cleanup potential piled up on it. Also, now that Barebox is going to
> reuse the same DT code basis, we need some lowlevel property
> improvements, that w
Arun,
On Wed, Apr 23, 2014 at 9:17 PM, Arun Kumar K wrote:
> Adds the google peach-pit board dts file which uses
> exynos5420 SoC.
>
> Signed-off-by: Arun Kumar K
> Signed-off-by: Doug Anderson
> ---
> Changes from v1
> ---
> - Addressed review comments from Doug, Sachin & Tushar
>
On Wed, Apr 30, 2014 at 10:42:36AM -0600, Jason Gunthorpe wrote:
> On Wed, Apr 30, 2014 at 02:56:34PM +0200, Sebastian Hesselbarth wrote:
> > All SoCs have the same pinctrl setting for NAND, UART0/1, SPI, TWSI0,
> > and GBE1. Move it to the common pinctrl node that we now have.
>
> There are two p
On 30 April 2014 14:25, Vivek Gautam wrote:
> Add required device node for ehci and ohci controllers to
> enable USB 2.0 support.
>
> Signed-off-by: Vivek Gautam
> ---
> arch/arm/boot/dts/exynos5420.dtsi | 36 +++-
> 1 file changed, 35 insertions(+), 1 deletion(
Hi Vivek,
On 30 April 2014 14:25, Vivek Gautam wrote:
> From: Kamil Debski
>
> Add support to PHY of USB2 of the Exynos 5250 SoC.
>
> Signed-off-by: Kamil Debski
> [gautam.vi...@samsung.com: Split the usb phy entries from
> syscon entries from earlier patch: dts: Add usb2phy to Exynos 5250]
> [
On Wed, Apr 30, 2014 at 02:56:34PM +0200, Sebastian Hesselbarth wrote:
> All SoCs have the same pinctrl setting for NAND, UART0/1, SPI, TWSI0,
> and GBE1. Move it to the common pinctrl node that we now have.
There are two possible choices for UART0, UART1, and SPI on kirkwood..
For instance I use
On Wed, Apr 30, 2014 at 02:56:30PM +0200, Sebastian Hesselbarth wrote:
> ePAPR allows to reference the device used for console output by
> stdout-path property. With node labels for Kirkwood UART0, now
> reference it on all Kirkwood boards that already have ttyS0 in
> their bootargs property.
Hi S
Hi Roger,
On Wed, Apr 30, 2014 at 03:36:26PM +0300, Roger Quadros wrote:
> static int pixcir_i2c_ts_remove(struct i2c_client *client)
> @@ -198,10 +194,8 @@ static int pixcir_i2c_ts_remove(struct i2c_client
> *client)
>
> tsdata->exiting = true;
> mb();
> - free_irq(client->ir
Hi Herbert,
On 04/28/2014 11:59 AM, Herbert Xu wrote:
> On Mon, Apr 14, 2014 at 03:48:37PM +0300, Stanimir Varbanov wrote:
>>
>> +#define QCE_MAJOR_VERSION5 0x05
>> +#define QCE_QUEUE_LENGTH50
>
> What is the purpose of this software queue? Why can't you directly
> feed the requests to the h
Hi Roger,
On Wed, Apr 30, 2014 at 03:36:27PM +0300, Roger Quadros wrote:
> +static int pixcir_stop(struct pixcir_i2c_ts_data *ts)
> +{
> + struct device *dev = &ts->client->dev;
> + int ret;
> +
> + /* exit ISR if running, no more report parsing */
> + ts->exiting = true;
> + m
Hi,
On Mon, Apr 28, 2014 at 04:34:17PM +0300, Ivan T. Ivanov wrote:
> From: "Ivan T. Ivanov"
>
> Allow support to use 2nd HSPHY with USB2 Core.
> Some platforms may have configuration to allow USB controller
> work with any of the two HSPHYs present. By default driver
> configures USB core to us
On 04/30/2014 01:52 AM, Marc Dietrich wrote:
> Hi,
>
> Am Montag, 28. April 2014, 17:04:13 schrieb Stephen Warren:
>> On 04/26/2014 07:14 PM, Andrey Danin wrote:
>>
>> This patch isn't adding DT bindings for NVEC, but rather add DT nodes.
>> The binding is the schema, not the content.
>>
>> We nee
On 04/28, Mike Turquette wrote:
> Quoting Kumar Gala (2014-04-04 09:32:56)
> > diff --git a/include/dt-bindings/clock/qcom,gcc-msm8960.h
> > b/include/dt-bindings/clock/qcom,gcc-msm8960.h
> > index 03bbf49..f9f5471 100644
> > --- a/include/dt-bindings/clock/qcom,gcc-msm8960.h
> > +++ b/include/dt-
Hi Shaik,
On 24 April 2014 18:33, Shaik Ameer Basha wrote:
> This patch fixes some parent-child relationships according
> to the latest datasheet and adds more clocks related to
> PERIS and GEN blocks.
Again, it is better to split up the fixes from other stuff so that it
can go in the -rc
and ca
Hi Shaik,
On 24 April 2014 18:33, Shaik Ameer Basha wrote:
> This patch fixes the wrong register offset for sclk_bpll clock.
Since this patch is a fix, it is better to send it separately so that
it gets into one of
the upcoming RCs (and if needed to stable).
>
> Signed-off-by: Shaik Ameer Basha
Hi Arnd,
Am 29.04.2014 20:14, schrieb Arnd Bergmann:
> On a related note, there is one part I don't understand:
>
> +netdev_tx_t
> +qcaspi_netdev_xmit(struct sk_buff *skb, struct net_device *dev)
> +{
> + u32 frame_len;
> + u8 *ptmp;
> + struct qcaspi *qca = netdev_priv(dev);
> +
On Tuesday 15 April 2014, Srikanth Thokala wrote:
> +Required properties:
> +- #address-cells: Address representation for root ports, set to <3>
> +- #size-cells: Size representation for root ports, set to <2>
> +- #interrupt-cells: specifies the number of cells needed to encode an
> + interrup
On Wed, Apr 30, 2014 at 9:05 AM, Pawel Moll wrote:
> In "Device Tree powered" systems, platform devices are usually
> massively populated with of_platform_populate() call, executed
> at some level of initcalls, either by generic architecture
> or by platform-specific code.
>
> There are situations
On Tue, Apr 29, 2014 at 11:16 AM, Felipe Balbi wrote:
> On Tue, Apr 29, 2014 at 11:14:20AM -0500, Felipe Balbi wrote:
>> On Tue, Apr 29, 2014 at 10:50:39AM +0300, Roger Quadros wrote:
>> > +Nishant
>> >
>> > Hi,
>> >
>> > On 04/28/2014 07:03 PM, Felipe Balbi wrote:
>> > > Hi,
>> > >
>> > > On Mon,
This patch adds driver for sunxi IR controller.
It is based on Alexsey Shestacov's work based on the original driver
supplied by Allwinner.
Signed-off-by: Alexander Bersenev
Signed-off-by: Alexsey Shestacov
---
drivers/media/rc/Kconfig| 10 ++
drivers/media/rc/Makefile | 1 +
drivers/m
This patch adds documentation for Device-Tree bindings for sunxi IR
controller.
Signed-off-by: Alexander Bersenev
Signed-off-by: Alexsey Shestacov
---
.../devicetree/bindings/media/sunxi-ir.txt | 23 ++
1 file changed, 23 insertions(+)
create mode 100644 Documentati
This patch adds IR controller in A20 Device-Tree:
- Two IR devices found in A20 user manual
- Pins for two devices
- One IR device physically found on Cubieboard 2
- One IR device physically found on Cubietruck
Signed-off-by: Alexander Bersenev
Signed-off-by: Alexsey Shestacov
---
arch/arm/boot
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