Hi,
On 06/16/2014 11:30 PM, Dmitry Torokhov wrote:
> Hi Hans,
>
> On Mon, Jun 16, 2014 at 08:24:28PM +0200, Hans de Goede wrote:
>> Testing has revealed that the temperature in the rtp controller of the A10
>> (sun4i) SoC has a resolution of 50 milli degrees / step, where as the
>> A13 (sun5i) an
Hi,
On 06/16/2014 10:53 PM, Florian Fainelli wrote:
> 2014-06-16 10:56 GMT-07:00 Hans de Goede :
>> From: Arend van Spriel
>>
>> The Broadcom bcm43xx sdio devices are fullmac devices that may be
>> integrated in ARM platforms. Currently, the brcmfmac driver for
>> these devices support use of pla
Hi All,
Please review this patch.
Regards,
Rahul Sharma
On 9 June 2014 16:58, Rahul Sharma wrote:
> Display domain is removed due to instability issues. Explaining
> the problem below:
>
> exynos_init_late triggers the pm_genpd_poweroff_unused which
> powers off the unused power domains. This c
From: Iyappan Subramanian
Date: Mon, 16 Jun 2014 17:18:46 -0700
> +static netdev_tx_t xgene_enet_start_xmit(struct sk_buff *skb,
> + struct net_device *ndev)
> +{
> + struct xgene_enet_pdata *pdata = netdev_priv(ndev);
> + struct xgene_enet_desc_ring *
Hi Tomasz,
>
> Hi Pankaj,
>
> On 10.05.2014 09:20, Pankaj Dubey wrote:
> > Let's handle i2c interrupt re-configuration in i2c driver. This will
> > help us in removing some soc specific checks from machine files.
> > Since only Exynos5250, and Exynos5420 need to do this, added syscon
> > based p
Tushar,
On Mon, Jun 16, 2014 at 8:36 PM, Tushar Behera wrote:
> On Mon, Jun 16, 2014 at 10:19 PM, Doug Anderson wrote:
>> Tushar,
>>
>> On Mon, Jun 16, 2014 at 4:19 AM, Tushar Behera wrote:
>>> On 06/13/2014 10:33 PM, Doug Anderson wrote:
Tushar,
On Tue, Jun 10, 2014 at 10:32 PM,
Add device tree support to extcon-gpio driver.
Add devicetree binding documentation
Signed-off-by: George Cherian
---
.../devicetree/bindings/extcon/extcon-gpio.txt | 34 ++
drivers/extcon/extcon-gpio.c | 29 ++
2 files changed, 63 in
Minor Cleanups
- Order the include files in alphabetical order.
- Fix description of state_off in extcon_gpio.h
- Add a descrition for check_on_resume in extcon_gpio.h
Signed-off-by: George Cherian
---
drivers/extcon/extcon-gpio.c | 10 +-
include/linux/extcon/extcon-gpio.h | 4
This serires adds devicetree support for extcon-gpio driver.
Patch 1 - Addreses minor cleanups
Patch 2 - Adds devicetree support for esxtcon-gpio driver.
George Cherian (2):
extcon: gpio: Minor cleanups
extcon: gpio: Add dt support for the driver.
.../devicetree/bindings/extcon/extcon-gpio
On Mon, Jun 16, 2014 at 10:32 PM, Doug Anderson wrote:
> Mark,
>
> On Mon, Jun 16, 2014 at 9:51 AM, Mark Brown wrote:
>> On Mon, Jun 16, 2014 at 09:49:26AM -0700, Doug Anderson wrote:
>>
>>> Yes please. I think there's supposed to be some official ordering of
>>> things. If anyone reading this
On Mon, Jun 16, 2014 at 10:19 PM, Doug Anderson wrote:
> Tushar,
>
> On Mon, Jun 16, 2014 at 4:19 AM, Tushar Behera wrote:
>> On 06/13/2014 10:33 PM, Doug Anderson wrote:
>>> Tushar,
>>>
>>> On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera
>>> wrote:
Peach-pi board has MAX98090 audio codec
Hi Lorenzo,
On Wed, Apr 23, 2014 at 9:43 PM, Lorenzo Pieralisi
wrote:
> On Tue, Apr 22, 2014 at 08:56:23PM +0100, Nicolas Pitre wrote:
>>
>> [ Moved Lorenzo up in the addressee list to get his attention ]
>
> Sorry for the delay in replying.
>
>> On Tue, 22 Apr 2014, Daniel Lezcano wrote:
>>
>> >
Hi Laurent,
This version looks good to me.
On Mon, Jun 16, 2014 at 05:07:22PM +0200, Laurent Pinchart wrote:
> Document DT bindings and parse them in the TMU driver.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Laurent Pinchart
Tested-by: Simon Horman
> ---
> .../devicetree/bindings/
Hi Mark,
Could you please review this patchset?
Best Regards,
Chanwoo Choi
On 06/11/2014 09:41 AM, Chanwoo Choi wrote:
> The regulators would set different state/mode according to the kind of suspend
> state. So regulation_constraints structure has already regulator suspend
> state filed.
> Thi
Add support for Samsung S2MPU02 PMIC device to the MFD sec-core driver.
The S2MPU02 device includes PMIC/RTC/Clock devices.
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
---
drivers/mfd/sec-core.c | 46 +++-
drivers/mfd/sec-irq.c| 110 ++
This patch add S2MPU02 regulator device to existing S2MPS11 device driver
because of little difference between S2MPS1x and S2MPU02. The S2MPU02
regulator device includes LDO[1-28] and BUCK[1-7].
Signed-off-by: Chanwoo Choi
[Add missing linear_min_sel of S2MPU02 LDO regulators by Jonghwa Lee]
Sign
This patch add documentation for S2MPU02 PMIC device. S2MPU02 has a little
difference from S2MPS11/S2MPS14 PMIC and has LDO[1-28]/Buck[1-7].
Signed-off-by: Chanwoo Choi
Reviewed-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/mfd/s2mps11.txt | 7 +--
1 file changed, 5 insertio
This patchset add Samsung S2MPU02 PMIC device driver in exiting S2MPS11 PMIC
driver because S2MPU02 has a little different between S2MPU02 and S2MPS1x.
The S2MPU02 PMIC has LDO[1-28] and BUCK[1-7] regulators.
Changes from v5:
- Remove the duplicate code about mfd_add_devices() and regmap_add_irq_c
This patch adds documentation for APM X-Gene SoC ethernet DTS binding.
Signed-off-by: Iyappan Subramanian
Signed-off-by: Ravi Patel
Signed-off-by: Keyur Chudgar
---
.../devicetree/bindings/net/apm-xgene-enet.txt | 72 ++
1 file changed, 72 insertions(+)
create mode 100
This patch adds a MAINTAINERS entry for APM X-Gene SoC
ethernet driver.
Signed-off-by: Iyappan Subramanian
Signed-off-by: Ravi Patel
Signed-off-by: Keyur Chudgar
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 134483f..d65a3be 100644
This patch adds bindings for APM X-Gene SoC ethernet driver.
Signed-off-by: Iyappan Subramanian
Signed-off-by: Ravi Patel
Signed-off-by: Keyur Chudgar
---
arch/arm64/boot/dts/apm-mustang.dts | 4
arch/arm64/boot/dts/apm-storm.dtsi | 30 +++---
2 files changed, 31
Adding APM X-Gene SoC Ethernet driver.
v6: Address comments from v5 review
* added basic ethtool support
* added ndo_get_stats64 call back
* deleted priting Rx error messages
* renamed set_bits to xgene_set_bits to fix kbuild error (make ARCH=powerpc)
v5: Address comments from v4 review
* Documen
On Mon, Jun 16, 2014 at 04:22:11PM +0200, Laurent Pinchart wrote:
> Hi Simon,
>
> On Monday 16 June 2014 17:47:07 Simon Horman wrote:
> > On Sat, Jun 14, 2014 at 06:23:36PM +0200, Laurent Pinchart wrote:
> > > Add the TMU0, TMU1 and TMU2 counters to the r8a7779 device tree and make
> > > them disa
The bindings for CPU enable methods are defined in ".../arm/cpus.txt". As
additional 32-bit ARM CPUS are converted to use the "enable-method" CPU
property to imply a particular set of SMP operations to use, the list of these
methods is likely to become unwieldy. The current documentation already
On 06/04/2014 05:32 AM, Mikko Perttunen wrote:
> This enables the integrated SATA controller on the Tegra124 system-on-chip
> on the Jetson TK1 board and adds regulators for the onboard Molex connector
> commonly used to power SATA devices. The regulators are marked always-on
> since they can be us
On 06/04/2014 05:32 AM, Mikko Perttunen wrote:
> This patch adds device tree binding documentation for the SATA
> controller found on NVIDIA Tegra SoCs.
Just one nit below:
> diff --git a/Documentation/devicetree/bindings/ata/tegra-sata.txt
> b/Documentation/devicetree/bindings/ata/tegra-sata.tx
On 06/16/2014 08:57 AM, Thierry Reding wrote:
> From: Thierry Reding
>
> Assign lanes to the XUSB pads as used on the Jetson TK1.
This series looks OK to me.
Linus, are you OK with my taking it through the Tegra tree? If so, an
ack on patch 2/4 would be great. I expect there will be other serie
On 06/16/2014 08:57 AM, Thierry Reding wrote:
> From: Thierry Reding
>
> This patch adds the device tree binding documentation for the XUSB pad
> controller found on NVIDIA Tegra SoCs. It exposes both pinmuxing and PHY
> capabilities.
This looks fine to me, with one issue below:
> diff --git
>
Hi Hans,
On Mon, Jun 16, 2014 at 08:24:28PM +0200, Hans de Goede wrote:
> Testing has revealed that the temperature in the rtp controller of the A10
> (sun4i) SoC has a resolution of 50 milli degrees / step, where as the
> A13 (sun5i) and later models have 100 milli degrees / step.
>
> Add a new
2014-06-16 10:56 GMT-07:00 Hans de Goede :
> From: Arend van Spriel
>
> The Broadcom bcm43xx sdio devices are fullmac devices that may be
> integrated in ARM platforms. Currently, the brcmfmac driver for
> these devices support use of platform data. This patch specifies
> the bindings that allow t
On 06/16/2014 07:30 AM, Rob Herring wrote:
> On Fri, Jun 13, 2014 at 4:58 PM, Julius Werner wrote:
...
>> Rob Herring wrote:
>>> Don't you need need to keep the kernel from allocating this memory by
>>> using one of the reserved memory mechanisms? The recently added one
>>> should be able to speci
Hi Geert,
On Monday 16 June 2014 18:19:02 Geert Uytterhoeven wrote:
> On Mon, Jun 16, 2014 at 4:22 PM, Laurent Pinchart wrote:
> >> diff --git a/arch/arm/boot/dts/r8a7779.dtsi
> >> b/arch/arm/boot/dts/r8a7779.dtsi index bf716ce..81714ce 100644
> >> --- a/arch/arm/boot/dts/r8a7779.dtsi
> >> +++ b/a
This patch adds documentation describing a device tree binding for the
coreboot firmware. It is meant to be dynamically added during boot and
contains address definitions for the coreboot table (a list of
variable-sized descriptors providing information about various compile-
and run-time generated
On Jun 16, 2014, at 5:04 AM, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Friday 13 June 2014 12:48 AM, Kumar Gala wrote:
>> Add a PHY driver for uses with AHCI based SATA controller driver on the
>> IPQ806x family of SoCs.
>>
>> Signed-off-by: Kumar Gala
>> ---
>> drivers/phy/Kconfig
On Mon, Jun 16, 2014 at 6:30 AM, Rob Herring wrote:
> On Fri, Jun 13, 2014 at 4:58 PM, Julius Werner wrote:
>>> This is just to export a fixed log to userspace (like a DMI table) or
>>> the kernel will actually use the data in some way? Based on the link,
>>> it looks like the former to me.
>>
>>
On 16/06/14 14:12, Opensource [Adam Thomson] wrote:
On Sun, Jun 15, 2014 at 20:49, Jonathan Cameron wrote:
Hi Adam,
Some general comments inline.
It's been a while since I've looked at any particularly similar parts,
but it seems to me that a lot of indirection gets added here that
if anythin
On 06/16/2014 07:35 AM, Tomeu Vizoso wrote:
> Request it based solely on the current mode's refresh rate. More
> accurate requirements can be requested in future patches.
> diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
> + bandwidth = mode->clock * window.bits_per_pixel
On 14/06/14 23:27, Philippe Reynes wrote:
This driver add partial support of the
maxim 1027/1029/1031. Differential mode is not
supported.
It was tested on armadeus apf27 board.
Signed-off-by: Philippe Reynes
I'm happy with this now.
Hartmut, anything else you want to raise, or do you want t
Add a PHY driver for uses with AHCI based SATA controller driver on the
IPQ806x family of SoCs.
Signed-off-by: Kumar Gala
---
v3:
* Added Kconfig HAS_IOMEM dep
* re-ordered probe function so phy_provider_register is last
v2:
* dropped unused dev pointer in struct qcom_ipq806x_sata_phy
* remove
On 06/16/2014 07:35 AM, Tomeu Vizoso wrote:
> Adds functionality for registering memory bandwidth needs and setting
> the EMC clock rate based on that.
>
> Also adds API for setting floor and ceiling frequency rates.
> diff --git
> a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra124-em
This series adds SMP support for two Broadcom mobile SoC families.
It uses CPU_METHOD_OF_DECLARE() so that SMP operations are assigned
using device tree rather than adding it to a machine definition in a
board file.
The enable method starts a secondary core by writing to a register
monitored by CP
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm11351.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
ind
Broadcom mobile SoCs use a ROM-implemented holding pen for
controlled boot of secondary cores. A special register is
used to communicate to the ROM that a secondary core should
start executing kernel code. This enable method is currently
used for members of the bcm281xx and bcm21664 SoC families.
This patch adds SMP support for BCM281XX and BCM21664 family SoCs.
This feature is controlled with a distinct config option such that
an SMP-enabled multi-v7 binary can be configured to run these SoCs
in uniprocessor mode. Since this SMP functionality is used for
multiple Broadcom mobile chip fam
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
currently need.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/configs/bcm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index dcfc5
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm21664.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi
index 8b36682..2016b72 1006
On Mon, Jun 16, 2014 at 08:02:34PM +0200, Javier Martinez Canillas wrote:
> +- max77802,pmic-buck-dvs-gpios: The DVS GPIOs. We'll try to set these GPIOs
> + to match pmic-buck-default-dvs-idx at probe time if they are defined. If
> + some or all of these GPIOs are not defined it's assumed that t
On Mon, Jun 16, 2014 at 08:02:35PM +0200, Javier Martinez Canillas wrote:
> --- a/drivers/mfd/max77802.c
> +++ b/drivers/mfd/max77802.c
> @@ -37,6 +37,7 @@
> #include
>
> static const struct mfd_cell max77802_devs[] = {
> + { .name = "max77802-pmic", },
> };
>
> static bool max77802_p
On 06/09/2014 04:52 PM, Marcel Ziswiler wrote:
> This patch adds the device tree to support Toradex Apalis T30, a
> computer on module which can be used on different carrier boards.
>
> The module consists of a Tegra 3 SoC, two PMICs, 1 or 2 GB of DDR3L
> RAM, eMMC, an LM95245 temperature sensor c
On 05/19/2014 08:35 PM, Dylan Reid wrote:
> Add a device node for the HDA controller found on Tegra124.
I've applied the series to Tegra's for-3.17/dt branch.
--
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More majordo
On 04/30/2014 11:44 AM, Doug Anderson wrote:
> This adds the EC i2c tunnel (and devices under it) to the
> tegra124-venice2 device tree.
I've applied this to Tegra's for-3.17/dt branch.
--
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On 06/09/2014 04:52 PM, Marcel Ziswiler wrote:
> The NVIDIA Tegra 3 based Apalis T30 module contains an Intel i210 resp.
> i211 gigabit Ethernet controller, an STMPE811 ADC/touch controller, I2C
> buses and PWM LEDs generically accessible from user space and an
> LM95245 temperature sensor chip. Th
> -Original Message-
> From: Will Deacon [mailto:will.dea...@arm.com]
> Sent: Monday, June 16, 2014 12:04 PM
> To: Yoder Stuart-B08248
> Cc: Sethi Varun-B16395; Thierry Reding; Mark Rutland;
> devicetree@vger.kernel.org; linux-samsung-...@vger.kernel.org; Pawel
> Moll; Arnd Bergmann; Ian
Driver for the Resource Power Manager (RPM) found in Qualcomm 8660, 8960
and 8064 based devices. The driver exposes resources that child drivers
can operate on; to implementing regulator, clock and bus frequency
drivers.
Signed-off-by: Bjorn Andersson
---
drivers/soc/qcom/Kconfig | 14 ++
d
Add binding for the Qualcomm Resource Power Manager (RPM) found in 8660,
8960 and 8064 based devices. The binding currently describes the rpm
itself and the regulator subnodes.
Signed-off-by: Bjorn Andersson
---
.../devicetree/bindings/soc/qcom/qcom,rpm.txt | 260 +
incl
This series adds a regulator driver for the Resource Power Manager found in
Qualcomm 8660, 8960 and 8064 based devices.
The RPM driver exposes resources to its child devices, that can be accessed to
implement drivers for the regulators, clocks and bus frequency control that's
owned by the RPM in t
Driver for regulators exposed by the Resource Power Manager (RPM) found
in Qualcomm 8660, 8960 and 8064 based devices.
Signed-off-by: Bjorn Andersson
---
drivers/regulator/Kconfig | 12 +
drivers/regulator/Makefile | 1 +
drivers/regulator/qcom_rpm-regulator.c | 787 +
Kukjin,
On Mon, Jun 16, 2014 at 11:14 AM, Stephen Warren wrote:
> On 06/04/2014 04:20 PM, Doug Anderson wrote:
>> All ChromeOS ARM devices that have the standard "CrOS EC" have the
>> same keyboard mapping. It's silly to include this same definition
>> everywhere. Let's create a "dtsi" fragment
Testing has revealed that the temperature in the rtp controller of the A10
(sun4i) SoC has a resolution of 50 milli degrees / step, where as the
A13 (sun5i) and later models have 100 milli degrees / step.
Add a new sun5i-a13-ts compatible to differentiate the newer models and
set the resolution ba
Hi Dmitry and Maxime,
I've learned today that the temperature reported on the A10 / sun4i SoC family
is aprox twice too high, since the A10 rtp controller temperature register
seems to have double the resolution (one bit more) then that of the A13
(sun5i) and later.
Dmitry, can you please add the
The touchscreen controller in the A13 and later has a different temperature
resulution compated to the one in the original A10, change the compatible
for the A13 and later so that the kernel will use the correct resolution.
Reported-by: Tong Zhang
Signed-off-by: Hans de Goede
---
arch/arm/boot/
The MAX77802 PMIC has 10 high-efficiency Buck and 32 Low-dropout
(LDO) regulators. This patch adds support for all these regulators
found on the MAX77802 PMIC and is based on a driver added by Simon
Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas
---
Changes since
On 06/04/2014 04:20 PM, Doug Anderson wrote:
> All ChromeOS ARM devices that have the standard "CrOS EC" have the
> same keyboard mapping. It's silly to include this same definition
> everywhere. Let's create a "dtsi" fragment that we can include from
> many different boards.
>
> This fragment i
This patch adds a dt-binding include for Maxim 77686
PMIC clock IDs that can be to be shared between the
clk-max77686 clock driver and DeviceTree source files.
Signed-off-by: Javier Martinez Canillas
---
drivers/clk/clk-max77686.c | 7 +--
include/dt-bindings/clock/maxim,max
Maxim MAX77802 is a power management chip that contains 10 high
efficiency Buck regulators, 32 Low-dropout (LDO) regulators used
to power up application processors and peripherals, a 2-channel
32kHz clock outputs, a Real-Time-Clock (RTC) and a I2C interface
to program the individual regulators, clo
Maxim Integrated Power Management ICs are very similar with
regard to their clock outputs. Most of the clock drivers for
these chips are duplicating code and are simpler enough that
can be converted to use a generic driver to consolidate code
and avoid duplication.
Signed-off-by: Javier Martinez C
The MAX77802 PMIC has two 32.768kHz Buffered Clock Outputs with
Low Jitter Mode. This patch adds support for these two clocks.
Signed-off-by: Javier Martinez Canillas
---
Changes since v1:
- Use module_platform_driver() instead of having init/exit functions.
Suggested by Mark Brown.
- Use t
Like most clock drivers, the Maxim 77686 PMIC clock binding
follows the convention that the "#clock-cells" property is
used to specify the number of cells in a clock provider.
But the binding document is not clear enough that it shall
be set to 1 since the PMIC support multiple clocks outputs.
Al
Clocks drivers for Maxim PMIC are very similar so they can
be converted to use the generic Maxim clock driver.
Also, while being there use module_platform_driver() helper
macro to eliminate more boilerplate code.
Signed-off-by: Javier Martinez Canillas
---
drivers/clk/Kconfig| 1 +
dr
MAX77802 is a PMIC that contains 10 high efficiency Buck regulators,
32 Low-dropout (LDO) regulators, two 32kHz buffered clock outputs,
a Real-Time-Clock (RTC) and a I2C interface to program the individual
regulators, clocks and the RTC.
This second version of the patch-set addresses several issue
By using the generic IRQ support in the Register map API, it
is possible to get rid of max77686-irq.c and simplify the code.
Suggested-by: Krzysztof Kozlowski
Signed-off-by: Javier Martinez Canillas
---
drivers/mfd/Kconfig | 1 +
drivers/mfd/Makefile | 2 +-
Peach pit board uses a Maxim 77802 power management IC to
drive regulators and its Real Time Clock. This patch adds
support for this chip.
These are the device nodes and pinctrl configuration that
is present on the Peach pit DeviceTree source file in the
the Chrome OS kernel 3.8 tree.
Signed-off-
The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms.
This patch adds support for the RTC and is based on a driver
added by Simon Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas
---
drivers/mfd/max77802.c | 1 +
drivers/rtc/Kconfig| 10 +
dr
From: Arend van Spriel
The Broadcom bcm43xx sdio devices are fullmac devices that may be
integrated in ARM platforms. Currently, the brcmfmac driver for
these devices support use of platform data. This patch specifies
the bindings that allow this platform data to be expressed in the
devicetree.
It has taken me a long long time to get the OOB interrupt working on the
AP6210 sdio wifi/bt module found on various Allwinner A20 boards. In the
end I found these magic register pokes in the cubietruck kernel tree:
https://github.com/cubieboard2/linux-sunxi/commit/7f08ba395617d17e7a711507503d89a50
Signed-off-by: Hans de Goede
---
drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h
b/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h
index 3deab79..6e6a366 1
Hi All,
Here is v2 of the brcmfmac: OOB interrupt support series.
Changes since v1:
-Post as a stand alone series, rather then together with sunxi pinctrl changes,
etc.
-Add a patch to fixup the names of the register addresses used in the
"brcmfmac: Fix OOB interrupt not working for BCM43362" p
From: Chen-Yu Tsai
brcmfmac devices can use an out-of-band interrupt on a GPIO line.
Currently this is specified using platform data. Add support for
specifying out-of-band interrupt via device tree.
Signed-off-by: Chen-Yu Tsai
[ar...@broadcom.com: conditionalize more of-code, use driver debug
On Monday 16 June 2014 18:04:16 Will Deacon wrote:
>
> On Mon, Jun 16, 2014 at 05:56:32PM +0100, Stuart Yoder wrote:
> > > Do you have use-cases where you really need to change these mappings
> > > dynamically?
> >
> > Yes. In the case of a PCI bus-- you may not know in advance how many
> > PCI
On 16/06/2014 19:03, Lee Jones wrote:
> On Mon, 16 Jun 2014, Boris BREZILLON wrote:
>> On 16/06/2014 14:50, Lee Jones wrote:
The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
family or sama5d3 family) exposes 2 subdevices:
- a display controller (controlled by
Mark,
On Mon, Jun 16, 2014 at 9:51 AM, Mark Brown wrote:
> On Mon, Jun 16, 2014 at 09:49:26AM -0700, Doug Anderson wrote:
>
>> Yes please. I think there's supposed to be some official ordering of
>> things. If anyone reading this has a pointer to the official sort
>> order of things in the devi
On Mon, 16 Jun 2014, Boris BREZILLON wrote:
> On 16/06/2014 14:50, Lee Jones wrote:
> >> The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
> >> family or sama5d3 family) exposes 2 subdevices:
> >> - a display controller (controlled by a DRM driver)
> >> - a PWM chip
> >>
> >>
Hi Stuart,
On Mon, Jun 16, 2014 at 05:56:32PM +0100, Stuart Yoder wrote:
> > Do you have use-cases where you really need to change these mappings
> > dynamically?
>
> Yes. In the case of a PCI bus-- you may not know in advance how many
> PCI devices there are until you probe the bus. We have a
> -Original Message-
> From: Will Deacon [mailto:will.dea...@arm.com]
> Sent: Monday, June 16, 2014 10:28 AM
> To: Sethi Varun-B16395
> Cc: Thierry Reding; Mark Rutland; devicetree@vger.kernel.org; linux-
> samsung-...@vger.kernel.org; Pawel Moll; Arnd Bergmann; Ian Campbell;
> Grant Grun
On Mon, Jun 16, 2014 at 09:49:26AM -0700, Doug Anderson wrote:
> Yes please. I think there's supposed to be some official ordering of
> things. If anyone reading this has a pointer to the official sort
> order of things in the device tree I'd love to see it! ;)
Most exact first I believe?
si
Tushar,
On Mon, Jun 16, 2014 at 4:19 AM, Tushar Behera wrote:
> On 06/13/2014 10:33 PM, Doug Anderson wrote:
>> Tushar,
>>
>> On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera wrote:
>>> Peach-pi board has MAX98090 audio codec connected on HSI2C-7 bus.
>>
>> If you want to be a stickler about it,
2014-06-13 14:58 GMT-07:00 Julius Werner :
>> This is just to export a fixed log to userspace (like a DMI table) or
>> the kernel will actually use the data in some way? Based on the link,
>> it looks like the former to me.
>
> I could imagine both. The link is an in-kernel driver that exposes a
>
Hi Laurent,
On Mon, Jun 16, 2014 at 4:22 PM, Laurent Pinchart
wrote:
>> diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
>> index bf716ce..81714ce 100644
>> --- a/arch/arm/boot/dts/r8a7779.dtsi
>> +++ b/arch/arm/boot/dts/r8a7779.dtsi
>> @@ -269,9 +269,10 @@
>> tm
On Mon, Jun 16, 2014 at 5:35 PM, Suman Tripathi wrote:
> Suman Tripathi (2):
> libahci: Implement the function ahci_restart_engine to restart the
> port dma engine.
> ata: Fix the dma state machine lockup for the IDENTIFY DEVICE PIO mode
> command.
>
> drivers/ata/ahci.h | 4 ++
On June 15, 2014 21:19, Jonathon Cameron wrote:
> Hi Adam
>
> Reasonably clean code, but the _ channels stuff doesn't comply with the ABI
> and is rather confusing.
To be honest I did debate this in my head for a while. The reason I went with
the current approach was to make the driver channel l
Hi Varun,
On Thu, Jun 05, 2014 at 08:10:19PM +0100, Varun Sethi wrote:
> > The set of StreamIDs that can be generated by a master is fixed in the
> > hardware. The SMMU can then be programmed to map these incoming IDs onto
> > a context ID (or a set of context IDs), which are the IDs used internal
Document DT bindings and parse them in the MTU2 driver.
Cc: devicetree@vger.kernel.org
Signed-off-by: Laurent Pinchart
Tested-by: Wolfram Sang
---
.../devicetree/bindings/timer/renesas,mtu2.txt | 39 ++
drivers/clocksource/sh_mtu2.c | 8 +
2 fil
Document DT bindings and parse them in the CMT driver.
Cc: devicetree@vger.kernel.org
Signed-off-by: Laurent Pinchart
Tested-by: Simon Horman
---
.../devicetree/bindings/timer/renesas,cmt.txt | 47 +++
drivers/clocksource/sh_cmt.c | 66
Document DT bindings and parse them in the TMU driver.
Cc: devicetree@vger.kernel.org
Signed-off-by: Laurent Pinchart
---
.../devicetree/bindings/timer/renesas,tmu.txt | 39 +
drivers/clocksource/sh_tmu.c | 51 +-
2 files changed, 80
Hello,
This patch set adds DT bindings to the Renesas CMT, MTU2 and TMU timers.
Patches 02/19 to 13/19, 16/19 and 17/19 have already been posted in the
previous version of this series. Patches 14/19, 15/19, 18/19 and 19/19 are
new.
The first 11 patches should go through the timers tree while the
From: Thierry Reding
Assign lanes to the XUSB pads as used on the Jetson TK1.
Signed-off-by: Thierry Reding
---
arch/arm/boot/dts/tegra124-jetson-tk1.dts | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
b/arch/arm/boot/d
From: Thierry Reding
The XUSB pad controller found on NVIDIA Tegra SoCs provides several pads
that lanes can be assigned to in order to support a variety of interface
options: USB 2.0, USB 3.0, PCIe and SATA.
In addition to the pin controller used to assign lanes to pads two PHYs
are exposed to
From: Thierry Reding
This patch adds the device tree binding documentation for the XUSB pad
controller found on NVIDIA Tegra SoCs. It exposes both pinmuxing and PHY
capabilities.
Signed-off-by: Thierry Reding
---
Changes in v2:
- move header file to this patch and refer to it in the binding
- u
From: Thierry Reding
The device tree node in the SoC file contains only the resources (such
as registers, resets, ...) but none of the lane assignment information
since that's board specific and belongs in the board file.
Signed-off-by: Thierry Reding
---
Changes in v2:
- include dt-bindings/pi
On Mon, 16 Jun 2014, Lorenzo Pieralisi wrote:
> On Fri, Jun 13, 2014 at 06:33:35PM +0100, Nicolas Pitre wrote:
> > >idle_state.exit_latency = worst-wakeup-latency
> > >idle_state.target_residency = min-residency-us
> >
> > But exit_latency is not necessarily equal to worst-wakeup-latency.
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