On 22/06/2014 01:51, Jason Cooper wrote:
On Fri, Jun 20, 2014 at 05:01:21PM +0200, Boris BREZILLON wrote:
Export the generic irq map function in order to provide irq_domain ops with
generic mapping and specific of xlate function (needed by the new atmel
AIC driver).
Signed-off-by: Boris
Add support for device-tree device discovery. If devicetree is not
provided, fallback to legacy platform data discovery.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
Cc: devicetree@vger.kernel.org
---
Since V1: change OF id mrvl,pxa27x_udc - marvell,pxa27x-udc
This is a
Add documentation for device-tree binding of arm PXA 27x udc (usb
device) driver.
Signed-off-by: Robert Jarzmik robert.jarz...@free.fr
Cc: devicetree@vger.kernel.org
---
Since V1: change OF id mrvl,pxa27x_udc - marvell,pxa27x-udc
This is a consequence of other DT reviews on the marvell
On Sat, Jun 21, 2014 at 10:53:14PM +0530, Naveen Krishna Ch wrote:
The revisions were pretty quick
Yes, this is part of what I'm concerned about - it often means that
there are problems, either the review wasn't very detailed or the code
is being written too hastily. In this case this is
On Thu, Jun 12, 2014 at 10:33:22AM -0700, Bjorn Andersson wrote:
Driver for regulators exposed by the Resource Power Manager (RPM) found in
Qualcomm 8660, 8960 and 8064 based devices.
This is fine but it looks like it'll need some respins due to the I/O
code.
signature.asc
Description:
On Thu, 2014-06-12 at 22:31 +0530, Jassi Brar wrote:
Introduce common framework for client/protocol drivers and
controller drivers of Inter-Processor-Communication (IPC).
Client driver developers should have a look at
include/linux/mailbox_client.h to understand the part of
the API exposed
Le 14/06/2014 21:01, Marek Vasut a écrit :
On Tuesday, June 10, 2014 at 02:43:15 PM, LABBE Corentin wrote:
Add necessary changes for configuring and compiling the Security System
driver.
Signed-off-by: LABBE Corentin clabbe.montj...@gmail.com
---
drivers/crypto/Kconfig | 91
Le 14/06/2014 21:01, Marek Vasut a écrit :
On Tuesday, June 10, 2014 at 02:43:14 PM, LABBE Corentin wrote:
Add support for the Security System included in Allwinner SoC A20.
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG algorithms.
On Sunday, June 22, 2014 at 01:58:08 PM, Corentin LABBE wrote:
[...]
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation version 2 of the License
The license
On Sunday, June 22, 2014 at 01:58:38 PM, Corentin LABBE wrote:
Le 14/06/2014 21:01, Marek Vasut a écrit :
On Tuesday, June 10, 2014 at 02:43:15 PM, LABBE Corentin wrote:
Add necessary changes for configuring and compiling the Security System
driver.
Signed-off-by: LABBE Corentin
On Sun, Jun 22, 2014 at 02:23:15PM +0200, Marek Vasut wrote:
On Sunday, June 22, 2014 at 01:58:08 PM, Corentin LABBE wrote:
[...]
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the
On Tue, Jun 10, 2014 at 02:43:14PM +0200, LABBE Corentin wrote:
+int sunxi_aes_poll(struct ablkcipher_request *areq)
+{
...
+ if (areq-src == NULL || areq-dst == NULL) {
+ dev_err(ss-dev, ERROR: Some SGs are NULL %u\n, areq-nbytes);
+ return -1;
You return -1 from
On Sunday, June 22, 2014 at 02:33:35 PM, Russell King - ARM Linux wrote:
On Sun, Jun 22, 2014 at 02:23:15PM +0200, Marek Vasut wrote:
On Sunday, June 22, 2014 at 01:58:08 PM, Corentin LABBE wrote:
[...]
+ * This program is free software; you can redistribute it and/or
modify + * it
This patchset adds support for the Active-Semi act8846 PMU [1] to the
existing driver for act8865.
A dts which enables the act8846 on Radxa Rock is available at [2].
[1] http://www.active-semi.com/products/power-management-units/act88xx/
[2] https://github.com/bengal/linux/tree/act88xx-regulator
The driver loops through all available regulators (ACT8865_REG_NUM)
and accesses pdata-regulators[i].platform_data without checking the
actual value of num_regulators in platform data, potentially causing a
invalid memory access.
Fix this and look up the regulator init_data by id in platform
This patch adds a new active-semi,act8846 compatible string and a
list of supported regulator names to the devicetree binding
documentation for Active-Semi PMUs.
Signed-off-by: Beniamino Galvani b.galv...@gmail.com
---
.../devicetree/bindings/regulator/act8865-regulator.txt |7
When platform data is populated from DT all the regulators are
instantiated and the value of num_regulators should be the number of
all available regulators rather than the number of matched ones.
Signed-off-by: Beniamino Galvani b.galv...@gmail.com
---
drivers/regulator/act8865-regulator.c |
This patch prepares support for other devices in the act88xx family of
PMUs manufactured by Active-Semi.
http://www.active-semi.com/products/power-management-units/act88xx/
Signed-off-by: Beniamino Galvani b.galv...@gmail.com
---
drivers/regulator/act8865-regulator.c | 212
Add device id and definition of registers and regulators to support
the act8846 PMU.
Signed-off-by: Beniamino Galvani b.galv...@gmail.com
---
drivers/regulator/act8865-regulator.c | 71 +
include/linux/regulator/act8865.h | 17
2 files changed, 88
On Mon, Jun 16, 2014 at 4:56 PM, Tushar Behera trbli...@gmail.com wrote:
On 06/11/2014 09:28 PM, Javier Martinez Canillas wrote:
On Wed, Jun 11, 2014 at 7:32 AM, Tushar Behera tusha...@samsung.com wrote:
Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux.
As per the user
I have some framebuffer drivers [1] for LCD controllers with onboard
RAM, targeted at small displays (10).
I'm now going to rewrite these drivers from scratch and add DT support.
The controllers have many registers that controls various parameters to
match the attached panel.
Since a
On Sunday 22 June 2014 19:37:56 Noralf Trønnes wrote:
I see two possibilities:
* add a special marker value to separate the registers, as I do now
* add a flag to indicate a register number. So far I've only seen 8 and
16-bit register number widths: register 20h could thus be written as
On Sat, Jun 21, 2014 at 4:06 AM, Steffen Trumtrar
s.trumt...@pengutronix.de wrote:
On Fri, Jun 20, 2014 at 06:22:02PM -0500, ttha...@altera.com wrote:
From: Thor Thayer ttha...@altera.com
Addition of the Altera SDRAM EDAC bindings and device tree changes
v2: Changes to SoC EDAC source code.
On Sun, Jun 22, 2014 at 01:31:02PM -0500, Thor Thayer wrote:
On Sat, Jun 21, 2014 at 4:04 AM, Steffen Trumtrar
s.trumt...@pengutronix.de wrote:
Hi!
On Fri, Jun 20, 2014 at 06:22:01PM -0500, ttha...@altera.com wrote:
From: Thor Thayer ttha...@altera.com
Addition of the Altera SDRAM
Den 22.06.2014 20:18, skrev Arnd Bergmann:
On Sunday 22 June 2014 19:37:56 Noralf Trønnes wrote:
I see two possibilities:
* add a special marker value to separate the registers, as I do now
* add a flag to indicate a register number. So far I've only seen 8 and
16-bit register number widths:
On Friday 20 June 2014 03:46 PM, Rob Herring wrote:
On Fri, Jun 20, 2014 at 2:02 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On Friday 20 June 2014 02:56 PM, Arnd Bergmann wrote:
On Friday 20 June 2014 13:17:43 Santosh Shilimkar wrote:
+ dma-coherent;
+
It's 1.6 GHz for the Cortex-A15.
Avoids warnings like /cpus/cpu@0 missing clock-frequency property.
Signed-off-by: Andreas Färber afaer...@suse.de
---
arch/arm/boot/dts/exynos5410.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5410.dtsi
On 20/06/2014 17:01, Boris BREZILLON wrote:
Add new atmel AIC (Advanced Interrupt Controller) driver based on the
generic chip infrastructure.
This driver is only compatible with dt enabled board and replaces the old
implementation found in arch/arm/mach-at91/irq.c.
Signed-off-by: Boris
This add bindings documentation for the clock and reset unit found on
rk3188 and rk3066 SoCs from Rockchip.
Also deprecate the old gate clock binding, as these shouldn't be used
in the future.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
.../bindings/clock/rockchip,rk3188-cru.txt |
This adds the dt-binding documentation for the clock and reset unit found on
Rockchip rk3288 SoCs.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
.../bindings/clock/rockchip,rk3288-cru.txt | 61 ++
1 file changed, 61 insertions(+)
create mode 100644
add #reset-cells to socfpga.dtsi. This was missing from the
latest updates and caused the socfpga reset controller to fail
to load like so:
ffd05000.rstmgr: /soc/rstmgr@ffd05000 missing #reset-cells property
probe of ffd05000.rstmgr failed with error -22
Signed-off-by: Vince Bridgers
This patch series updates the the socfpga_defconfig with a number of options,
and updates the socfpga device tree with a field required for the reset
controller driver.
Vince Bridgers (2):
ARM: socfpga: Update socfpga_defconfig
ARM: socfpga: Add missing #reset-cells to socfpga device tree
CONFIG_PM=y
CONFIG_SUSPEND=y
CONFIG_MMC_UNSAFE_RESUME=y
CONFIG_DWMAC_SOCFPGA=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_DWC2_HOST=y
CONFIG_USB_DWC2_PLATFORM=y
CONFIG_FHANDLE=y
CONFIG_I2C=y
CONFIG_I2C_DESIGNWARE_CORE=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_CHARDEV=y
CONFIG_CAN=y
It's LDO2, not LD02.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/mfd/s2mps11.txt | 2 +-
Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
Adds initial support for the HP Chromebook 11.
Cc: Vincent Palatin vpala...@chromium.org
Cc: Doug Anderson diand...@chromium.org
Cc: Stephan van Schaik step...@synkhronix.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
arch/arm/boot/dts/Makefile | 1 +
It's vsys-l{1,2}-supply, not vsys_l{1,2}-supply.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/regulator/tps65090.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/regulator/tps65090.txt
It's 1, not 1.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/mfd/s2mps11.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/s2mps11.txt
b/Documentation/devicetree/bindings/mfd/s2mps11.txt
index
On Saturday, June 21, 2014 12:31 AM, Murali Karicheri wrote:
On 6/17/2014 8:08 PM, Bjorn Helgaas wrote:
On Tue, Jun 10, 2014 at 02:51:19PM -0400, Murali Karicheri wrote:
This patch adds a PCIe controller driver for Keystone SoCs. This
is based on v1 of the series posted to the mailing list.
On Mon, Jun 23, 2014 at 6:51 AM, Andreas Färber afaer...@suse.de wrote:
It's LDO2, not LD02.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/mfd/s2mps11.txt | 2 +-
Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt | 2 +-
On Mon, Jun 23, 2014 at 6:51 AM, Andreas Färber afaer...@suse.de wrote:
It's 1, not 1.
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/mfd/s2mps11.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Richard Retanubun rretanubun.w...@gmail.com
Date: Fri, 20 Jun 2014 10:11:07 -0400
Fixes commit 3be2a49e5c08 (of: provide a binding for fixed link PHYs)
Fix the parsing of the new fixed link dts bindings for duplex,
pause, and asym_pause by using the correct device node pointer.
On Wed, Jun 18, 2014 at 6:04 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
On Tue, Jun 17, 2014 at 10:52:46PM +0800, Chen-Yu Tsai wrote:
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/clk-sunxi.c
On Sat, Jun 21, 2014 at 02:47:27AM +0800, Murali Karicheri wrote:
On 6/18/2014 3:05 AM, Pratyush Anand wrote:
Hi Murali,
On Wed, Jun 11, 2014 at 02:51:21AM +0800, Murali Karicheri wrote:
[...]
Pratyush,
Thanks for the comments.
This is IP specific code and another driver that has
On Sat, Jun 21, 2014 at 05:17:07AM +0800, Murali Karicheri wrote:
Sorry, my previous response was in html and not sure it has made to the
list. I did
get an error as well. So resending my response.
On 6/18/2014 6:14 AM, Mohit KUMAR DCG wrote:
Hello Murali,
[...]
*pos = pos0;
Hello Murali,
-Original Message-
From: Pratyush ANAND
Sent: Monday, June 23, 2014 10:36 AM
To: Murali Karicheri
Cc: linux-arm-ker...@lists.infradead.org; linux-ker...@vger.kernel.org;
linux-...@vger.kernel.org; devicetree@vger.kernel.org; linux-
d...@vger.kernel.org; Shilimkar,
On Sat, Jun 21, 2014 at 03:05:30AM +0800, Arnd Bergmann wrote:
On Friday 20 June 2014 13:11:37 Santosh Shilimkar wrote:
Arnd suggestion was to have the version 3.65 code in generic place since
its IP specific and just in case some other vendor using the same version
can leverage the
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