Sun, 31 Aug 2014 00:00:57 +0200 от Philippe Reynes :
>
> Signed-off-by: Philippe Reynes
> ---
> arch/arm/boot/dts/imx27-apf27dev.dts | 17 +
> 1 files changed, 17 insertions(+), 0 deletions(-)
>
> Changelog:
> v2: (thanks Alexander Shiyan for the feedback)
> - spi mode 0 is t
Signed-off-by: Zhangfei Gao
---
arch/arm/boot/dts/hisi-x5hd2.dtsi | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi
b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 7b1cb53..1d7cd04 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch
From: Guoxiong Yan
IR transmitter driver for Hisilicon hix5hd2 soc
By default all protocols are disabled.
For example nec decoder can be enabled by either
1. ir-keytable -p nec
2. echo nec > /sys/class/rc/rc0/protocols
See see Documentation/ABI/testing/sysfs-class-rc
Signed-off-by: Guoxiong Yan
From: Guoxiong Yan
Signed-off-by: Guoxiong Yan
Signed-off-by: Zhangfei Gao
---
.../devicetree/bindings/media/hix5hd2-ir.txt | 25
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/hix5hd2-ir.txt
diff --git a/Documentation
v4:
Change sequence and some comments from Sean and Varka
v3:
Got info from Mauro, 3.17 disable all protocol by default, specific protocol
can be selected via ir-keytable and /sys/class/rc/rc0/protocols
Got suggestion from Sean, add rdev specific info, like timeout, resoluton.
Add optional proper
Signed-off-by: Philippe Reynes
---
arch/arm/boot/dts/imx27-apf27dev.dts | 17 +
1 files changed, 17 insertions(+), 0 deletions(-)
Changelog:
v2: (thanks Alexander Shiyan for the feedback)
- spi mode 0 is the default so no need to explicitly define it
diff --git a/arch/arm/boo
On Mon, Aug 18, 2014 at 10:08:22AM -0700, Andrew Bresticker wrote:
> Add support for the on-chip xHCI host controller present on Tegra SoCs.
>
> The driver is currently very basic: it loads the controller with its
> firmware, starts the controller, and is able to service messages sent
> by the con
Am Samstag, 30. August 2014, 21:15:53 schrieb Jonathan Cameron:
> On 30/08/14 14:07, Heiko Stübner wrote:
> > Older Rockchip SoCs, at least the rk3066, used a slightly modified saradc
> > for temperature measurements. This so called tsadc does not contain any
> > active parts like temperature inter
On 30/08/14 14:07, Heiko Stübner wrote:
> Older Rockchip SoCs, at least the rk3066, used a slightly modified saradc
> for temperature measurements. This so called tsadc does not contain any
> active parts like temperature interrupts and only supports polling the
> current temperature. The returned
On 30/08/14 13:41, Heiko Stübner wrote:
> Am Donnerstag, 7. August 2014, 15:15:52 schrieb Jonathan Cameron:
>> On 23/07/14 22:24, Heiko Stübner wrote:
>>> This add the necessary binding documentation for the saradc found in all
>>> recent processors from Rockchip.
>>>
>>> Signed-off-by: Heiko Stueb
Add the sample and output clocks for the MMC phase support.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun4i-a10.dtsi | 104 +++---
arch/arm/boot/dts/sun5i-a10s.dtsi | 79 ++---
arch/arm/boot/dts/sun5i-a13.dtsi | 80
The MMC clock we thought we had until now are actually not one but three
different clocks.
The main one is unchanged, and will have three outputs:
- The clock fed into the MMC
- a sample and output clocks, to deal with when should we output/sample data
to/from the MMC bus
The phase contro
Even though the mbus clock is a regular module clock, given its nature, it
needs to be enabled all the time.
Introduce a new compatible, to differentiate it from the other module clocks.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/
From: Mike Turquette
A common operation for a clock signal generator is to shift the phase of
that signal. This patch introduces a new function to the clk.h API to
dynamically adjust the phase of a clock signal. Additionally this patch
introduces support for the new function in the common clock f
Now that we have proper support to use the generic phase API in our clock
driver, switch the MMC driver to use it.
Signed-off-by: Maxime Ripard
Acked-by: Ulf Hansson
---
.../devicetree/bindings/mmc/sunxi-mmc.txt | 8 +--
drivers/mmc/host/sunxi-mmc.c | 72
The current phase API doesn't look into the actual hardware to get the phase
value, but will rather get it from a variable only set by the set_phase
function.
This will cause issue when the client driver will never call the set_phase
function, where we can end up having a reported phase that will
CLK_OF_DECLARE relies on OF_DECLARE_1 that is defined in of.h. Fixes build
errors when one use CLK_OF_DECLARE but doesn't include of.h
Signed-off-by: Maxime Ripard
---
include/linux/clk-provider.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/clk-provider.h b/include/linux/cl
Move the MBUS clock to the module clocks file. It's pretty trivial, but still
requires to enable the clocks to make sure it won't get disabled.
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi/clk-mod0.c | 12 +
drivers/clk/sunxi/clk-sunxi.c | 57 --
Since we know have the ability to declare factors clock outside of clk-sunxi,
create a new mod0 driver to deal with the mod0 clocks.
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi/Makefile| 1 +
drivers/clk/sunxi/clk-mod0.c | 82 +++
drivers/clk/
Now that we have a compatible of its own for the mbus clock, switch to it.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 2 +-
arch/arm/boot/dts/sun5i-a13.dtsi | 2 +-
arch/arm/boot/dts/sun7i-a20.dtsi | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a
Until now, the factors clock probing was done directly by sunxi_init_clocks,
with the factors registration being called directly with the clocks data passed
as an argument.
This approch has shown its limits when we added more clocks, since we couldn't
really split code with such a logic in smaller
Now that we don't have any user left for our custom phase function, we can
safely remove this hack from the code.
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi/clk-sunxi.c | 37 -
include/linux/clk/sunxi.h | 22 --
2 files changed,
Hi everyone,
Here is an attempt at improving the MMC clock support in the Allwinner
SoCs.
Until now, the MMC clocks were having a custom phase function that was
directly setting an obscure value in the right register, because we
were not really having any idea of what these values were.
Now that
Am Freitag, 29. August 2014, 21:30:43 schrieb Doug Anderson:
> Jianqun,
>
> On Fri, Aug 29, 2014 at 3:07 PM, Jianqun wrote:
> > Add optional power setting for i2s controller found on rk3066, rk3168 and
> > rk3288 processors from rockchip, should according to hardware design.
> >
> > Default sett
On Fri, Aug 29, 2014 at 03:09:56PM -0700, Jianqun wrote:
> changes:
> * add snd_soc_dai_init_dma_data
> * fix duplicated argument to "I2S_DMACR_TDE_DISABLE"
> * set 1.8v or 3.3v power for I2S controller by GRF interface
> * enable "hclk" always
> * dma maxburst change to 16
>
> Requested on RK3XXX
Arnd,
On Fri, Aug 29, 2014 at 09:53:42PM +0200, Arnd Bergmann wrote:
> On Friday 29 August 2014 17:04:28 Thierry Reding wrote:
> > static struct irq_chip *extn;
> >
> > void gic_arch_register(const struct irqchip *chip)
> > {
> > if (WARN(extn != NULL))
> >
Sat, 30 Aug 2014 15:22:12 +0200 от Philippe Reynes :
>
> Signed-off-by: Philippe Reynes
> ---
> arch/arm/boot/dts/imx27-apf27dev.dts | 20
> 1 files changed, 20 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts
> b/arch/arm/boot/dts/imx2
On 08/29/2014 11:41 AM, Varka Bhadram wrote:
On 08/28/2014 08:46 PM, Zhangfei Gao wrote:
From: Guoxiong Yan
IR transmitter driver for Hisilicon hix5hd2 soc
By default all protocols are disabled.
For example nec decoder can be enabled by either
1. ir-keytable -p nec
2. echo nec > /sys/class/
Hi, Sean
On 08/29/2014 12:22 AM, Sean Young wrote:
On Thu, Aug 28, 2014 at 11:16:16PM +0800, Zhangfei Gao wrote:
From: Guoxiong Yan
IR transmitter driver for Hisilicon hix5hd2 soc
By default all protocols are disabled.
For example nec decoder can be enabled by either
1. ir-keytable -p nec
2.
Signed-off-by: Philippe Reynes
---
arch/arm/boot/dts/imx27-apf27dev.dts | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts
b/arch/arm/boot/dts/imx27-apf27dev.dts
index b982309..25b9ecd 100644
--- a/arch/arm/boot/dts/
On Sat, Aug 30, 2014 at 02:50:24PM +0200, Beniamino Galvani wrote:
> This driver supports the 3 DCDC and 7 LDO regulators available on
> Ricoh RN5T618 PMIC.
Applied, thanks.
signature.asc
Description: Digital signature
Older Rockchip SoCs, at least the rk3066, used a slightly modified saradc
for temperature measurements. This so called tsadc does not contain any
active parts like temperature interrupts and only supports polling the
current temperature. The returned voltage can then be converted by a
suitable ther
This adds a driver for the watchdog timer available in Ricoh RN5T618
PMIC. The device supports a programmable expiration time of 1, 8, 32
or 128 seconds.
Signed-off-by: Beniamino Galvani
---
drivers/watchdog/Kconfig | 11 +++
drivers/watchdog/Makefile |1 +
drivers/watchdog/rn5t
This adds the device tree bindings documentation for Ricoh RN5T618.
Signed-off-by: Beniamino Galvani
Reviewed-by: Mark Brown
---
Documentation/devicetree/bindings/mfd/rn5t618.txt | 36 +
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings
This driver supports the 3 DCDC and 7 LDO regulators available on
Ricoh RN5T618 PMIC.
Signed-off-by: Beniamino Galvani
---
drivers/regulator/Kconfig |6 ++
drivers/regulator/Makefile|1 +
drivers/regulator/rn5t618-regulator.c | 143 +++
Ricoh RN5T618 is a power management IC which integrates 3 step-down
DCDC converters, 7 low-dropout regulators, a Li-ion battery charger,
fuel gauge, ADC, GPIOs and a watchdog timer.
This commit adds a MFD core driver to support the I2C communication
with the device.
Signed-off-by: Beniamino Galva
Ricoh RN5T618 is a power management IC which includes 3 step-down DCDC
converters, 7 low-dropout regulators, a Li-ion battery charger, fuel
gauge, ADC, GPIOs and a watchdog timer.
This series adds a MFD core driver and separate drivers to support the
regulator and watchdog functionalities.
The pa
Am Donnerstag, 7. August 2014, 15:15:52 schrieb Jonathan Cameron:
> On 23/07/14 22:24, Heiko Stübner wrote:
> > This add the necessary binding documentation for the saradc found in all
> > recent processors from Rockchip.
> >
> > Signed-off-by: Heiko Stuebner
>
> Applied to the togreg branch of
Am Freitag, 29. August 2014, 21:51:46 schrieb Doug Anderson:
> Santosh,
>
> On Thu, Aug 28, 2014 at 2:26 PM, Santosh Shilimkar
>
> wrote:
> > On Thursday 28 August 2014 03:36 PM, Doug Anderson wrote:
> >> These two patches add support for automatically configuring the IO
> >> voltage domains on
On 29/08/14 15:26, Laurentiu Palcu wrote:
> Add support for enumerating the device through ACPI.
>
> Signed-off-by: Laurentiu Palcu
Mostly fine, but I'm unclear on why we have a cast to a char * for name.
Maybe I just haven't had enough coffee this morning :)
Jonathan
> ---
> drivers/staging/ii
On 29/08/14 15:26, Laurentiu Palcu wrote:
> Intersil chips ISL29018, ISL29023 and ISL29035 are very similar. They're
> all ambience light sensors. The ISL29018, however, is also a proximity
> sensor. The registers are similar too:
>
> -+--+--
> AVAILABLE IN | ADDR REG |
On 29/08/14 15:26, Laurentiu Palcu wrote:
> isl29108 was used, instead of isl29018.
>
> Signed-off-by: Laurentiu Palcu
Applied to the togreg branch of iio.git - initially pushed out as testing for
the
autobuilders to play.
Thanks,
Jonathan
> ---
> drivers/staging/iio/light/isl29018.c | 8
On 27/08/14 13:19, Vignesh R wrote:
> Refactor DT parsing into a seperate function from probe() to
> help addition of more DT parameters later.
>
> No functional changes.
>
> Signed-off-by: Vignesh R
Entirely sensible, will pick up once we have sorted patch 2.
> ---
> drivers/iio/adc/ti_am335x_
On 27/08/14 13:19, Vignesh R wrote:
> Number of averaging, open delay, sample delay are made DT parameters.
> By decreasing averaging and delays more samples can be obtained per
> second increasing performance of ADC. Previously the number of
> averages per step was fixed to 16. Making these parame
On 28/08/14 08:11, Lee Jones wrote:
> On Thu, 28 Aug 2014, Vignesh R wrote:
>> On Wednesday 27 August 2014 07:26 PM, Lee Jones wrote:
>>> On Wed, 27 Aug 2014, Vignesh R wrote:
>>>
Number of averaging, open delay, sample delay are made DT parameters.
By decreasing averaging and delays more
On 29/08/14 13:08, Huang Tao wrote:
> Dear Eduardo Bezerra Valentin:
>
> 在 2014年08月29日 19:39, edubez...@gmail.com 写道:
>> Hello Zhao,
>>
>> On Thu, Aug 28, 2014 at 9:54 PM, 赵仪峰 wrote:
>>> Hi Heiko，
>>>
>>>The TS-ADC on RK3288 has two component, a tsadc and a tsadc controller.
>>> The tsadc con
On Friday 29 August 2014 15:14:31 Andrew Bresticker wrote:
> Define a generic MIPS_GIC_IRQ_BASE which is suitable for Malta and
> the upcoming Danube board in . Since Sead-3 is
> different and uses a MIPS_GIC_IRQ_BASE equal to the CPU IRQ base (0),
> define its MIPS_GIC_IRQ_BASE in .
>
> Signed-o
On Friday 29 August 2014 15:14:32 Andrew Bresticker wrote:
> Add device-tree support for the MIPS GIC. With DT, no per-platform
> static device interrupt mapping is supplied and instead all device
> interrupts are specified through the DT. The GIC-to-CPU interrupts
> must also be specified in the
On Friday 29 August 2014 15:14:30 Andrew Bresticker wrote:
> The Global Interrupt Controller (GIC) present on certain MIPS systems
> can be used to route external interrupts to individual VPEs and CPU
> interrupt vectors. It also supports a timer and software-generated
> interrupts.
>
> Signed-of
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