Hi,
On Saturday 30 August 2014 03:13 PM, Jonathan Cameron wrote:
On 27/08/14 13:19, Vignesh R wrote:
Number of averaging, open delay, sample delay are made DT parameters.
By decreasing averaging and delays more samples can be obtained per
second increasing performance of ADC. Previously the
Hi Simon,
On Mon, Sep 1, 2014 at 3:45 AM, Simon Horman ho...@verge.net.au wrote:
On Mon, Sep 01, 2014 at 09:55:45AM +0900, Simon Horman wrote:
On Fri, Aug 29, 2014 at 10:26:01AM +0200, Geert Uytterhoeven wrote:
If so I would prefer a slightly re-structured title:
ARM: shmobile: Add
Hi Xiubo
Thank you for your patch.
This clean-up is very nice for me.
But, I have 1 small comment
asoc_simple_card_sub_parse_of(struct device_node *np,
struct asoc_simple_dai *dai,
struct device_node **p_node,
-
Hi Xiubo
Thank you for your patch.
This clean-up is very nice for me.
But, I have 1 small comment
asoc_simple_card_sub_parse_of(struct device_node *np,
struct asoc_simple_dai *dai,
struct device_node **p_node,
-
Hi Felipe,
On Fri, Aug 29, 2014 at 12:46 AM, Felipe Balbi ba...@ti.com wrote:
hi,
On Thu, Aug 28, 2014 at 01:31:58PM +0530, Vivek Gautam wrote:
@@ -457,11 +458,19 @@ static int exynos5_usbdrd_phy_power_on(struct phy *phy)
clk_prepare_enable(phy_drd-ref_clk);
/* Enable VBUS
On Thu, Aug 28, 2014 at 8:36 PM, Daniele Forsi dfo...@gmail.com wrote:
2014-08-28 10:02 GMT+02:00 Vivek Gautam:
This USB 3.0 PHY controller is also present on Exynos7
platform, so adding the dependency on ARCH_EXYNOS7 for this driver.
+++ b/drivers/phy/Kconfig
@@ -186,7 +186,7 @@ config
Third attempt. Delta to patch V2:
- Separated diode and resistor setup properties
- Updated documentation accordingly
- Explicitly told when to use optional 'trickle' properties.
Worth noting: Only ds1339 dt binding is supported because this is the
only chip I have. I _assume_ the
On 08/27/2014 10:11 PM, Lee Jones wrote:
This adds driver to support HiSilicon Hi6421 PMIC. Hi6421 includes multi-
functions, such as regulators, codec, ADCs, Coulomb counter, etc.
This driver includes core APIs _only_.
Drivers for individul components, like voltage regulators, are
On Thu, Aug 28, 2014 at 06:11:53PM +0200, Arnd Bergmann wrote:
On Thursday 28 August 2014 17:31:16 Thierry Reding wrote:
+ interrupt-controller@60004000 {
+ compatible = nvidia,tegra114-ictlr,
nvidia,tegra30-ictlr;
+ reg = 0x60004000 0x40, /* primary
On Mon, 01 Sep 2014, Abhilash Kesavan wrote:
Add intial PMU settings for exynos7. This is required for
future suspend-to-ram and cpuidle support.
Signed-off-by: Eunseok Choi es10.c...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
---
This patch has been tested on an
On Sun, Aug 31, 2014 at 10:40:29PM +0200, Philippe Reynes wrote:
Signed-off-by: Philippe Reynes trem...@gmail.com
---
arch/arm/boot/dts/imx27-apf27dev.dts | 17 +
1 files changed, 17 insertions(+), 0 deletions(-)
Changelog:
v3: (thanks Alexander Shiyan for the
On Sat, 30 Aug 2014, Beniamino Galvani wrote:
Ricoh RN5T618 is a power management IC which integrates 3 step-down
DCDC converters, 7 low-dropout regulators, a Li-ion battery charger,
fuel gauge, ADC, GPIOs and a watchdog timer.
This commit adds a MFD core driver to support the I2C
On Sat, 30 Aug 2014, Beniamino Galvani wrote:
Ricoh RN5T618 is a power management IC which integrates 3 step-down
DCDC converters, 7 low-dropout regulators, a Li-ion battery charger,
fuel gauge, ADC, GPIOs and a watchdog timer.
This commit adds a MFD core driver to support the I2C
On Sat, 30 Aug 2014, Beniamino Galvani wrote:
This adds the device tree bindings documentation for Ricoh RN5T618.
Signed-off-by: Beniamino Galvani b.galv...@gmail.com
Reviewed-by: Mark Brown broo...@linaro.org
---
Documentation/devicetree/bindings/mfd/rn5t618.txt | 36
This patchset adds an MFD core driver and a regulator driver for Hi6421 PMIC
SoC.
Hi6421 is a PMIC SoC designed and manufactured by HiSilicon Ltd. It includes
multi-functions, such as regulators, codec, ADCs, Coulomb counter, etc.
Hi6421 can be used in various Hi3620 SoC based boards. Registers
Add documentation for HiSilicon Hi6421 PMIC dt binding.
Signed-off-by: Guodong Xu guodong...@linaro.org
---
Documentation/devicetree/bindings/mfd/hi6421.txt | 38
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/hi6421.txt
diff
Add Hi6421 MFD dts node and regulator nodes into hi3620-hi4511
board config dts file.
Signed-off-by: Guodong Xu guodong...@linaro.org
---
arch/arm/boot/dts/hi3620-hi4511.dts | 233
1 file changed, 233 insertions(+)
diff --git
This adds driver to support HiSilicon Hi6421 PMIC. Hi6421 includes multi-
functions, such as regulators, codec, ADCs, Coulomb counter, etc.
This driver includes core APIs _only_.
Drivers for individul components, like voltage regulators, are
implemented in corresponding driver directories and
On Sat, 30 Aug 2014, Inha Song wrote:
Some boards need to set the INn_MODE[1:0] register to change
the input signal patch. This wlf,inmode property is optional.
If present, values must be specified less than or equal to
the number of input singals. If values less than the number
of input
On Sunday 31 August 2014 11:54:04 Andrew Bresticker wrote:
On Sat, Aug 30, 2014 at 12:57 AM, Arnd Bergmann a...@arndb.de wrote:
On Friday 29 August 2014 15:14:31 Andrew Bresticker wrote:
Define a generic MIPS_GIC_IRQ_BASE which is suitable for Malta and
the upcoming Danube board in
On Sat, 30 Aug 2014, Inha Song wrote:
This patch update DT binding to support INn_MODE init_data. Each
input signal path can be configurated either as a Analogue or
Digital using the INn_MODE registers.
Signed-off-by: Inha Song ideal.s...@samsung.com
Reviewed-by: Charles Keepax
On Saturday 30 August 2014 11:54:59 Jason Cooper wrote:
I have to admit I don't really understand how these work, but what
I'd expect to work better is a way to turn the gic code into more
of a library that can be used by specialized drivers. In that
case you would register a driver for
On Fri, Aug 29, 2014 at 09:53:42PM +0200, Arnd Bergmann wrote:
On Friday 29 August 2014 17:04:28 Thierry Reding wrote:
static struct irq_chip *extn;
void gic_arch_register(const struct irqchip *chip)
{
if (WARN(extn != NULL))
On Mon, Sep 01, 2014 at 09:32:33AM +0100, Lee Jones wrote:
On Sat, 30 Aug 2014, Inha Song wrote:
Some boards need to set the INn_MODE[1:0] register to change
the input signal patch. This wlf,inmode property is optional.
If present, values must be specified less than or equal to
the
On Mon, Sep 01, 2014 at 09:34:00AM +0100, Lee Jones wrote:
On Sat, 30 Aug 2014, Inha Song wrote:
This patch update DT binding to support INn_MODE init_data. Each
input signal path can be configurated either as a Analogue or
Digital using the INn_MODE registers.
Signed-off-by: Inha
On Fri, Aug 29, 2014 at 10:22:21AM +0800, Xiubo Li wrote:
This was added by:
Commit 8128c4f36 (ARM: dts: vf610-twr: Add simple-card support.)
This useless property may cause some confusions for users.
Signed-off-by: Xiubo Li li.xi...@freescale.com
Applied, thanks.
--
To unsubscribe from
This is the initial version of the RK808 PMIC. This is a power management IC
for multimedia products.
It provides regulators that are able to supply power to processor cores
and other components. The chip provides other modules including RTC, Clockout
Changes in v7:
Advices by Mark Rutland
-
Add device tree bindings documentation and a header file
for rockchip's RK808 pmic.
Signed-off-by: Chris Zhong z...@rock-chips.com
Signed-off-by: Zhang Qing zhangq...@rock-chips.com
---
Changes in v7:
Advices by Mark Rutland
- modify description about clock-cells
- update the example
Changes
On 26 August 2014 23:32, Hauke Mehrtens ha...@hauke-m.de wrote:
On 08/25/2014 09:52 AM, Arnd Bergmann wrote:
On Sunday 24 August 2014 23:24:41 Hauke Mehrtens wrote:
drivers/misc/Kconfig | 14 +
drivers/misc/Makefile | 1 +
On Fri, 29 Aug 2014, Nishanth Menon wrote:
On 08/29/2014 05:56 AM, Lee Jones wrote:
On Tue, 19 Aug 2014, Nishanth Menon wrote:
With the recent pinctrl-single changes, omaps can treat wake-up events
from deeper idle states as interrupts.
Let's add support for the optional second
This patch would break the current syntax without introducing any
improvements over it (actually the opposite, see bellow). So in its
current form I don't like this patch at all.
On 08/29/2014 09:46 AM, Xiubo Li wrote:
This patch merge single DAI link and muti-DAI links code together,
and
The RK808 chip is a power management IC for multimedia and handheld
devices. It contains the following components:
- Regulators
- RTC
- Clkout
The RK808 core driver is registered as a platform driver and provides
communication through I2C with the host device for the different
components.
Adding RTC driver for supporting RTC device present inside RK808 PMIC.
Signed-off-by: Chris Zhong z...@rock-chips.com
Signed-off-by: Zhang Qing zhangq...@rock-chips.com
---
Changes in v7:
Adviced by doug
- read rtc time from shadowed registers
Adviced by Dmitry
- use CONFIG_PM_SLEEP replace
On 27/08/2014 11:52, Bo Shen :
Add the port number and vbus property for ohci port, or else if
bootloader won't configure the vbus pin, the 5v supply is not
power on, so can not work with usb devices.
Signed-off-by: Bo Shen voice.s...@atmel.com
Ok, thanks:
Acked-by: Nicolas Ferre
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
Changes in v7:
Adviced by doug
-fix coding style problems
Changes in v6:
Adviced by doug
- use correct argument call of_clk_add_provider in probe
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v7:
- remove pdata struct from header file, add rk808_regulator struct
Changes in v6:
- remove the redundant code
Changes in v5:
- re-edit base on Mark's branch
Changes in v4:
- use client-dev replace rk808-dev
Changes in v3: None
2014-08-31 19:18 GMT+02:00 Laurent Pinchart laurent.pinch...@ideasonboard.com:
Hi Jean-Michel,
Thank you for the patch.
On Friday 29 August 2014 17:15:03 Jean-Michel Hautbois wrote:
This patch uses DT in order to parse addresses for dummy devices of adv7604.
The ADV7604 has thirteen
On Mon, 01 Sep 2014, Chris Zhong wrote:
The RK808 chip is a power management IC for multimedia and handheld
devices. It contains the following components:
- Regulators
- RTC
- Clkout
The RK808 core driver is registered as a platform driver and provides
communication through I2C with
The AUO B116XW03 is a 11.6 HD TFT LCD panel connecting to a LVDS
interface and with an integrated LED backlight unit.
This panel is used on the Samsung Chromebook(XE303C12).
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
.../devicetree/bindings/panel/auo,b116xw03.txt |7 ++
Hi,
On Sun, Aug 31, 2014 at 12:15:50PM +0200, Hans de Goede wrote:
Hi,
On 08/30/2014 10:03 PM, Maxime Ripard wrote:
The current phase API doesn't look into the actual hardware to get the phase
value, but will rather get it from a variable only set by the set_phase
function.
This
On Mon, Sep 01, 2014 at 11:40:18AM +0900, Gyungoh Yoo wrote:
Adding compatible attribute for SKY81452 regulator driver.
Required properties:
+- compatible : Must be skyworks,sky81452-regulator
Why is this a good idea - can this driver be used for anything other
than a sky81452?
Add DT nodes for ps8622 bridge chip and panel.
Add backlight power supply for pwm-backlight.
Also add bridge phandle needed by dp to enable display on peach_pit.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
Changes since V1:
-- Remove simple-panel compatible string.
--
Add DT nodes for ptn3460 bridge chip and panel.
Add backlight enable pin and backlight power supply for pwm-backlight.
Also add bridge phandle needed by dp to enable display on snow.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
Changes since V1:
-- Remove simple-panel compatible
On Fri, Aug 29, 2014 at 11:14:30PM +0100, Andrew Bresticker wrote:
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt vectors. It also supports a timer and software-generated
interrupts.
On 08/29/2014 04:38 PM, Soren Brinkmann wrote:
From: Ezra Savard ezra.sav...@xilinx.com
Adds LEDs to the zc702 devicetree for use with the leds-gpio driver.
Signed-off-by: Ezra Savard ezra.sav...@xilinx.com
Reviewed-by: Soren Brinkmann soren.brinkm...@xilinx.com
---
v2:
- fix node
On 08/30/2014 02:43 AM, Florian Fainelli wrote:
On 08/29/2014 04:22 PM, Jason Gunthorpe wrote:
On Fri, Aug 29, 2014 at 11:23:57AM -0700, Florian Fainelli wrote:
On 08/29/2014 10:31 AM, Jason Gunthorpe wrote:
On Fri, Aug 29, 2014 at 08:35:36AM -0700, Sören Brinkmann wrote:
The compatible
Hi,
On 09/01/2014 12:20 PM, Maxime Ripard wrote:
Hi,
On Sun, Aug 31, 2014 at 12:15:50PM +0200, Hans de Goede wrote:
Hi,
On 08/30/2014 10:03 PM, Maxime Ripard wrote:
The current phase API doesn't look into the actual hardware to get the phase
value, but will rather get it from a variable
Hi Tirumalesh,
On Wed, Aug 27, 2014 at 07:02:21PM +0100, c.tirumal...@gmail.com wrote:
From: Tirumalesh Chalamarla tchalama...@cavium.com
This patch modifes output_mask calculation logic for stage 1 and allow
max possible value supported by SMMU implementaions for translations,
where stage
Some ARM1176JZF confusion in as separate thread...
On Fri, Jul 25, 2014 at 5:24 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Fri, Jul 25, 2014 at 02:23:48PM +0100, Linus Walleij wrote:
+ /* Primary DevChip GIC synthesized with the CPU */
+ intc_dc1176:
On Fri, Jul 25, 2014 at 05:58:24PM +0200, Arnd Bergmann wrote:
On Friday 25 July 2014 16:50:10 Russell King - ARM Linux wrote:
I toyed with the idea of adding the standard cache size specifications
to the L2C code, it sounds like there's a reason to do that now.
Let's not mess around
On 01/09/14 12:01, Mark Rutland wrote:
On Fri, Aug 29, 2014 at 11:14:30PM +0100, Andrew Bresticker wrote:
+Required properties:
+- compatible : Should be mti,global-interrupt-controller
I couldn't find mti in vendor-prefixes.txt (as of v3.17-rc3). If
there's not a patch to add it elsewhere,
On Monday 01 September 2014 13:03:13 Russell King - ARM Linux wrote:
On Fri, Jul 25, 2014 at 05:58:24PM +0200, Arnd Bergmann wrote:
On Friday 25 July 2014 16:50:10 Russell King - ARM Linux wrote:
I toyed with the idea of adding the standard cache size specifications
to the L2C code,
Hi Linus,
On Mon, Sep 01, 2014 at 12:52:49PM +0100, Linus Walleij wrote:
Some ARM1176JZF confusion in as separate thread...
On Fri, Jul 25, 2014 at 5:24 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Fri, Jul 25, 2014 at 02:23:48PM +0100, Linus Walleij wrote:
+ /* Primary
On Mon, Sep 01, 2014 at 01:27:17PM +0100, Linus Walleij wrote:
On Mon, Sep 1, 2014 at 2:17 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Mon, Sep 01, 2014 at 12:52:49PM +0100, Linus Walleij wrote:
Should use the string arm,arm1176jzf-devchip-gic?
That sounds fine to me.
The
This driver enables control of the SSP/SPI chip-select signals as GPIOs on the
AXM55xx device.
Anders Berg (2):
gpio: Add driver for AXM55xx SSP chip selects
Documentation: DT bindings for AXM55xx SSP CS
.../devicetree/bindings/gpio/gpio-axxia-sspcs.txt | 36 ++
drivers/gpio/Kconfig
Bindings and documentation for AXM55xx SSP chip select controller.
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
.../devicetree/bindings/gpio/gpio-axxia-sspcs.txt | 36 ++
1 file changed, 36 insertions(+)
create mode 100644
The AXM55xx device has a ARM PL022 SSP controller with an extension that
enables the control of up to five chip select signals. This driver implements
the logic to control these signals and exports them as GPIOs.
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/gpio/Kconfig
Hi Lee,
On Fri, Aug 29, 2014 at 10:13:59AM +0100, Lee Jones wrote:
IMX and R8 sub-arch Maintainers,
The following changes since commit 52addcf9d6669fa439387610bc65c92fa0980cef:
Linux 3.17-rc2 (2014-08-25 15:36:20 -0700)
are available in the git repository at:
On Mon, 01 Sep 2014, Shawn Guo wrote:
On Fri, Aug 29, 2014 at 10:13:59AM +0100, Lee Jones wrote:
IMX and R8 sub-arch Maintainers,
The following changes since commit 52addcf9d6669fa439387610bc65c92fa0980cef:
Linux 3.17-rc2 (2014-08-25 15:36:20 -0700)
are available in the git
On Mon, Sep 01, 2014 at 12:29:35PM +0800, Xiubo Li wrote:
This patch merge single DAI link and muti-DAI links code together,
and simply the simple-card driver code.
Hi Xiubo
It would be good to note that this breaks the Binary API with DT
blobs. Old blobs will not work with this new C code.
On Mon, Sep 01, 2014 at 12:29:38PM +0800, Xiubo Li wrote:
This patch depends on the following simple card patch:
===
ASoC: simple-card: Merge single and muti DAI link code.
Saying what a patch depends on, is not the best of ChangeLog.
Say something like:
The simple-card binding has been
Hi Will,
On Mon, Sep 1, 2014 at 4:42 AM, Will Deacon will.dea...@arm.com wrote:
Hi Tirumalesh,
On Wed, Aug 27, 2014 at 07:02:21PM +0100, c.tirumal...@gmail.com wrote:
From: Tirumalesh Chalamarla tchalama...@cavium.com
This patch modifes output_mask calculation logic for stage 1 and allow
On Mon, Sep 01, 2014 at 02:38:54PM +0100, Lee Jones wrote:
On Mon, 01 Sep 2014, Shawn Guo wrote:
On Fri, Aug 29, 2014 at 10:13:59AM +0100, Lee Jones wrote:
IMX and R8 sub-arch Maintainers,
The following changes since commit
52addcf9d6669fa439387610bc65c92fa0980cef:
Linux
Hi Linus,
On 08/29/2014 09:19 AM, Linus Walleij wrote:
On Wed, Aug 13, 2014 at 6:16 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
Some SoCs (like Keystone) may require to perform special
sequence of operations to assign output GPIO value, so default
implementation of .set()
As Andrew Lunn is on vacation until the 12th, please keep me in the Cc
on future revisions of this patch.
I'm not at all familiar with the audio subsystem, so I'll refrain from
commenting on the details. However, with respect to DT, this is a
no-go. This series breaks all boards in the field as
On Mon, Sep 01, 2014 at 03:34:12PM +0200, Andrew Lunn wrote:
On Mon, Sep 01, 2014 at 12:29:35PM +0800, Xiubo Li wrote:
This patch merge single DAI link and muti-DAI links code together,
and simply the simple-card driver code.
It would be good to note that this breaks the Binary API with DT
On Mon, Sep 01, 2014 at 02:49:58PM +0100, tirumalesh chalamarla wrote:
On Mon, Sep 1, 2014 at 4:42 AM, Will Deacon will.dea...@arm.com wrote:
Assuming I understand the problem correctly, why not simply remove the
truncation from the existing code (untested patch below)? Does that not
work
On Mon, Sep 1, 2014 at 8:12 AM, Will Deacon will.dea...@arm.com wrote:
On Mon, Sep 01, 2014 at 02:49:58PM +0100, tirumalesh chalamarla wrote:
On Mon, Sep 1, 2014 at 4:42 AM, Will Deacon will.dea...@arm.com wrote:
Assuming I understand the problem correctly, why not simply remove the
Add clock provider for clocks in DMC domain including EPLL and BPLL. The
DMC clocks are necessary for Exynos3 devfreq driver.
The DMC clock domain uses different address space (0x105C) than
standard clock domain (0x1003 - 0x1005). The difference is huge
enough to add new DT node for
Add CMU (Clock Management Unit) node for DMC (Dynamic Memory Controller)
domain clocks on Exynos3250.
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
arch/arm/boot/dts/exynos3250.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
This patch is v8 of a previous posting:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-August/279253.html
Patchset has been tested on:
- Juno ARM64 platform and Foundation v8 models (based on Trusted Firmware
PSCI implementation available at [1])
# Patches to enable idle states
Document the new compatible for clock ins DMC (Dynamic Memory
Controller) domain of Exynos3250 Clock Management Unit (CMU).
Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Documentation/devicetree/bindings/clock/exynos3250-clock.txt | 10 +-
1 file changed, 9
CPU suspend is the standard kernel interface to be used to enter
low-power states on ARM64 systems. Current cpu_suspend implementation
by default assumes that all low power states are losing the CPU context,
so the CPU registers must be saved and cleaned to DRAM upon state
entry. Furthermore, the
ARM based platforms implement a variety of power management schemes that
allow processors to enter idle states at run-time.
The parameters defining these idle states vary on a per-platform basis forcing
the OS to hardcode the state parameters in platform specific static tables
whose size grows as
This patch implements a generic CPU idle driver for ARM64 machines.
It relies on the DT idle states infrastructure to initialize idle
states count and respective parameters. Current code assumes the driver
is managing idle states on all possible CPUs but can be easily
generalized to support
With the introduction of DT based idle states, CPUidle drivers for ARM
can now initialize idle states data through properties in the device tree.
This patch adds code to the big.LITTLE CPUidle driver to dynamically
initialize idle states data through the updated device tree source file.
Cc:
This patch implements the cpu_suspend cpu operations method through
the PSCI CPU SUSPEND API. The PSCI implementation translates the idle state
index passed by the cpu_suspend core call into a valid PSCI state according to
the PSCI states initialized at boot through the cpu_init_idle() CPU
With the introduction of DT based idle states, CPUidle drivers for
ARM can now initialize idle states data through properties in the device
tree.
This patch adds code to the Exynos CPUidle driver to dynamically
initialize idle states data through the updated device tree source
files.
Cc: Chander
The CPUidle subsystem on ARM64 machines requires the idle states
implementation back-end to initialize idle states parameter upon
boot. This patch adds a hook in the CPU operations structure that
should be initialized by the CPU operations back-end in order to
provide a function that initializes
On most common ARM systems, the low-power states a CPU can be put into are
not discoverable in HW and require device tree bindings to describe
power down suspend operations and idle states parameters.
In order to enable DT based idle states and configure idle drivers, this
patch implements the
On Fri, Aug 29, 2014 at 03:12:12PM +0800, Xiubo Li wrote:
The 'big-endian-data' property is originally used to indicate whether the
LSB firstly or MSB firstly will be transmitted to the CODEC or received
from the CODEC, and there has nothing relation to the memory data.
Applied, thanks.
On Tue, Aug 26, 2014 at 02:54:51PM +0100, Will Deacon wrote:
On Tue, Aug 19, 2014 at 07:12:41PM +0100, Mitchel Humpherys wrote:
On Tue, Aug 19 2014 at 05:44:32 AM, Will Deacon will.dea...@arm.com wrote:
@@ -2005,6 +2073,11 @@ int arm_smmu_device_cfg_probe(struct
arm_smmu_device *smmu)
On Sun, Aug 31, 2014 at 12:45:39PM +0200, Jean-Francois Moine wrote:
Documentation/devicetree/bindings/sound/hdmi2.txt | 32
include/sound/hdmi2.h | 24 +++
sound/soc/codecs/Kconfig | 3 +
sound/soc/codecs/Makefile
On 09/01/2014 04:32 AM, Lee Jones wrote:
On Fri, 29 Aug 2014, Nishanth Menon wrote:
On 08/29/2014 05:56 AM, Lee Jones wrote:
On Tue, 19 Aug 2014, Nishanth Menon wrote:
With the recent pinctrl-single changes, omaps can treat wake-up events
from deeper idle states as interrupts.
Let's add
Signed-off-by: Philippe Reynes trem...@gmail.com
---
arch/arm/boot/dts/imx27-apf27dev.dts | 17 +
1 files changed, 17 insertions(+), 0 deletions(-)
Changelog:
v4: (thanks Shawn Guo for the feedback)
- put max1027 pinctl in the right place
- use 0x0 instead of 0
v3: (thanks
Quoting Maxime Ripard (2014-08-30 13:03:02)
The current phase API doesn't look into the actual hardware to get the phase
value, but will rather get it from a variable only set by the set_phase
function.
This will cause issue when the client driver will never call the set_phase
function,
Hi Fabio,
On 20 August 2014 10:39, Fabio Estevam feste...@gmail.com wrote:
On Wed, Aug 20, 2014 at 2:25 PM, Simon Glass s...@chromium.org wrote:
Yes, I see that, but linux doesn't use it AFAICT. Are you suggesting
that U-Boot should? Or should we use 'u-boot,stdout-path' in /chosen?
See my
Hi,
On Mon, Sep 1, 2014 at 3:09 AM, Lee Jones lee.jo...@linaro.org wrote:
On Mon, 01 Sep 2014, Chris Zhong wrote:
The RK808 chip is a power management IC for multimedia and handheld
devices. It contains the following components:
- Regulators
- RTC
- Clkout
The RK808 core driver is
Quoting Maxime Ripard (2014-08-30 13:03:09)
The MMC clock we thought we had until now are actually not one but three
different clocks.
The main one is unchanged, and will have three outputs:
- The clock fed into the MMC
- a sample and output clocks, to deal with when should we
Quoting Chris Zhong (2014-09-01 02:46:40)
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
Hello Chris,
Thanks for submitting this patch. Could you fill in a proper changelog?
Also you should
On Mon, Sep 1, 2014 at 1:34 AM, Arnd Bergmann a...@arndb.de wrote:
On Sunday 31 August 2014 11:54:04 Andrew Bresticker wrote:
On Sat, Aug 30, 2014 at 12:57 AM, Arnd Bergmann a...@arndb.de wrote:
On Friday 29 August 2014 15:14:31 Andrew Bresticker wrote:
Define a generic MIPS_GIC_IRQ_BASE
Quoting Ulrich Hecht (2014-08-28 08:11:11)
From: Ulrich Hecht ulrich.he...@gmail.com
Support for setting the parent at initialization time based on the current
hardware configuration in DIV6 clocks with selectable parents as found in
the r8a73a4, r8a7740, sh73a0, and other SoCs.
snip
-
Quoting Tuomas Tynkkynen (2014-08-20 14:04:28)
v4 changes:
DFLL:
- fix wrong register accessors used for the DFLL_OUTPUT_CFG register
- I decided to leave the dfll_i2c_{readl,writel} separate since the
correct barrier function still needs to be called
- fix PMIC I2C
On Mon, Sep 1, 2014 at 4:01 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Fri, Aug 29, 2014 at 11:14:30PM +0100, Andrew Bresticker wrote:
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt
On Mon, Sep 01, 2014 at 03:34:12PM +0200, Andrew Lunn wrote:
On Mon, Sep 01, 2014 at 12:29:35PM +0800, Xiubo Li wrote:
This patch merge single DAI link and muti-DAI links code together,
and simply the simple-card driver code.
It would be good to note that this breaks the Binary API
From: Antoine Tenart antoine.ten...@free-electrons.com
Date: Fri, 29 Aug 2014 15:50:59 +0200
+struct rx_desc {
+ u16 buf_size; /* Buffer size */
+ u16 byte_cnt; /* Descriptor buffer byte count */
...
+ u16 byte_cnt;
Chris,
On Mon, Sep 1, 2014 at 2:07 AM, Chris Zhong z...@rock-chips.com wrote:
Add device tree bindings documentation and a header file
for rockchip's RK808 pmic.
Signed-off-by: Chris Zhong z...@rock-chips.com
Signed-off-by: Zhang Qing zhangq...@rock-chips.com
---
Changes in v7:
Advices
Chris,
On Mon, Sep 1, 2014 at 2:07 AM, Chris Zhong z...@rock-chips.com wrote:
Add device tree bindings documentation and a header file
for rockchip's RK808 pmic.
Signed-off-by: Chris Zhong z...@rock-chips.com
Signed-off-by: Zhang Qing zhangq...@rock-chips.com
---
Changes in v7:
Advices
On 2014/8/13 0:25, Liviu Dudau wrote:
Some architectures do not have a simple view of the PCI I/O space
and instead use a range of CPU addresses that map to bus addresses.
For some architectures these ranges will be expressed by OF bindings
in a device tree file.
This patch introduces a
Chris,
On Mon, Sep 1, 2014 at 2:07 AM, Chris Zhong z...@rock-chips.com wrote:
Add device tree bindings documentation and a header file
for rockchip's RK808 pmic.
Signed-off-by: Chris Zhong z...@rock-chips.com
Signed-off-by: Zhang Qing zhangq...@rock-chips.com
---
Changes in v7:
Advices
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