Olof,
On 29.08.14 15:49:42, Robert Richter wrote:
> On 29.08.14 14:10:23, Robert Richter wrote:
> > On 28.08.14 16:01:08, Olof Johansson wrote:
> > > Thinking about it a bit more, the even more obvious solution that I
> > > for some reason didn't think of at the time, is to have the
> > > dtbs_ins
From: Robert Richter
This adds the dtbs_install make target to arm64. The target has been
introduced already to arch/arm with the following commit:
f4d4ffc03efc kbuild: dtbs_install: new make target
Implementation for arm64 is the same as for arm.
With 'dtbs_install' all config enabled dtb fi
From: Robert Richter
Moving dts files to vendor subdirs.
Signed-off-by: Robert Richter
---
arch/arm64/boot/dts/Makefile | 4 +-
arch/arm64/boot/dts/apm-mustang.dts | 34 --
arch/arm64/boot/dts/apm-storm.dtsi | 425 ---
arch/
From: Robert Richter
This patch adds support of vendor sub directories for dtb files.
Subdirectories can be specified in $(dts-dirs). Kbuild traverses over
all directories while building and installing dtb files. The directory
tree is also reflected in the install path.
Signed-off-by: Robert Ric
From: Robert Richter
The machine description is not needed to build dtb files.
Signed-off-by: Robert Richter
---
arch/arm/Makefile | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 4d13c6d0a0cc..422c9aa34382 100644
--- a/arch/ar
From: Robert Richter
Add dtb files to build targets and let kbuild handle them. Thus,
special dtbs rules can be removed. This eases Makefiles and the
implementation of the support of vendor dtb subdirectories.
Signed-off-by: Robert Richter
---
arch/arm/Makefile| 2 +-
arch/arm/boo
From: Robert Richter
Move dtbs install rules to Makefile.dtbinst. This change is needed to
implement support for dts vendor subdirs. The change makes Makefiles
easier and smaller as no longer the dtbs_install rule needs to be
defined. Another advantage is that install goals are not encoded in
tar
From: Robert Richter
For arm64 we want to put dts files into vendor's subdirectories from
the beginning. This patch set implements this. As this is a generic
kbuild implementation, vendor subdirs will be also available for
arch/arm and other architectures. The subdirectory tree is also
reflected
The bootloader on the Netgear ReadyNAS RN102 uses Hardware BCH ECC
(strength = 4), while the pxa3xx NAND driver by default uses
Hamming ECC (strength = 1).
This patch changes the ECC mode on these machines to match that
of the bootloader and of the stock firmware, so that for example
updating the
Some Freescale SoCs, there has an DVI/HDMI controller and a PHY,
attached to one of their display controller unit's LCDC interfaces.
This patch adds a preliminary static support for such controllers.
This will support for many modes and a dynamic switching between
them.
Signed-off-by: Xiubo Li
-
On Wed, Sep 3, 2014 at 11:35 PM, Bjorn Helgaas wrote:
> On Wed, Aug 20, 2014 at 09:56:02PM +0530, Srikanth Thokala wrote:
>> This is the driver for Xilinx AXI PCIe Host Bridge Soft IP
>>
>> Signed-off-by: Srikanth Thokala
>> Acked-by: Arnd Bergmann
>
> Applied to pci/host-xilinx for v3.18, thank
This add the 64-byte FIFO mode device tree binding for Freescale DUART.
Signed-off-by: Jingchang Lu
---
Documentation/devicetree/bindings/serial/of-serial.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt
b/Documentation/devicetree/bi
This patch adds SKY81452 MFD driver.
SKY81452 has 2 functions : backlight LED driver and boost converter.
The MFD driver registers I2C regmap and registers the child drivers.
Signed-off-by: Gyungoh Yoo
---
drivers/mfd/Kconfig | 12 +
drivers/mfd/Makefile | 1 +
drivers/mf
> I'm happy to take the patches but they will need to be rebased onto
> clk-next and refactored to take into account Tomeu's api split[0].
Hi Mike,
Ok, then when I'm back into the proximity of a computer, ie. in 2 weeks, I'll
rebase the patchset.
A 5" phone smart as it can be is a bit too hard
On i.MX6Q TO > 1.0, i.MX6DL and i.MX6SX, gpt per clock
can be from OSC instead of ipg_per, as ipg_per's rate
may be scaled when system enter low bus mode, to keep
system timer NOT drift, better to make gpt per clock
at fixed rate, here add support for gpt per clock to
be from OSC which is at fixed
Hi, Shawn and Fabio
Thanks for advice, I have sent out V2 patch, please help review.
Best regards!
Anson Huang
-Original Message-
From: Shawn Guo [mailto:shawn@freescale.com]
Sent: 2014-09-05 8:35 AM
To: Fabio Estevam
Cc: Huang Yongcai-B20788; Sascha Hauer; devicetree@vger.k
Original gpt per clk parent is from ipg_per clk which
may be scaled when system enter low bus mode, as ipg
clk will be lower in low bus mode, to keep system clk
NOT drift, select gpt per clk parent from OSC which
is at fixed freq always.
On i.mx6qdl, add a osc_per clk source for i.mx6q
TO > 1.0 an
Add gpt_3m clock for i.mx6qdl, as gpt can source clock
from OSC, some i.MX6 series SOCs has fixed divider of
8 for gpt clock, so here add a fix clk of gpt_3m.
Signed-off-by: Anson Huang
---
arch/arm/mach-imx/clk-imx6q.c |1 +
include/dt-bindings/clock/imx6qdl-clock.h |3 ++-
Currently, gpt timer's clock is from ipg_per, and ipg_per clock is from ipg
on most of i.MX6 series SOCs, but ipg's rate may be scaled when system enters
low bus mode for saving power, then gpt timer's clock rate will be scaled as
well, as system timer should be kept stable and NOT drift, better to
On Fri, 5 Sep 2014 00:20:42 Paul Bolle wrote:
> > On Fri, 13 Jun 2014 13:56:32 Paul Bolle wrote:
> > > On Fri, 2014-05-02 at 18:06 +1000, Alistair Popple wrote:
> > > > The original implementation of MMC support for Akebono introduced a
> > > > new configuration symbol (MMC_SDHCI_OF_476GTR). Thi
>
> > +#if defined CONFIG_PM_SLEEP
>
> I wonder whether it's worth #ifdef:in out such things, it clutters the place.
OK. I will use '#ifdef'.
>
> > +/* Store GPIO context across system-wide suspend/resume transitions
> > +*/ static struct gpio_saved_regs {
>
> Call the struct:
>
> struct dwapb
On Mon, Sep 01, 2014 at 11:31:58AM +0100, Mark Brown wrote:
> On Mon, Sep 01, 2014 at 11:40:18AM +0900, Gyungoh Yoo wrote:
> > Adding compatible attribute for SKY81452 regulator driver.
>
> > Required properties:
> > +- compatible : Must be "skyworks,sky81452-regulator"
>
> Why is this a g
Quoting Chris Zhong (2014-09-03 18:12:38)
> +static int rk808_clkout1_is_prepared(struct clk_hw *hw)
> +{
> + return 1;
> +}
> +
> +static const struct clk_ops rk808_clkout1_ops = {
> + .is_prepared = rk808_clkout1_is_prepared,
> + .recalc_rate = rk808_clkout_recalc_rate,
> +};
On Thu, Sep 04, 2014 at 07:50:35PM -0300, Fabio Estevam wrote:
> This patch series works fine if we use the new dtb and new kernel.
>
> However, booting a kernel with these series applied and using an old
> dtb we get a system with broken timer.
>
> 'sleep 1' takes something like 20 seconds in th
Hi Geert,
On 04/09/14 23:17, Geert Uytterhoeven wrote:
> On Thu, Sep 4, 2014 at 2:54 PM, wrote:
>> The Armada SoC family implementation of this SPI hardware module has
>> extended the configuration register to allow for a wider range of SPI
>> clock rates. Specifically the Serial Baud Rate Pre-s
在 2014年09月05日 01:06, Dmitry Torokhov 写道:
Hi Caesar,
On Wed, Sep 03, 2014 at 10:10:36AM +0800, Caesar Wang wrote:
+static int rockchip_thermal_remove(struct platform_device *pdev)
+{
+ struct rockchip_thermal_data *data = platform_get_drvdata(pdev);
+
+ rockchip_thermal_control(data
Hi Anson,
On Thu, Sep 4, 2014 at 8:37 PM, anson.hu...@freescale.com
wrote:
> Hi, Fabio
> can I know why you want to run the new kernel with old dtb?
We can not break old dtb functionality.
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Hi, Fabio
can I know why you want to run the new kernel with old dtb?
Sent from Anson's iPhone
> 在 2014年9月5日，6:50，"Fabio Estevam" 写道：
>
>> On Wed, Sep 3, 2014 at 4:36 AM, Anson Huang wrote:
>> Currently, gpt timer's clock is from ipg_per, and ipg_per clock is from ipg
>> on most of i.M
On Wed, Sep 03, 2014 at 01:44:27PM -0700, Doug Anderson wrote:
> The Rockchip SPI controller works fine without DMA (aside from a few
> warnings). The DMA property even implies this, saying:
Applied all, thanks. Please use subject bindings matching the style for
the subsystem.
signature.asc
De
On Mon, Aug 18, 2014 at 03:27:03PM +0900, Chanwoo Choi wrote:
> +- regulator-initial-state: initial state for suspend state, cnd set initial
> + state among following defined suspend states:
> + <3>: PM_SUSPEND_MEM - Setup regulator according to regulator-state-mem
> + <4>: PM_SUSPEND_MAX - Set
On Wed, Sep 3, 2014 at 4:36 AM, Anson Huang wrote:
> Currently, gpt timer's clock is from ipg_per, and ipg_per clock is from ipg
> on most of i.MX6 series SOCs, but ipg's rate may be scaled when system enters
> low bus mode for saving power, then gpt timer's clock rate will be scaled as
> well, as
On Mon, Aug 18, 2014 at 03:27:02PM +0900, Chanwoo Choi wrote:
> + suspend_uV = of_get_property(suspend_np, "regulator-volt",
> + NULL);
> + if (suspend_uV) {
> + suspend_state->uV = be32_to_cpu(*suspend_uV);
>
netdev list.
I noticed that this symbol (and its driver) are still not in v3.17-rc3
nor in next-20140904. Any update on this?
Thanks,
Paul Bolle
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On Fri, 2014-06-20 at 10:10 +1000, Alistair Popple wrote:
> Hi Ben,
>
> It looks like we may have missed this trivial fix? Can you please apply it to
> your tree?
>
> Regards,
>
> Alistair
>
> On Fri, 13 Jun 2014 13:56:32 Paul Bolle wrote:
> > On Fri, 2014-05-02 at 18:06 +1000, Alistair Popple
On Thursday 04 September 2014, Mike Turquette wrote:
> Quoting Arnd Bergmann (2014-09-03 12:33:31)
> > On Wednesday 03 September 2014 11:49:56 Mike Turquette wrote:
> > > > Right, makes sense. We have in the past done it either way for other
> > > > platforms. When merging the patches through the c
On Thu, Sep 04, 2014 at 11:33:38AM +0200, Arnd Bergmann wrote:
> This is a recurring problem:
>
> driver a depends on x and selects y
> driver b depends on y and selects x
>
> Maybe we should teach Kconfig to not worry about it when x and y are
> both user-selectable as well.
>
> However, a nic
On Thu, Sep 04, 2014 at 12:04:11PM -0700, Doug Anderson wrote:
> Dmitry,
>
> On Thu, Sep 4, 2014 at 10:33 AM, Dmitry Torokhov
> wrote:
> > On Wed, Sep 03, 2014 at 09:18:42PM -0700, Doug Anderson wrote:
> >> Chris,
> >>
> >> On Wed, Sep 3, 2014 at 6:12 PM, Chris Zhong wrote:
> >> > Adding RTC dri
* Nishanth Menon [140904 06:24]:
> Hi,
>
> The following series was inspired in part by
> http://marc.info/?l=linux-omap&m=140974309205295&w=2
> causing me to try and do an audit of pinctrl configurations on the platform.
>
> Further, failures on latest board updates in the automated farm also
On Thu, Sep 04, 2014 at 10:45:35AM +0200, PERIER Romain wrote:
> Hi Beniamino,
>
> I will investigate. Could you please :
>
> - Load the module
> - Show me the output of lsmod
> - Use your ethernet a bit
> - Try to unload the module
> - If your board did not freeze or if your kernel did not panic
On 08/29/2014 11:02 AM, Borislav Petkov wrote:
> On Mon, Aug 11, 2014 at 10:18:12AM -0500, ttha...@opensource.altera.com wrote:
>> From: Thor Thayer
>>
>> This patch adds support for the CycloneV and ArriaV SDRAM controllers.
>> Correction and reporting of SBEs, Panic on DBEs.
>>
>> Signed-off-by:
Hi,
On Wed, Sep 3, 2014 at 6:12 PM, Chris Zhong wrote:
> - * Author: Chris Zhong
> - * Author: Zhang Qing
> + * Author: Chris Zhong
> + * Author: Zhang Qing
As Dmitry pointed out, you probably shouldn't have changed these
lines--they were good like they were.
-Doug
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Dmitry,
On Thu, Sep 4, 2014 at 10:33 AM, Dmitry Torokhov
wrote:
> On Wed, Sep 03, 2014 at 09:18:42PM -0700, Doug Anderson wrote:
>> Chris,
>>
>> On Wed, Sep 3, 2014 at 6:12 PM, Chris Zhong wrote:
>> > Adding RTC driver for supporting RTC device present inside RK808 PMIC.
>> >
>> > Signed-off-by:
On Thu, Sep 04, 2014 at 08:02:56PM +0200, Heiko Stübner wrote:
> Am Donnerstag, 4. September 2014, 10:40:24 schrieb Dmitry Torokhov:
> > Hi Chris,
> >
> > On Thu, Sep 04, 2014 at 09:12:38AM +0800, Chris Zhong wrote:
> > > + rk808_clkout->clk_data.clks = clk_table;
> > > + rk808_clkout->clk_data.cl
Am Donnerstag, 4. September 2014, 10:40:24 schrieb Dmitry Torokhov:
> Hi Chris,
>
> On Thu, Sep 04, 2014 at 09:12:38AM +0800, Chris Zhong wrote:
> > + rk808_clkout->clk_data.clks = clk_table;
> > + rk808_clkout->clk_data.clk_num = RK808_NR_OUTPUT;
> > +
> > + return of_clk_add_provider(node,
Hi Chris,
On Thu, Sep 04, 2014 at 09:12:38AM +0800, Chris Zhong wrote:
> + rk808_clkout->clk_data.clks = clk_table;
> + rk808_clkout->clk_data.clk_num = RK808_NR_OUTPUT;
> +
> + return of_clk_add_provider(node, of_clk_src_onecell_get,
> +&rk808_clkout->c
On Thu, Sep 04, 2014 at 10:25:03AM -0700, Guenter Roeck wrote:
> On Thu, Sep 04, 2014 at 10:19:17AM +0100, Lee Jones wrote:
> > Wim,
> >
> > Still waiting on a Watchdog Ack, so I can take this set in.
> >
> Wasn't there a more recent version of this patch ?
Yes, this is superseded by v2.
Beniam
On Wed, Sep 03, 2014 at 09:18:42PM -0700, Doug Anderson wrote:
> Chris,
>
> On Wed, Sep 3, 2014 at 6:12 PM, Chris Zhong wrote:
> > Adding RTC driver for supporting RTC device present inside RK808 PMIC.
> >
> > Signed-off-by: Chris Zhong
> > Signed-off-by: Zhang Qing
> >
> > Tested-by: Heiko Stu
On Thu, Sep 4, 2014 at 7:06 PM, Mark Brown wrote:
> On Thu, Sep 04, 2014 at 07:04:44PM +0200, Linus Walleij wrote:
>> I need an ACK from Mark Brown on this before I apply.
>> The driver seems to do what it should, but I need Mark to
>> be OK with exporting the CS signals from an SSP/SPI block
>> t
On Thu, Sep 04, 2014 at 05:03:20PM +0100, Catalin Marinas wrote:
> On Wed, Sep 03, 2014 at 06:37:40PM +0100, Lorenzo Pieralisi wrote:
> > On Mon, Sep 01, 2014 at 04:28:42PM +0100, Lorenzo Pieralisi wrote:
> > > This patch implements a generic CPU idle driver for ARM64 machines.
> > >
> > > It reli
On Thu, Sep 04, 2014 at 10:19:17AM +0100, Lee Jones wrote:
> Wim,
>
> Still waiting on a Watchdog Ack, so I can take this set in.
>
Wasn't there a more recent version of this patch ?
Thanks,
Guenter
> > This adds a driver for the watchdog timer available in Ricoh RN5T618
> > PMIC. The device su
Hi Caesar,
On Wed, Sep 03, 2014 at 10:10:36AM +0800, Caesar Wang wrote:
> +static int rockchip_thermal_remove(struct platform_device *pdev)
> +{
> + struct rockchip_thermal_data *data = platform_get_drvdata(pdev);
> +
> + rockchip_thermal_control(data, false);
> +
> + thermal_zone_devi
On Thu, Sep 04, 2014 at 07:04:44PM +0200, Linus Walleij wrote:
> I need an ACK from Mark Brown on this before I apply.
> The driver seems to do what it should, but I need Mark to
> be OK with exporting the CS signals from an SSP/SPI block
> to be exposed to Linux as GPIOs.
>
> (Top-posting and quo
I bet Mark and linux-spi are interested in this patch too.
Yours,
Linus Walleij
On Mon, Sep 1, 2014 at 2:53 PM, Anders Berg wrote:
> Bindings and documentation for AXM55xx SSP chip select controller.
>
> Signed-off-by: Anders Berg
> ---
> .../devicetree/bindings/gpio/gpio-axxia-sspcs.txt | 36
I need an ACK from Mark Brown on this before I apply.
The driver seems to do what it should, but I need Mark to
be OK with exporting the CS signals from an SSP/SPI block
to be exposed to Linux as GPIOs.
(Top-posting and quoting patch verbatim so Mark gets it.)
Yours,
Linus Walleij
On Mon, Sep 1,
On Sat, Aug 30, 2014 at 1:27 PM, Heiko Stübner wrote:
> Am Freitag, 29. August 2014, 21:51:46 schrieb Doug Anderson:
>> On Thu, Aug 28, 2014 at 2:26 PM, Santosh Shilimkar
>>
>> wrote:
>> > On Thursday 28 August 2014 03:36 PM, Doug Anderson wrote:
>> >> These two patches add support for automatica
On Wed, Aug 27, 2014 at 7:46 PM, Weike Chen wrote:
> This patch enables suspend and resume mode for the power management, and
> it is based on Josef Ahmad's previous work.
>
> Reviewed-by: Hock Leong Kweh
> Reviewed-by: Shevchenko, Andriy
> Signed-off-by: Weike Chen
(...)
> +#if defined CONF
From: Markus Niebel
using LVDS channel 1 on an i.MX53 leads to following error:
imx-ldb 53fa8008.ldb: unable to set di0 parent clock to ldb_di1
This comes from imx_ldb_set_clock with mux = 0. Mux parameter must be "1" for
reparenting di1 clock to ldb_di1. The value of the mux param comes from d
On Wed, Sep 3, 2014 at 6:28 PM, Georgi Djakov wrote:
> Currently the value used to specify that interrupts from the gpio should
> be routed to the application processor is hardcoded for all Qualcomm SoCs.
> But the new APQ8084 SoC uses a different value. To resolve this, we make
> this value conf
On Wed, Sep 3, 2014 at 6:28 PM, Georgi Djakov wrote:
> This patch adds the TLMM node for the APQ8084 platform.
>
> Reviewed-by: Bjorn Andersson
> Signed-off-by: Georgi Djakov
Acked-by: Linus Walleij
Pls funnel this through the qcom git tree and ARM SoC.
Yours,
Linus Walleij
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On Wed, Sep 3, 2014 at 6:28 PM, Georgi Djakov wrote:
> Define a new binding for the Qualcomm TLMM (Top-Level Mode Mux) based pin
> controller inside the APQ8084.
>
> Acked-by: Bjorn Andersson
> Signed-off-by: Georgi Djakov
Patch applied.
Yours,
Linus Walleij
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On Wed, Sep 3, 2014 at 6:28 PM, Georgi Djakov wrote:
> This patchset adds pinctrl support for the Qualcomm APQ8084 platform.
>
> Reviewed-by: Andy Gross
> Acked-by: Bjorn Andersson
> Signed-off-by: Georgi Djakov
Patch applied, after taking the liberty to copy the changelog into
the commit mes
On Wed, Sep 03, 2014 at 06:37:40PM +0100, Lorenzo Pieralisi wrote:
> On Mon, Sep 01, 2014 at 04:28:42PM +0100, Lorenzo Pieralisi wrote:
> > This patch implements a generic CPU idle driver for ARM64 machines.
> >
> > It relies on the DT idle states infrastructure to initialize idle
> > states count
On Thu, 4 Sep 2014, Dmitry Lifshitz wrote:
> LDO8 regulator is used for act led and serial cosole power supply.
>
> Its DT status is declared as "disabled", however the serial console was
> functional until Commit 318dbb02b ("regulator: palmas: Fix SMPS
> enable/disable/is_enabled") wich properly
On Thu 2014-09-04 15:52:28, Ulf Hansson wrote:
> To give callers the option of acting on a errors while removing the
> pm_domain ops for the device in the ACPI PM domain, let
> acpi_dev_pm_detach() return an int to provide the error code.
>
> Signed-off-by: Ulf Hansson
> Tested-by: Philipp Zabel
Cc: devicetree@vger.kernel.org
Signed-off-by: David Paris
Signed-off-by: Lee Jones
---
.../devicetree/bindings/watchdog/st-lpc-wdt.txt| 27 ++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/watchdog/st-lpc-wdt.txt
diff --git a/Docu
From: Jeff Lance
The TSC driver is beeing updated, the parameter is not used anymore. The
AIN lines can not be muxed. All boards use the same value.
This patch updates the Documentation and dts files.
Cc: "Benoît Cousson"
Cc: Tony Lindgren
Cc: devicetree@vger.kernel.org
Signed-off-by: Jeff Lan
On Thu, Sep 4, 2014 at 4:18 AM, David Laight wrote:
> From: fugang.d...@freescale.com
>> >From: Frank Li
>> >> From: Fugang Duan
>> >>
>> >> Since enet-avb has 64 bytes alignment limitation for rx DMA transfer.
>> >> The previous enet IP for ARM platform has 16 bytes alignment for tx
>> >> DMA tr
On Wed, Sep 3, 2014 at 11:09 PM, Florian Fainelli wrote:
> 2014-09-03 20:41 GMT-07:00 Zhi Li :
>> On Wed, Sep 3, 2014 at 4:27 PM, Florian Fainelli
>> wrote:
>>> On 09/03/2014 01:38 PM, Frank Li wrote:
From: Fugang Duan
Add multiqueue support, which is compatible with previous sin
To give callers the option of acting on a errors while removing the
pm_domain ops for the device in the ACPI PM domain, let
acpi_dev_pm_detach() return an int to provide the error code.
Signed-off-by: Ulf Hansson
Tested-by: Philipp Zabel
---
drivers/acpi/device_pm.c | 8 +++-
include/linux/
Previously only the ACPI PM domain was supported by the spi bus.
Let's convert to the common attach/detach functions for PM domains,
which currently means we are extending the support to include the
generic PM domain as well.
Cc: linux-...@vger.kernel.org
Signed-off-by: Ulf Hansson
---
drivers/
AMBA devices may on some SoCs resides in PM domains. To be able to
manage these devices from there, let's try to attach devices to their
corresponding PM domain during the probe phase.
To reverse these actions at the remove phase, we try to detach the
device from its PM domain.
Signed-off-by: Ulf
Previously only the ACPI PM domain was supported by the i2c bus.
Let's convert to the common attach/detach functions for PM domains,
which currently means we are extending the support to include the
generic PM domain as well.
Cc: linux-...@vger.kernel.org
Signed-off-by: Ulf Hansson
---
drivers/
Changes in v3:
- Aligned on terminology, now using "PM domain" in comments and commit
- messages/headers.
- Improved English and grammar in comments and commit messages/headers.
- Adopted proposal from Geert, to have compile-time-check wrapper
functions for
From: Tomasz Figa
This patch moves Exynos PM domain code to use the new generic PM domain
look-up framework introduced in previous patches, thus also allowing
the new code to be compiled with CONFIG_ARCH_EXYNOS.
Signed-off-by: Tomasz Figa
Cc: linux-samsung-...@vger.kernel.org
Signed-off-by: Ulf
To maintain scalability let's add common methods to attach and detach
a PM domain for a device, dev_pm_domain_attach|detach().
Typically dev_pm_domain_attach() shall be invoked from subsystem level
code at the probe phase to try to attach a device to its PM domain.
The reversed actions may be done
From: Tomasz Figa
This patch introduces generic code to perform PM domain look-up using
device tree and automatically bind devices to their PM domains.
Generic device tree bindings are introduced to specify PM domains of
devices in their device tree nodes.
Backwards compatibility with legacy Sa
Previously only the ACPI PM domain was supported by the platform bus.
Let's convert to the common attach/detach functions for PM domains,
which currently means we are extending the support to include the
generic PM domain as well.
Signed-off-by: Ulf Hansson
Tested-by: Philipp Zabel
---
drivers
Previously only the ACPI PM domain was supported by the sdio bus.
Let's convert to the common attach/detach functions for PM domains,
which currently means we are extending the support to include the
generic PM domain as well.
Cc: linux-...@vger.kernel.org
Signed-off-by: Ulf Hansson
---
drivers
From: Sascha Hauer
Altera FPGAs that are programmed via SPI use the passive serial protocol.
Add a simple binding that describes the setup for this usecase.
Cc: devicetree@vger.kernel.org
Signed-off-by: Sascha Hauer
Signed-off-by: Steffen Trumtrar
---
.../devicetree/bindings/firmware/altr,pas
On Thu, Sep 4, 2014 at 8:03 AM, Sergei Shtylyov
wrote:
> Hyphens
Okay, I will change it in next version.
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On 08:23-20140904, Nishanth Menon wrote:
> While auditing the various pin ctrl configurations using the following
> command:
> grep PIN_ arch/arm/boot/dts/dra7-evm.dts|(while read line;
> do
> v=`echo "$line" | sed -e "s/\s\s*/|/g" | cut -d '|'
Hi,
The following series was inspired in part by
http://marc.info/?l=linux-omap&m=140974309205295&w=2
causing me to try and do an audit of pinctrl configurations on the platform.
Further, failures on latest board updates in the automated farm also
caused identification of a fix which was yet to
From: Lokesh Vutla
DRA7 evm REV G and later boards uses a vtt regulator for DDR3
termination and this is controlled by gpio7_11. This gpio is
configured in boot loader. gpio7_11, which is only available only on
Pad A22, in previous boards, is connected only to an unused pad on
expansion connector
While auditing the various pin ctrl configurations using the following
command:
grep PIN_ arch/arm/boot/dts/dra7-evm.dts|(while read line;
do
v=`echo "$line" | sed -e "s/\s\s*/|/g" | cut -d '|' -f1 |
cut -d 'x' -f2|tr [a-z] [A-Z]`;
HEX=`echo "obase=16;ibase=16;4A0034
Bumping x2
On 08/25/2014 10:26 AM, Murphy, Dan wrote:
> DRV2667 is a haptic/vibrator driver for Linear Resonant Actuators.
> Adding dt binding for this part
>
> Signed-off-by: Dan Murphy
> ---
>
> v2 - Removed extra tabs, changed node to function not device
> added vbat-supply, and removed conf
Bumping x2
On 08/25/2014 10:26 AM, Murphy, Dan wrote:
> Adding support for the DRV2667 haptic driver.
> This device has the ability to store vibration
> patterns in RAM and execute them once the GO bit
> is set.
>
> The initial driver sets a basic waveform in the
> first waveform sequence and wil
Hi Greg,
On Thu, Sep 4, 2014 at 2:54 PM, wrote:
> The Armada SoC family implementation of this SPI hardware module has
> extended the configuration register to allow for a wider range of SPI
> clock rates. Specifically the Serial Baud Rate Pre-selection bits in the
> SPI Interface Configuration
From: Greg Ungerer
The Armada SoC family implementation of this SPI hardware module has
extended the configuration register to allow for a wider range of SPI
clock rates. Specifically the Serial Baud Rate Pre-selection bits in the
SPI Interface Configuration Register now also use bits 6 and 7 as
Essential fix of CM-T54 serial console power supply and
minor update of SBC-T54 DT model property.
Dmitry Lifshitz (2):
ARM: dts: cm-t54: fix serial console power supply.
ARM: dts: sbc-t54: fix model property
arch/arm/boot/dts/omap5-cm-t54.dts |5 ++---
arch/arm/boot/dts/omap5-sbc-t54.d
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stih407-clock.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/stih407-clock.dtsi
b/arch/arm/boot/dts/stih407-clock.dtsi
index b4318e1..d8488c0 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b
LDO8 regulator is used for act led and serial cosole power supply.
Its DT status is declared as "disabled", however the serial console was
functional until Commit 318dbb02b ("regulator: palmas: Fix SMPS
enable/disable/is_enabled") wich properly turns off LDO8 on boot.
Fix serial cosole power supp
CM-T54 CoM can be used with various custom baseboards, other
than SB-T54 (supplied with SBC-T54 single board computer).
Update model property of SBC-T54 DT to clarify this.
Signed-off-by: Dmitry Lifshitz
---
arch/arm/boot/dts/omap5-sbc-t54.dts |4 ++--
1 files changed, 2 insertions(+), 2 de
Hello.
[Resending since the previous message bounced from the FSL address...]
On 9/4/2014 12:34 AM, y...@shlinux1.ap.freescale.net wrote:
From: Frank Li
This patch update fec devicetree binding doc that add Optional
properties "fsl,num_tx_queues" and "fsl,num_rx_queues".
Si
This patch adds all clock defines for clockgen C0,D0,D2 and D3
Signed-off-by: Gabriel Fernandez
---
include/dt-bindings/clock/stih407-clks.h | 75
1 file changed, 75 insertions(+)
diff --git a/include/dt-bindings/clock/stih407-clks.h
b/include/dt-bindings/clock
Hello.
On 9/4/2014 12:34 AM, y...@shlinux1.ap.freescale.net wrote:
From: Frank Li
This patch update fec devicetree binding doc that add Optional
properties "fsl,num_tx_queues" and "fsl,num_rx_queues".
Signed-off-by: Fugang Duan
Signed-off-by: Frank Li
---
Documentation/devi
Am Mittwoch, 3. September 2014, 16:52:42 schrieb Romain Perier:
> This patch defines a platform glue layer for Rockchip SoCs which
> support arc-emac driver. It ensures that regulator for the rmii is on
> before trying to connect to the ethernet controller. It applies right
> speed and mode changes
On 09/02/2014 11:19 PM, Soren Brinkmann wrote:
The DDR controller can detect idle periods and leverage low power
features clock stop. When new requests occur, the DDRC resumes
normal operation.
Signed-off-by: Soren Brinkmann
Acked-by: Daniel Lezcano
---
v2:
- properly document return val
Am Mittwoch, 3. September 2014, 16:52:43 schrieb Romain Perier:
> This adds the necessary binding documentation for the EMAC Rockchip platform
> driver found in RK3066 and RK3188 SoCs.
>
> Signed-off-by: Romain Perier
Reviewed-by: Heiko Stuebner
> ---
> .../devicetree/bindings/net/emac_rockch
Am Mittwoch, 3. September 2014, 16:52:44 schrieb Romain Perier:
> This adds support for EMAC Rockchip driver on RK3188 SoCs.
>
> Signed-off-by: Romain Perier
could you think about changing patches 3 and 4 with the diff below?
For one the comment style is not really following the coding style.
I
On Thu, 2014-09-04 at 10:38 +, Chen, Alvin wrote:
>
> > > Since we enable this module not only support OF devices, but also support
> > MFD devices, so we remove OF_GPIO dependenc
> > > For 'PCI', the original code is also not depended on PCI, and this patch
> > > also
> > not, do you think i
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