I think *drivers* is not required in the commit message...
On 09/30/2014 09:56 AM, Ankit Jindal wrote:
The Applied Micro X-Gene SOC has on-chip QMTM (Queue manager
and Traffic manager) which is hardware based Queue or Ring
manager. This QMTM device can be used in conjunction with
other devices
This a series of patches is a DRM Driver for Rockchip Socs, add support
for vop devices. Future patches will add additional encoders/connectors,
such as eDP, HDMI.
The basic crtc for rockchip is a VOP - Video Output Processor.
the vop devices found on Rockchip rk3288 Soc, rk3288 soc have two
From: Mark yao mark@rock-chips.com
This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: Mark Yao mark@rock-chips.com
Signed-off-by: Daniel Kurtz djku...@chromium.org
Acked-by: Daniel Vetter dan...@ffwll.ch
Reviewed-by: Rob Clark robdcl...@gmail.com
---
From: Mark yao mark@rock-chips.com
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao mark@rock-chips.com
Signed-off-by: Daniel Kurtz djku...@chromium.org
Acked-by: Daniel Vetter dan...@ffwll.ch
Reviewed-by: Rob Clark robdcl...@gmail.com
---
From: Mark yao mark@rock-chips.com
This adds binding documentation for Rockchip SoC VOP driver.
Signed-off-by: Mark Yao mark@rock-chips.com
Acked-by: Daniel Vetter dan...@ffwll.ch
Reviewed-by: Rob Clark robdcl...@gmail.com
---
Changes in v2:
- rename lcdc to vop
- add vop reset
- add
Hi Bjorn,
On Tuesday 30 September 2014 06:04 AM, Bjorn Andersson wrote:
The Shared Memory Manager driver implements an interface for allocating
and accessing items in the memory area shared among all of the
processors in a Qualcomm platform.
Signed-off-by: Bjorn Andersson
Hi,
On Tuesday 30 September 2014 11:47 AM, Kiran Padwal wrote:
Hi Bjorn,
On Tuesday 30 September 2014 06:04 AM, Bjorn Andersson wrote:
The Shared Memory Manager driver implements an interface for allocating
and accessing items in the memory area shared among all of the
processors in a
On Tue, Sep 30, 2014 at 11:07:56AM +0900, Simon Horman wrote:
On Thu, Sep 25, 2014 at 06:13:16PM +0200, Geert Uytterhoeven wrote:
Hi Simon, Magnus,
This patch series adds chosen/stdout-path to the various shmobile DTS files
that are used for reference or multi-platform builds.
Hi Simon,
On Tue, Sep 30, 2014 at 8:30 AM, Simon Horman ho...@verge.net.au wrote:
On Tue, Sep 30, 2014 at 11:07:56AM +0900, Simon Horman wrote:
On Thu, Sep 25, 2014 at 06:13:16PM +0200, Geert Uytterhoeven wrote:
This patch series adds chosen/stdout-path to the various shmobile DTS files
On Tue, 2014-09-30 at 10:00 +0530, Kiran Padwal wrote:
On Monday 29 September 2014 07:24 PM, Ivan T. Ivanov wrote:
On Fri, 2014-09-26 at 16:51 +0530, Kiran Padwal wrote:
On Thursday 25 September 2014 07:00 PM, Ivan T. Ivanov wrote:
Add support for the temperature alarm peripheral found
On 29/09/14 23:17, Stephen Boyd wrote:
On 09/29/14 02:14, Srinivas Kandagatla wrote:
@@ -246,6 +247,24 @@
#reset-cells = 1;
};
+ apcs: syscon@2011000 {
+ compatible = syscon;
+ reg = 0x2011000
On 30/09/14 06:11, Bjorn Andersson wrote:
+ apcs: syscon@2011000 {
+ compatible = syscon;
+ reg = 0x2011000 0x1000;
+ };
+
+ rpm@108000 {
+ compatible = qcom,rpm-apq8064;
+
On Tue, Sep 30, 2014 at 09:04:16AM +0200, Geert Uytterhoeven wrote:
Hi Simon,
On Tue, Sep 30, 2014 at 8:30 AM, Simon Horman ho...@verge.net.au wrote:
On Tue, Sep 30, 2014 at 11:07:56AM +0900, Simon Horman wrote:
On Thu, Sep 25, 2014 at 06:13:16PM +0200, Geert Uytterhoeven wrote:
This
On Tue, Sep 30, 2014 at 02:14:19PM +0800, Mark Yao wrote:
From: Mark yao mark@rock-chips.com
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao mark@rock-chips.com
Signed-off-by: Daniel Kurtz djku...@chromium.org
Acked-by: Daniel Vetter
Hi Rafael,
On Tuesday 30 September 2014 04:58 AM, Rafael J. Wysocki wrote:
On Monday, September 29, 2014 03:53:06 PM Shreyas B Prabhu wrote:
Hi,
Any updates on this patch series?
I have a couple of patches from there in my tree it seems. Please have a look
at linux-pm.git/linux-next and
On 30/09/14 06:17, Bjorn Andersson wrote:
On Mon 29 Sep 02:15 PDT 2014, Srinivas Kandagatla wrote:
This patch adds device tree nodes to support two usb hosts on APQ8064
SOC.
+ compatible = qcom,rpm-pm8921-smps;
+ reg
Am Dienstag, 30. September 2014, 10:10:20 schrieb Daniel Vetter:
On Tue, Sep 30, 2014 at 02:14:19PM +0800, Mark Yao wrote:
From: Mark yao mark@rock-chips.com
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao mark@rock-chips.com
On 29/09/14 23:20, Stephen Boyd wrote:
On 09/29/14 02:15, Srinivas Kandagatla wrote:
@@ -396,6 +407,35 @@
usb-phy = usb4_phy;
};
+ sata_phy0:sata-phy@1b40{
add some spaces here?
Will fix this in next version.
+
On 2014年09月30日 16:10, Daniel Vetter wrote:
On Tue, Sep 30, 2014 at 02:14:19PM +0800, Mark Yao wrote:
From: Mark yao mark@rock-chips.com
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao mark@rock-chips.com
Signed-off-by: Daniel Kurtz
On Tue, Sep 30, 2014 at 10:10:20AM +0200, Daniel Vetter wrote:
On Tue, Sep 30, 2014 at 02:14:19PM +0800, Mark Yao wrote:
From: Mark yao mark@rock-chips.com
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao mark@rock-chips.com
On Tuesday 30 September 2014 01:06 PM, Ivan T. Ivanov wrote:
On Tue, 2014-09-30 at 10:00 +0530, Kiran Padwal wrote:
On Monday 29 September 2014 07:24 PM, Ivan T. Ivanov wrote:
On Fri, 2014-09-26 at 16:51 +0530, Kiran Padwal wrote:
On Thursday 25 September 2014 07:00 PM, Ivan T. Ivanov wrote:
On Tue, Sep 30, 2014 at 12:08:49AM +0100, Bjorn Helgaas wrote:
On Mon, Sep 29, 2014 at 4:31 PM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
On Mon, 2014-09-29 at 15:33 -0600, Bjorn Helgaas wrote:
Right and on powerpc and others as well. We need to survey existing
resources. We
On Mon, Sep 29, 2014 at 08:20:30PM +0100, Al Stone wrote:
On 09/29/2014 08:29 AM, Liviu Dudau wrote:
Some architectures do not have a simple view of the PCI I/O space and
instead use a range of CPU addresses that map to bus addresses. For some
architectures these ranges will be expressed
On Sunday 28 September 2014 12:22:07 Zhangfei Gao wrote:
+
+Required properties:
+- compatible: Must be hisilicon,hix5hd2-i2c
+ Specifically, the following versions of the chipset are supported:
+ Hi3716CV200 (support six I2C module)
+ Hi3719CV100 (support six I2C module)
+
On Sunday 28 September 2014 12:22:09 Zhangfei Gao wrote:
+
+ i2c0: i2c@b1 {
+ compatible = hisilicon,hix5hd2-i2c;
+ reg = 0xb1 0x1000;
+ interrupts = 0 38 4;
+ clocks = clock
Thanks for pointing correction ROB.
Will fix it.
On Fri, Sep 26, 2014 at 11:56 PM, Rob Herring robherri...@gmail.com wrote:
On Wed, Sep 24, 2014 at 11:06 AM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 24 September 2014 17:37:45 Robert Richter wrote:
+ pcie0@0x8480, {
The
Will/Arnd
Thanks for the comments.
There is another patch submitted for adding MSI controller to Generic driver.
https://lkml.org/lkml/2014/9/28/150
Will go through these and comeback.
On Wed, Sep 24, 2014 at 10:19 PM, Will Deacon will.dea...@arm.com wrote:
On Wed, Sep 24, 2014 at 05:12:26PM
On 09/30/2014 05:02 PM, Arnd Bergmann wrote:
On Sunday 28 September 2014 12:22:09 Zhangfei Gao wrote:
+
+ i2c0: i2c@b1 {
+ compatible = hisilicon,hix5hd2-i2c;
+ reg = 0xb1 0x1000;
+ interrupts = 0 38 4;
+
On 09/30/2014 05:01 PM, Arnd Bergmann wrote:
On Sunday 28 September 2014 12:22:07 Zhangfei Gao wrote:
+
+Required properties:
+- compatible: Must be hisilicon,hix5hd2-i2c
+ Specifically, the following versions of the chipset are supported:
+ Hi3716CV200 (support six I2C module)
+
On 2014/9/30 17:02, Arnd Bergmann wrote:
On Sunday 28 September 2014 12:22:09 Zhangfei Gao wrote:
+
+ i2c0: i2c@b1 {
+ compatible = hisilicon,hix5hd2-i2c;
+ reg = 0xb1 0x1000;
+ interrupts = 0 38 4;
+
On Sunday 28 September 2014 08:48:17 Jingchang Lu wrote:
+i2c@3 {
+#address-cells = 1;
+#size-cells = 0;
+reg = 0x3;
+
+eeprom@56 {
+compatible = at24,24c512;
On Sunday 28 September 2014 10:24:01 Rafał Miłecki wrote:
This will allow us to define GPIO-attached devices (LEDs, buttons) in
the the device tree.
Signed-off-by: Rafał Miłecki zaj...@gmail.com
---
This is based on top of
[PATCH v6] bcma: register bcma as device tree driver
that I hope
Hi, Mark
[use plain text pattern to send again]
2014-09-29 22:47 GMT+08:00 Mark Brown broo...@kernel.org:
On Mon, Sep 29, 2014 at 08:04:50PM +0800, zhang.l...@gmail.com wrote:
dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb
dtb-$(CONFIG_ARCH_XGENE) += apm-mustang.dtb
Hello.
(2014/09/30 1:35), Sergei Shtylyov wrote:
Hello.
On 09/03/2014 09:25 AM, Yoshihiro Shimoda wrote:
This driver supports other SoCs, but they need boards/Soc depend code.
So, this patch adds device tree support for R-Car H2 and M2 initially.
Signed-off-by: Yoshihiro Shimoda
On 30 September 2014 11:37, Arnd Bergmann a...@arndb.de wrote:
On Sunday 28 September 2014 10:24:01 Rafał Miłecki wrote:
@@ -17,4 +33,12 @@ Example:
ranges = 0x 0x1800 0x0010;
#address-cells = 1;
#size-cells = 1;
+
+
On Tuesday 30 September 2014 08:12:07 Peter Chen wrote:
+
+ if (dev-of_node) {
+ ret = ci_hdrc_usb2_dt_probe(dev, ci_pdata);
+ if (ret)
+ goto clk_err;
+ } else {
+ ret = dma_set_mask_and_coherent(pdev-dev,
On Monday 29 September 2014 22:21:59 Sergei Shtylyov wrote:
+
+ usb@0,1 {
+ reg = 0x800 0 0 0 0;
+ device_type = pci;
+ phys = usb0 0;
+ phy-names = usb;
+ };
+
+
Hi, Arnd
[use plain text pattern to send again]
Thank you very much for your review in detail so carefully. I'll
address these changes which you mentioned in this patch set in V2, but
the days from tomorrow to 10.7 are Chinese holidays, I'm going to send
PATCHv2 a few days later.
I'm also sorry
The patch implements the OPAL rtc driver that binds with the rtc
driver subsystem. The driver uses the platform device infrastructure
to probe the rtc device and register it to rtc class framework. The
'wakeup' is supported depending upon the property 'has-tpo' present
in the OF node. It provides
This will allow us to define GPIO-attached devices (LEDs, buttons) in
the the device tree.
Signed-off-by: Rafał Miłecki zaj...@gmail.com
---
This is based on top of
[PATCH v6] bcma: register bcma as device tree driver
that I hope will reach wireless-next git tree.
V2: Describe axi chilren and
On Tuesday 30 September 2014 17:25:25 zhangfei wrote:
On 09/30/2014 05:01 PM, Arnd Bergmann wrote:
On Sunday 28 September 2014 12:22:07 Zhangfei Gao wrote:
+
+Required properties:
+- compatible: Must be hisilicon,hix5hd2-i2c
+ Specifically, the following versions of the chipset are
On Tuesday 30 September 2014 11:56:20 Rafał Miłecki wrote:
On 30 September 2014 11:37, Arnd Bergmann a...@arndb.de wrote:
On Sunday 28 September 2014 10:24:01 Rafał Miłecki wrote:
@@ -17,4 +33,12 @@ Example:
ranges = 0x 0x1800 0x0010;
On Tuesday 30 September 2014 12:22:26 Rafał Miłecki wrote:
+The top-level axi bus may contain children representing attached cores
+(devices). This is needed since some hardware details can't be auto
+detected (e.g. IRQ numbers). Also some of the cores may be responsible
+for extra things,
On Mon, Sep 29, 2014 at 08:43:35PM +0100, Bjorn Helgaas wrote:
On Mon, Sep 29, 2014 at 03:29:19PM +0100, Liviu Dudau wrote:
This is my version 13 of the attempt at adding support for generic PCI host
bridge controllers. It contains only cleanups to make it play nice with the
linux-next tree
On 30 September 2014 12:36, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 30 September 2014 12:22:26 Rafał Miłecki wrote:
@@ -218,6 +218,12 @@ int bcma_gpio_init(struct bcma_drv_cc *cc)
#if IS_BUILTIN(CONFIG_BCM47XX)
chip-to_irq= bcma_gpio_to_irq;
#endif
+#if
This will allow us to define GPIO-attached devices (LEDs, buttons) in
the the device tree.
Signed-off-by: Rafał Miłecki zaj...@gmail.com
---
This is based on top of
[PATCH v6] bcma: register bcma as device tree driver
that I hope will reach wireless-next git tree.
V2: Describe axi chilren and
On Tuesday 30 September 2014 12:55:48 Rafał Miłecki wrote:
This will allow us to define GPIO-attached devices (LEDs, buttons) in
the the device tree.
Signed-off-by: Rafał Miłecki zaj...@gmail.com
---
This is based on top of
[PATCH v6] bcma: register bcma as device tree driver
that I hope
On 15/07/14 15:33, Alexander Stein wrote:
This adds regulator support to enable/disable the LCD voltage, using
'lcd-supply' as regulator name.
Signed-off-by: Alexander Stein alexander.st...@systec-electronic.com
---
.../devicetree/bindings/video/atmel,lcdc.txt | 3 +++
On Mon, Sep 29, 2014 at 03:36:30PM +0100, Arnd Bergmann wrote:
On Sunday 28 September 2014 15:53:28 suravee.suthikulpa...@amd.com wrote:
+
+#ifdef CONFIG_ARM64
+struct pci_bus *gen_scan_root_bus(struct device *parent, int bus,
+ struct pci_ops *ops,
Signed-off-by: Zhangfei Gao zhangfei@linaro.org
---
arch/arm/boot/dts/hisi-x5hd2.dtsi | 60 +
1 file changed, 60 insertions(+)
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi
b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index d3d99fb..17d0637 100644
---
From: Wei Yan sledge.yan...@huawei.com
I2C drivers for hix5hd2 soc series, including following chipset
Hi3716CV200, Hi3719CV100, Hi3718CV100, Hi3719MV100, Hi3718MV100.
Signed-off-by: Wei Yan sledge.yan...@huawei.com
Signed-off-by: Zhangfei Gao zhangfei@linaro.org
---
v3:
Add COMPILE_TEST as dependence to enable compile test
Remove specific mach info in dts binding to solve the confusion.
v2:
Modify according to Wolfram's comments
including change vector name, coding style, return value etc.
Wei Yan (2):
i2c: hix5hd2: add devicetree documentation
i2c:
If power area D4, which contains the Coresight-ETM hardware block, is
powered down on R-Mobile A1 (r8a7740), the kernel crashes when
suspending from s2ram with:
Internal error: Oops - undefined instruction: 0 [#1] ARM
This happens because dbg_cpu_pm_notify() calls reset_ctrl_regs(), which
On Tuesday 30 September 2014 13:03:44 Lorenzo Pieralisi wrote:
static int gen_pci_probe(struct platform_device *pdev)
{
@@ -326,6 +385,7 @@ static int gen_pci_probe(struct platform_device *pdev)
struct device *dev = pdev-dev;
struct device_node *np = dev-of_node;
On Tue, Sep 30, 2014 at 12:03:42PM +0200, Arnd Bergmann wrote:
On Tuesday 30 September 2014 08:12:07 Peter Chen wrote:
+
+ if (dev-of_node) {
+ ret = ci_hdrc_usb2_dt_probe(dev, ci_pdata);
+ if (ret)
+ goto clk_err;
+ } else {
This a series of patches is a DRM Driver for Rockchip Socs, add support
for vop devices. Future patches will add additional encoders/connectors,
such as eDP, HDMI.
The basic crtc for rockchip is a VOP - Video Output Processor.
the vop devices found on Rockchip rk3288 Soc, rk3288 soc have two
From: Mark yao mark@rock-chips.com
This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: Mark Yao mark@rock-chips.com
Signed-off-by: Daniel Kurtz djku...@chromium.org
Acked-by: Daniel Vetter dan...@ffwll.ch
Reviewed-by: Rob Clark robdcl...@gmail.com
---
From: Mark yao mark@rock-chips.com
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao mark@rock-chips.com
---
Changes in v2:
- add DRM master device node to list all display nodes that comprise
the graphics subsystem.
Changes in v3: None
From: Mark yao mark@rock-chips.com
This adds binding documentation for Rockchip SoC VOP driver.
Signed-off-by: Mark Yao mark@rock-chips.com
---
Changes in v2:
- rename lcdc to vop
- add vop reset
- add iommu node
- add port for display-subsystem
Changes in v3: None
Changes in v4: None
From: David Miller
From: Santosh Shilimkar santosh.shilim...@ti.com
Date: Thu, 25 Sep 2014 13:48:36 -0400
+static inline int gbe_phy_link_status(struct gbe_slave *slave)
+{
+ if (!slave-phy)
+ return 1;
+
+ if (slave-phy-link)
+ return 1;
+
+ return
The pci_register_io_range() and pci_pio_to_address() were recently
introduced to generalize the handling of memory mapped PCI I/O space,
but they are only valid when CONFIG_OF is set, leading to a possible
build error:
drivers/pci/host/pcie-rcar.c: In function 'rcar_pcie_setup_window':
Hi Mark,
On 09/30/2014 03:03 PM, Mark Yao wrote:
From: Mark yao mark@rock-chips.com
This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: Mark Yao mark@rock-chips.com
Signed-off-by: Daniel Kurtz djku...@chromium.org
Acked-by: Daniel Vetter
On Friday 26 September 2014 00:09:19 Hauke Mehrtens wrote:
This driver is used by the bcm53xx ARM SoC code. Now it is possible to
give the address of the chipcommon core in device tree and bcma will
search for all the other cores.
Signed-off-by: Hauke Mehrtens ha...@hauke-m.de
I'm basically
On Tue, Sep 30, 2014 at 3:09 PM, David Laight david.lai...@aculab.com wrote:
+static inline int gbe_phy_link_status(struct gbe_slave *slave)
+{
+ if (!slave-phy)
+ return 1;
+
+ if (slave-phy-link)
+ return 1;
+
+ return 0;
+}
Please use 'bool' as
On Sep 29, 2014, at 7:34 PM, Bjorn Andersson bjorn.anders...@sonymobile.com
wrote:
Add binding documentation for the Qualcomm Resource Power Manager (RPM)
using shared memory (Qualcomm SMD) as transport mechanism. This is found
in 8974 and newer based devices.
The binding currently
On Tuesday 30 September 2014 20:39:34 Peter Chen wrote:
Thanks, Arnd. I had not thought setting dma mask is so complicated, yes, it
should check the return value, two things to confirm:
- dma_coerce_mask_and_coherent or dma_set_mask_and_coherent, the only
difference
of these two API is the
Hi Laurent,
Here is an initial review of this driver:
On 09/29/14 22:27, Laurent Pinchart wrote:
Xilinx platforms have no hardwired video capture or video processing
interface. Users create capture and memory to memory processing
pipelines in the FPGA fabric to suit their particular needs, by
On Mon 29 Sep 23:28 PDT 2014, Kiran Padwal wrote:
Hi,
On Tuesday 30 September 2014 11:47 AM, Kiran Padwal wrote:
Hi Bjorn,
On Tuesday 30 September 2014 06:04 AM, Bjorn Andersson wrote:
[..]
+ smem-hwlock = of_hwspin_lock_request(pdev-dev.of_node, NULL);
Compilation breaks
This patch adds device tree nodes to support two usb hosts on APQ8064
SOC.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 16 +
arch/arm/boot/dts/qcom-apq8064.dtsi| 55 ++
2 files
This patch adds AHCI based SATA controller support to APQ8064.
Tested on IFC6410 board.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 8 +++
arch/arm/boot/dts/qcom-apq8064.dtsi| 36 ++
2
This patch adds rpm node to apq8064 dt as rpm would be used by other
devices for regulator support. Also adds all the regulators in the rpm.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 297
1
This patch adds USB OTG support on USB1 of APQ8064 SOC.
Tested on IFC6410 with ethernet gadget.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 14
arch/arm/boot/dts/qcom-apq8064.dtsi| 36
These patches adds dt nodes for RPM, USB and SATA IPs found in APQ8064.
All the driver support for these IPs are already available in v3.17, except
the RPM driver which is now accepted by Lee and Mark.
These patches depend on the header file from
On Sep 29, 2014, at 7:34 PM, Bjorn Andersson bjorn.anders...@sonymobile.com
wrote:
Add device tree binding documentation for the Qualcom Shared Memory
manager.
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
Exposed by this node is a set of items of different sizes.
On Sep 29, 2014, at 7:34 PM, Bjorn Andersson bjorn.anders...@sonymobile.com
wrote:
All Qualcomm platforms implements a shared heap among the processors in the
SoC, used for sharing data with other parts of the system.
One consumer of items from this heap is the Shared Memory Driver, a ring
Hi Tomasz,
On Tue, Sep 30, 2014 at 4:16 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Abhilash,
Just two minor issues inline. I leave them up to Linus to decide.
Linus, if you don't mind them, feel free to apply this patch with my Ack.
On 29.09.2014 07:15, Abhilash Kesavan wrote:
Add the device tree support to the pxa168_eth driver.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Arnd Bergmann a...@arndb.de
---
drivers/net/ethernet/marvell/pxa168_eth.c | 70 +--
1 file changed, 47 insertions(+), 23 deletions(-)
diff
Berlin SoCs have an Ethernet controller compatible with the pxa168.
Allow these SoCs to use the pxa168_eth driver.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Arnd Bergmann a...@arndb.de
---
drivers/net/ethernet/marvell/Kconfig | 2 +-
1 file changed, 1
This patch adds the Ethernet node, enabling the network unit on Berlin
BG2Q SoCs.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Arnd Bergmann a...@arndb.de
---
arch/arm/boot/dts/berlin2q.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git
Add a dependency to COMPILE_TEST so that the driver can be compiled for
test purposes.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Arnd Bergmann a...@arndb.de
---
drivers/net/ethernet/marvell/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
This patch enables the Ethernet port on the Marvell Berlin2Q DMP board.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Arnd Bergmann a...@arndb.de
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 4
1 file changed, 4 insertions(+)
diff --git
This patch rework the way the MAC address is retrieved. The MAC address
can now, in addition to being random, be set in the device tree or
retrieved from the Ethernet controller MAC address registers. The
probing function will try to get a MAC address in the following order:
- From the device
Hi all,
This series introduce support for the Ethernet controller on Berlin SoCs,
using the existing pxa168 Ethernet driver. In order to do this, DT
support is added to the driver alongside some other modifications and
fixes.
This has been tested on a Berlin BG2Q DMP board.
Changes since v5:
David,
On Mon, Sep 29, 2014 at 04:04:36PM -0400, David Miller wrote:
From: Antoine Tenart antoine.ten...@free-electrons.com
Date: Fri, 26 Sep 2014 16:33:48 +0200
@@ -1603,6 +1620,12 @@ static int pxa168_eth_suspend(struct platform_device
*pdev, pm_message_t state)
#define
Adding a irq_chip field to the samsung_pin_bank struct helps in
consolidating the irq domain callbacks for external gpio and wakeup
interrupt controllers. The exynos_wkup_irqd_ops and exynos_gpio_irqd_ops
have now been merged into a single exynos_eint_irqd_ops.
Signed-off-by: Abhilash Kesavan
When changing the MAC address, in addition to updating the dev_addr in
the net_device structure, this patch also update the MAC address
registers (high and low) of the Ethernet controller with the new MAC.
The address stored in these registers is used for IEEE 802.3x Ethernet
flow control, which
Clean up a bit the pxa168_eth driver before adding the device tree
support.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Arnd Bergmann a...@arndb.de
---
drivers/net/ethernet/marvell/pxa168_eth.c | 102 +++---
1 file changed, 50 insertions(+),
IEEE 802.3x Ethernet flow control is disabled when bit (1 2) is set
in the port status register. Fix the flow control detection in the link
event handling function which was relying on the opposite assumption.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Arnd
Exynos7 uses different offsets for wakeup interrupt configuration registers.
So a new irq_chip instance for Exynos7 wakeup interrupts is added. The irq_chip
selection is now based on the wakeup interrupt controller compatible string.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
From: Naveen Krishna Ch naveenkrishna...@gmail.com
This patch adds initial driver data for Exynos7 pinctrl support.
Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Tested-by:
From: Naveen Krishna Ch naveenkrishna...@gmail.com
Add intial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Tested-by: Thomas Abraham
Changes since v3:
- Changed variable name from exynos_wkup_irq_chip to irq_chip
- Added acked-by tag from Tomasz Figa
Changes since v2:
- Added a .irq_chip field to the samsung_pin_bank struct
- Consolidated the wakeup and gpio irqd_ops
Changes since v1:
-
From: Naveen Krishna Ch naveenkrishna...@gmail.com
Enable pinctrl support for exynos7 SoCs.
Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Tested-by: Thomas Abraham
The function exynos_irq_demux_eint16_31 uses pre-defined offsets for external
interrupt pending status and mask registers. So this function is not extensible
for Exynos7 SoC which has these registers at different offsets. Generalize
the exynos_irq_demux_eint16_31 function by using the pending/mask
This adds the binding documentation for the Marvell PXA168 Ethernet
controller, following its DT support.
Signed-off-by: Antoine Tenart antoine.ten...@free-electrons.com
Acked-by: Arnd Bergmann a...@arndb.de
---
.../devicetree/bindings/net/marvell-pxa168.txt | 36 ++
1
On Tue 30 Sep 06:46 PDT 2014, Kumar Gala wrote:
On Sep 29, 2014, at 7:34 PM, Bjorn Andersson bjorn.anders...@sonymobile.com
wrote:
diff --git a/Documentation/devicetree/bindings/mfd/qcom-rpm-smd.txt
b/Documentation/devicetree/bindings/mfd/qcom-rpm-smd.txt
new file mode 100644
On Tue, Sep 30, 2014 at 02:19:05PM +0100, Arnd Bergmann wrote:
The pci_register_io_range() and pci_pio_to_address() were recently
introduced to generalize the handling of memory mapped PCI I/O space,
but they are only valid when CONFIG_OF is set, leading to a possible
build error:
On Sat, Aug 23, 2014 at 1:23 AM, Loc Ho l...@apm.com wrote:
This patch adds support for the APM X-Gene SoC EDAC driver. It
requires ARM64 EDAC support patch [1] to compile due to
dependence on MC module which calls an unused software memory
scrub function.
[1]
On Tue 30 Sep 06:49 PDT 2014, Kumar Gala wrote:
On Sep 29, 2014, at 7:34 PM, Bjorn Andersson bjorn.anders...@sonymobile.com
wrote:
All Qualcomm platforms implements a shared heap among the processors in the
SoC, used for sharing data with other parts of the system.
One consumer of
Hi Tomasz,
On Mon, Sep 22, 2014 at 2:22 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Abhilash,
On 22.09.2014 06:47, Abhilash Kesavan wrote:
Changes since v4:
- Fixed comments from Tomasz Figa:
- Changed the namespace prefix from exynos to samsung
- Defined bindings to take
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