On Wed, Oct 8, 2014 at 9:45 PM, Josh Cartwright wrote:
> This has bitten me more times than I care to admit, but have you checked
> that you've set CONFIG_MMC_BLOCK_MINORS higher than 16? Perhaps we
> should be doing that in qcom_defconfig if we aren't already.
ouch... i was using multi_v7_defco
On 08.10.14 17:44:32, Liviu Dudau wrote:
> On Wed, Oct 08, 2014 at 09:49:27AM +0100, Robert Richter wrote:
> > On 07.10.14 16:01:49, Liviu Dudau wrote:
> > I am quite confused a bit on which is the latest code base now. I was
> > looking into Bjorn's pci/host-generic and there is a different
> > im
Added 10GbE interface and clock nodes.
Signed-off-by: Iyappan Subramanian
Signed-off-by: Keyur Chudgar
---
arch/arm64/boot/dts/apm-mustang.dts | 4
arch/arm64/boot/dts/apm-storm.dtsi | 28 +++-
2 files changed, 31 insertions(+), 1 deletion(-)
diff --git a/arch/ar
- Rearranged code to pave the way for adding 10GbE support
- Added mac_ops structure containing function pointers for mac specific
functions
- Added port_ops structure containing function pointers for port specific
functions
Signed-off-by: Iyappan Subramanian
Signed-off-by: Keyur Chudgar
---
Signed-off-by: Iyappan Subramanian
Signed-off-by: Keyur Chudgar
---
.../net/ethernet/apm/xgene/xgene_enet_ethtool.c| 28 +-
1 file changed, 22 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_ethtool.c
b/drivers/net/ethernet/apm/xgene
- Added 10GbE support
- Removed unused macros/variables
- Moved mac_init call to the end of hardware init
Signed-off-by: Iyappan Subramanian
Signed-off-by: Keyur Chudgar
---
drivers/net/ethernet/apm/xgene/Makefile | 3 +-
drivers/net/ethernet/apm/xgene/xgene_enet_hw.h| 14 +-
d
Signed-off-by: Iyappan Subramanian
Signed-off-by: Keyur Chudgar
---
Documentation/devicetree/bindings/net/apm-xgene-enet.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/net/apm-xgene-enet.txt
b/Documentation/devicetree/bindings/net/ap
Updated APM X-Gene ethernet driver maintainers list.
Signed-off-by: Iyappan Subramanian
Signed-off-by: Keyur Chudgar
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 907de3d..5da45de 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -723,7 +723,6 @@
Adding 10GbE support to APM X-Gene SoC ethernet driver.
v3: Address comments from v2
* dtb: changed to use all-zeros for the mac address
v2: Address comments from v1
* created preparatory patch to review before adding new functionality
* dtb: updated to use tabs consistently
v1:
* Initial versio
On Thu, Oct 09, 2014 at 09:38:57AM +0800, Zhang Rui wrote:
> Hi, Eduardo,
>
> On Mon, 2014-09-29 at 02:47 +0300, Vladimir Zapolskiy wrote:
> > Here on function return all temporarily used device nodes shall
> > decrement their usage counter. The problems are found with device
> > nodes allocated b
On Sat, Sep 27, 2014 at 2:53 AM, Mike Turquette wrote:
> Quoting Chen-Yu Tsai (2014-09-25 17:55:27)
>> On Fri, Sep 26, 2014 at 8:25 AM, Mike Turquette
>> wrote:
>> > Quoting Maxime Ripard (2014-09-11 13:36:23)
>> >> Hi Chen-Yu,
>> >>
>> >> On Sat, Sep 06, 2014 at 06:47:21PM +0800, Chen-Yu Tsai w
From: Dinh Nguyen
There are certain drivers that are required to get loaded very early using
arch_initcall. An example of such a driver is the SOCFPGA's FPGA bridge driver.
This driver has to get loaded early because it needs to enable FPGA components
that are connected to the bridge.
This FPGA
On Tue, Sep 30, 2014 at 11:55 PM, Maxime Ripard
wrote:
> On Sat, Sep 27, 2014 at 04:49:55PM +0800, Chen-Yu Tsai wrote:
>> The DMA controller requires AHB1 bus clock to be clocked from PLL6.
>>
>> Signed-off-by: Chen-Yu Tsai
>> ---
>> arch/arm/boot/dts/sun6i-a31.dtsi | 5 +
>> 1 file changed,
Hi,
Am 08.10.2014 um 15:02 schrieb Chen-Yu Tsai:
> This is v3 of the initial Allwinner A80 support series.
> This patch series adds very basic support for Allwinner's A80 SoC,
> a big.LITTLE architecture with 4 Cortex-A7s and 4 Cortex-A15s.
>
> Development is done on the A80 Optimus Board, the de
Hi, Eduardo,
On Mon, 2014-09-29 at 02:47 +0300, Vladimir Zapolskiy wrote:
> Here on function return all temporarily used device nodes shall
> decrement their usage counter. The problems are found with device
> nodes allocated by for_each_child_of_node(), of_parse_phandle()
> and of_find_node_by_na
On 10/07/2014 02:41 PM, Lina Iyer wrote:
+
+static int qcom_cpuidle_probe(struct platform_device *pdev)
+{
+ struct cpuidle_driver *drv = &qcom_cpuidle_driver;
+ int ret;
+
+ qcom_idle_enter = pdev->dev.platform_data;
+ if (!qcom_idle_enter)
+ return -EFAULT;
On 10/07/2014 02:41 PM, Lina Iyer wrote:
+
+static struct platform_device qcom_cpuidle_device = {
+ .name = "qcom_cpuidle",
+ .id= -1,
+ .dev.platform_data = qcom_cpu_pm_enter_sleep,
+};
+
Same comment as last time, doesn't need to be static.
+s
On 10/07/2014 02:41 PM, Lina Iyer wrote:
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
index 1505fb8..a18e8fc 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
+++ b/Documentation/devicetree/bindi
Hello.
(2014/10/09 3:02), Sergei Shtylyov wrote:
> From: Yoshihiro Shimoda
>
> Enable HS-USB device for the Koelsch board, defining the GPIO that the driver
> should check when probing (which is the ID output from MAX3355 OTG chip).
>
> Note that there will be pinctrl-related error messages if
On 14-10-08 11:12 AM, Arnd Bergmann wrote:
On Wednesday 08 October 2014 09:27:08 Scott Branden wrote:
On 14-10-08 06:28 AM, Arnd Bergmann wrote:
On Wednesday 08 October 2014 05:27:24 Scott Branden wrote:
I don't think you need per-board config options. The main option
above should be enough.
On Wednesday, October 08, 2014 10:47:16 AM Bryan Wu wrote:
> On Wed, Oct 8, 2014 at 7:04 AM, Rafael J. Wysocki wrote:
> > On Tuesday, October 07, 2014 02:18:45 AM Rafael J. Wysocki wrote:
> >> From: Rafael J. Wysocki
> >>
> >> Make use of device property API in this driver so that both OF and ACP
On Wed, Oct 08, 2014 at 11:14:40PM +0200, Christophe Henri RICARD wrote:
> For your information, the lpcpd pin is named like this as per
> PCClientTPMSpecification is also known as TPMSTB on this product.
> The TPMSTB pin can be used in order to support D1 and D2 power
> management state. I am ac
On 9/30/2014 6:08 PM, Bjorn Andersson wrote:
On Tue 30 Sep 16:16 PDT 2014, Jeffrey Hugo wrote:
On 9/30/2014 8:37 AM, Bjorn Andersson wrote:
On Tue 30 Sep 06:46 PDT 2014, Kumar Gala wrote:
On Sep 29, 2014, at 7:34 PM, Bjorn Andersson
wrote:
diff --git a/Documentation/devicetree/bindings/
Here in my initial detailed pass. I still have some "issues" that I
want to clarify on my end, but I think I have plenty of comments to
start with.
On 9/29/2014 6:34 PM, Bjorn Andersson wrote:
The Shared Memory Manager driver implements an interface for allocating
and accessing items in the m
Add documentation for compatible property of backlight subnode.
Signed-off-by: Johannes Pointner
---
Changes since v2:
1. Removed the pmic part of the patch.
2. Added newline before subnode in the example.
---
.../devicetree/bindings/video/backlight/tps65217-backlight.txt | 10 +++---
1 file
Jason,
For your information, the lpcpd pin is named like this as per
PCClientTPMSpecification is also known as TPMSTB on this product.
The TPMSTB pin can be used in order to support D1 and D2 power management state.
I am actually sorry to refer to Microsoft website here ;) :
http://msdn.microsof
On Wed, Oct 08, 2014 at 10:41:36PM +0200, Christophe Henri RICARD wrote:
> Hi Jason,
>
> I have currently seen both. I agree on the principles as it is
> simplifying the code a little bit. I including this clean up in
> this patch Add devicetree structure for a future v2 submission
I was just lo
Hi Jason,
I have currently seen both. I agree on the principles as it is simplifying the
code a little bit.
I including this clean up in this patch Add devicetree structure for a future
v2 submission
Best Regards
Christophe
-Original Message-
From: Jason Gunthorpe [mailto:jguntho...@ob
On Wed, Oct 08, 2014 at 10:26:57PM +0200, Christophe Henri RICARD wrote:
> Hi Jason,
>
> Patch 10/16 includes the following lines:
> + if (r == -ERESTARTSYS && freezing(current)) {
> + clear_thread_flag(TIF_SIGPENDING);
> + goto again;
> +
Hi Jason,
Patch 10/16 includes the following lines:
+ if (r == -ERESTARTSYS && freezing(current)) {
+ clear_thread_flag(TIF_SIGPENDING);
+ goto again;
+ }
Line 149 in this patch. I am surprise you are saying it does not occur
On Wed, Oct 08, 2014 at 01:12:54PM -0700, Guenter Roeck wrote:
> On Wed, Oct 08, 2014 at 11:12:29AM -0500, atull wrote:
> > > if not specified. We'll have to sort out with the regulator core how this
> > > should
> > > be handled.
> Followup on this: Since the regulator core considers the proper
On Wed, Oct 08, 2014 at 11:12:29AM -0500, atull wrote:
> On Mon, 6 Oct 2014, Guenter Roeck wrote:
>
> > On Thu, Oct 02, 2014 at 01:37:48PM -0500, at...@opensource.altera.com wrote:
> > > From: Alan Tull
> > >
> > > Add device tree bindings documentation for ltc2978.
> > >
> > > Signed-off-by: A
On Wed, Oct 08, 2014 at 02:27:08PM -0500, ttha...@opensource.altera.com wrote:
> + spidev@0 {
> + compatible = "spidev";
> + reg = <0>; /* chip select */
> + spi-max-frequency = <1>
From: Yoshihiro Shimoda
Enable HS-USB device for the Lager board, defining the GPIO that the driver
should check when probing. Since this board doesn't have the OTG ID pin, we
assume that GP5_18 (USB0_PWEN) is an ID pin because it is 1 when the SW5 is
in position 2-3 (meaning USB function) and 0
From: Yoshihiro Shimoda
Define the R8A7790 generic part of the HS-USB device node. It is up to the board
file to enable the device.
Signed-off-by: Yoshihiro Shimoda
[Sergei: fixed summary, added changelog]
Signed-off-by: Sergei Shtylyov
---
Changes in version 3:
- uppercased "arm" in the summ
Hello.
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20141007-v3.17' tag. Here we add the HS-USB device tree support
on the R8A7790/Lager reference board. The patchset requires the USB PHY
driver (already merged by Kishon and Greg) and the generic PHY sup
On Wed, Oct 08, 2014 at 09:18:44PM +0200, Nicolas Dechesne wrote:
> Georgi,
>
> On Tue, Sep 2, 2014 at 5:40 PM, Georgi Djakov wrote:
> > Enable support for the two SD host controllers on the APQ8084 platform
> > by adding the required nodes to the DT files.
> > On the IFC6540 board, the first con
On Sunday 05 October 2014 23:59:12 Beniamino Galvani wrote:
>
> this patchset introduces support for Amlogic Meson8, which is a family
> of quad-core Cortex-A9 SoCs used in tablets and set-top boxes.
>
> Changes since v1:
> - reused the existing DT machine definition and renamed it to be more
>
From: Thor Thayer
Add 2 SPI nodes to SOCFPGA device tree.
Signed-off-by: Thor Thayer
---
v2: Remove extra files. Move SPIDEV into board specific file.
---
arch/arm/boot/dts/socfpga.dtsi | 24
arch/arm/boot/dts/socfpga_cyclone5.dtsi | 10 ++
2 files
Georgi,
On Tue, Sep 2, 2014 at 5:40 PM, Georgi Djakov wrote:
> Enable support for the two SD host controllers on the APQ8084 platform
> by adding the required nodes to the DT files.
> On the IFC6540 board, the first controller is connected to the onboard
> eMMC and the second is connected to a mi
On 14-10-08 11:12 AM, Arnd Bergmann wrote:
On Wednesday 08 October 2014 09:27:08 Scott Branden wrote:
On 14-10-08 06:28 AM, Arnd Bergmann wrote:
On Wednesday 08 October 2014 05:27:24 Scott Branden wrote:
I don't think you need per-board config options. The main option
above should be enough.
On 10/08/2014 03:17 AM, Andy Shevchenko wrote:
On Tue, 2014-10-07 at 14:48 -0500, ttha...@opensource.altera.com wrote:
From: Thor Thayer
1. The of_node element must be initialized to enable discovery of node
children. The discovery takes place in the of_register_spi_devices() function.
2. Gra
On Wed, Oct 08, 2014 at 10:11:59PM +0400, Sergei Shtylyov wrote:
> On 10/08/2014 10:08 PM, Felipe Balbi wrote:
>
> From: Yoshihiro Shimoda
>
> Enable HS-USB device for the Koelsch board, defining the GPIO that the
> driver
> should check when probing (which is the ID output from
On Wednesday 08 October 2014 09:27:08 Scott Branden wrote:
> On 14-10-08 06:28 AM, Arnd Bergmann wrote:
> > On Wednesday 08 October 2014 05:27:24 Scott Branden wrote:
> >>>
> >>> I don't think you need per-board config options. The main option
> >>> above should be enough.
> >> This is not a per-bo
On Wed, Oct 08, 2014 at 10:02:44PM +0400, Sergei Shtylyov wrote:
> From: Yoshihiro Shimoda
>
> Enable HS-USB device for the Koelsch board, defining the GPIO that the driver
> should check when probing (which is the ID output from MAX3355 OTG chip).
>
> Note that there will be pinctrl-related err
On 10/08/2014 10:08 PM, Felipe Balbi wrote:
From: Yoshihiro Shimoda
Enable HS-USB device for the Koelsch board, defining the GPIO that the driver
should check when probing (which is the ID output from MAX3355 OTG chip).
Note that there will be pinctrl-related error messages if both intern
On Wed, Oct 08, 2014 at 10:07:50PM +0400, Sergei Shtylyov wrote:
> Hello.
>
> On 10/08/2014 10:05 PM, Felipe Balbi wrote:
>
> >>From: Yoshihiro Shimoda
>
> >>Enable HS-USB device for the Koelsch board, defining the GPIO that the
> >>driver
> >>should check when probing (which is the ID output
Hello.
On 10/08/2014 10:05 PM, Felipe Balbi wrote:
From: Yoshihiro Shimoda
Enable HS-USB device for the Koelsch board, defining the GPIO that the driver
should check when probing (which is the ID output from MAX3355 OTG chip).
Note that there will be pinctrl-related error messages if bot
On 10/08/2014 03:01 AM, Steffen Trumtrar wrote:
Hi!
On Tue, Oct 07, 2014 at 03:55:54PM -0500, Thor Thayer wrote:
On 10/07/2014 03:31 PM, Steffen Trumtrar wrote:
Hi!
On Tue, Oct 07, 2014 at 02:48:17PM -0500, ttha...@opensource.altera.com wrote:
From: Thor Thayer
Add 2 SPI nodes to SOCFPGA
On 10/07/2014 06:12 PM, Mark Brown wrote:
On Tue, Oct 07, 2014 at 02:48:17PM -0500,ttha...@opensource.altera.com wrote:
Add 2 SPI nodes to SOCFPGA device tree. Update copyright.
Update spi-dw.txt with bus-num as an optional property.
Again, this is just randomly mixing multiple changes. Als
Oops, this should have been [PATCH v 0/3]... :-/
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Robert Jarzmik writes:
> Add device-tree support. This is straightforward as docg3 only uses the
> standard IOMEM resources.
Brian, David, ping ?
Cheers.
--
Robert
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More
From: Yoshihiro Shimoda
Enable HS-USB device for the Henninger board, defining the GPIO that the driver
should check when probing (which is the ID output from MAX3355 OTG chip).
Note that there will be pinctrl-related error messages if both internal PCI
and HS-USB drivers are enabled but they sh
From: Yoshihiro Shimoda
Enable HS-USB device for the Koelsch board, defining the GPIO that the driver
should check when probing (which is the ID output from MAX3355 OTG chip).
Note that there will be pinctrl-related error messages if both internal PCI
and HS-USB drivers are enabled but they shou
From: Yoshihiro Shimoda
Define the R8A7791 generic part of the HS-USB device node. It is up to the board
file to enable the device.
Signed-off-by: Yoshihiro Shimoda
[Sergei: fixed summary, added changelog]
Signed-off-by: Sergei Shtylyov
---
Changes in version 2:
- uppercased "arm" in the summ
Hello.
Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20141007-v3.17' tag. Here we add the HS-USB device tree support
on the R8A7791/Koelsch/Henninger reference boards. The patchset requires the
USB PHY driver (already merged by Kishon and Greg) and the ge
On Wed, Oct 8, 2014 at 7:04 AM, Rafael J. Wysocki wrote:
> On Tuesday, October 07, 2014 02:18:45 AM Rafael J. Wysocki wrote:
>> From: Rafael J. Wysocki
>>
>> Make use of device property API in this driver so that both OF and ACPI
>> based system can use the same driver.
>>
>> This change contains
On Thu, Sep 25, 2014 at 03:02:09PM +0530, Lokesh Vutla wrote:
> On some Soc's RTC is powered by an external power regulator.
> e.g. RTC on DRA7 SoC. Make the OMAP RTC driver support a
> power regulator.
>
> Signed-off-by: Lokesh Vutla
> ---
> Changes since v1:
> - Separated probe deferral s
On Thu, Sep 25, 2014 at 03:02:07PM +0530, Lokesh Vutla wrote:
Perhaps the subject should simply be "use module_platform_driver", then
you can explain your motive for the change in the body as you already do.
> module_platform_driver_probe() prevents driver from requesting probe deferral.
> So usi
On Thu, Sep 25, 2014 at 03:02:06PM +0530, Lokesh Vutla wrote:
> Currently all the device data is declared globally which will be a
> problem if more than one instance of device is present. So consolidate
> all the data into rtc_omap_dev struct and adopt the driver to use this.
>
> Suggested-by: Fe
On Wed, Oct 08, 2014 at 07:36:04AM +0200, Christophe RICARD wrote:
> I believe this is completely 2 different things. The delay before the
> release locality is to make sure that the isr will be service before
> release_locality to guarantee
> that any pending interrupt are cleared while the local
On Wed, Oct 08, 2014 at 09:49:27AM +0100, Robert Richter wrote:
> On 07.10.14 16:01:49, Liviu Dudau wrote:
> > On Tue, Oct 07, 2014 at 03:27:44PM +0100, Robert Richter wrote:
> > > On 24.09.14 18:06:04, Arnd Bergmann wrote:
> > > > > + compatible = "cavium,thunder-pcie";
> > > > > +
Thanks for comments - inline.
On 14-10-08 06:10 AM, Rob Herring wrote:
On Wed, Oct 8, 2014 at 12:27 AM, Scott Branden wrote:
From: Jonathan Richardson
Adds initial support for the Cygnus SoC based on Broadcom’s iProc series.
Reviewed-by: Ray Jui
Reviewed-by: Desmond Liu
Reviewed-by: JD (J
On 10/08/2014 05:12 PM, Mark Brown wrote:
> On Wed, Oct 08, 2014 at 04:38:53PM +0200, Javier Martinez Canillas wrote:
>> On 10/08/2014 04:25 PM, Mark Brown wrote:
>
>> > That doesn't mean that the definition of those modes is something we can
>> > sensibly provide in generic code, especially in a
On Wed, Oct 08, 2014 at 07:47:58AM +0200, Christophe RICARD wrote:
> >>+ if (interrupts) {
> >>+ r = devm_gpio_request_one(&client->dev, pdata->io_serirq,
> >>+ GPIOF_IN, "TPM IO_SERIRQ");
> >Similarly, I wonder if pdata->io_serirq is just duplication o
On Wed, Oct 08, 2014 at 09:38:39AM +0200, Christophe Ricard wrote:
>I would just add an additional comment to my previous message.
>After reviewing Documentation/stable_kernel_rules.txt, it looks like it
>is *not* necessary to send this patch marked as stable because of the
>followi
On 14-10-08 06:28 AM, Arnd Bergmann wrote:
On Wednesday 08 October 2014 05:27:24 Scott Branden wrote:
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index fc93800..2dd3f78 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -5,6 +5,37 @@ menuconfig ARCH_
On Wed, Oct 08, 2014 at 07:38:30AM +0200, Christophe RICARD wrote:
> Hi Jason,
>
> The freezer header is here for the freezing(current) function call
> in get_burstcount().
But freezing(current) does not occur in patch 10/16.
Is this include in the right patch in the series?
Jason
--
To unsubs
On 10/08/2014 04:56 PM, Mark Brown wrote:
> On Wed, Oct 08, 2014 at 03:44:07PM +0200, Javier Martinez Canillas wrote:
>
>> The regulator core now has support to choose a default initial
>> operating mode for regulators from DT. Set the initial opmode
>> for the max77802 PMIC regulators with the sa
On Mon, 6 Oct 2014, Guenter Roeck wrote:
> On Thu, Oct 02, 2014 at 01:37:48PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add device tree bindings documentation for ltc2978.
> >
> > Signed-off-by: Alan Tull
> > ---
> > v2: clean whitespace
> > ---
> > .../devicetree/
On 2 Oct 2014, stefan at agner.ch wrote:
> Am 2014-10-02 17:28, schrieb Arnd Bergmann:
>> On Thursday 02 October 2014 16:55:23 Stefan Agner wrote:
>>> The VF500 is essentially the same SoC, but with only one core and
>>> without L1 cache. The VF610 is therefore a superset of the VF500.
>>> Move a
On Tue, Oct 07, 2014 at 04:07:43PM -0700, Stephen Boyd wrote:
> On 10/07/2014 03:10 PM, Josh Cartwright wrote:
> >On Thu, Oct 02, 2014 at 12:08:38PM -0700, Stephen Boyd wrote:
[..]
> >>I'm thinking:
> >>
> >> timer@200a000 {
> >> compatible = "qcom,kpss-timer
On Wed, Oct 8, 2014 at 8:11 AM, Peter De Schrijver
wrote:
> On Mon, Sep 22, 2014 at 12:11:54PM +0200, Thierry Reding wrote:
>> * PGP Signed by an unknown key
>>
>> On Mon, Sep 22, 2014 at 11:00:56AM +0200, Lucas Stach wrote:
>> > Am Freitag, den 19.09.2014, 15:53 -0400 schrieb Sean Paul:
>> > > Pe
On 10/08/2014 04:36 PM, Mark Brown wrote:
> On Wed, Oct 08, 2014 at 03:44:06PM +0200, Javier Martinez Canillas wrote:
>> Add a function handler for the struct regulator_ops .set_mode so an
>> operating mode (opmode) can be set for regulators.
>>
>> Regulators opmode are defined using the generic R
On 10/08/2014 04:34 PM, Mark Brown wrote:
> On Wed, Oct 08, 2014 at 03:44:05PM +0200, Javier Martinez Canillas wrote:
>
>> +- regulator-initial-mode: initial regulator operating mode. One of
>> following:
>> +<1>: REGULATOR_MODE_FAST- Regulator can handle fast changes.
>> +<2>: REGULA
On Wednesday 08 October 2014 21:52:26 Y Vo wrote:
> +
> +#define GICD_SPI_BASE0x7801
You can't hardcode register locations. Please use the proper interfaces
to do whatever you want.
It's probably not ok to map any GIC registers into the GPIO driver,
it should operate a
On Wed, Oct 08, 2014 at 04:38:53PM +0200, Javier Martinez Canillas wrote:
> On 10/08/2014 04:25 PM, Mark Brown wrote:
> > That doesn't mean that the definition of those modes is something we can
> > sensibly provide in generic code, especially in a completely
> > undocumented fashion (perhaps you'
On Mon, Sep 22, 2014 at 12:11:54PM +0200, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Mon, Sep 22, 2014 at 11:00:56AM +0200, Lucas Stach wrote:
> > Am Freitag, den 19.09.2014, 15:53 -0400 schrieb Sean Paul:
> > > Per NVidia, this clock rate should be around 70MHz in
> > > order t
Documentation for APM X-Gene standby GPIO controller DTS binding.
Signed-off-by: Y Vo
---
.../devicetree/bindings/gpio/gpio-xgene-sb.txt | 31
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
diff --git a/Do
This patch add the GPIO standby controller in the APM X-Gene platform.
Y Vo (3):
gpio: Add APM X-Gene standby GPIO controller driver
Documentation: gpio: Add APM X-Gene standby GPIO controller DTS
binding
arm64:dts: Add APM X-Gene standby GPIO controller DTS entries
.../devicetree/bind
On Wed, Oct 08, 2014 at 03:44:07PM +0200, Javier Martinez Canillas wrote:
> The regulator core now has support to choose a default initial
> operating mode for regulators from DT. Set the initial opmode
> for the max77802 PMIC regulators with the same modes that are
> used in the downstream Chrome
Add APM X-Gene standby GPIO controller driver.
Signed-off-by: Y Vo
---
drivers/gpio/Kconfig |7 ++
drivers/gpio/Makefile|1 +
drivers/gpio/gpio-xgene-sb.c | 232 ++
3 files changed, 240 insertions(+)
create mode 100755 drivers/gpi
Add standby domain gpio controller for APM X-Gene SoC platform.
Signed-off-by: Y Vo
---
arch/arm64/boot/dts/apm-storm.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi
b/arch/arm64/boot/dts/apm-storm.dtsi
index c0aceef..1d1da4c 100644
-
On Wednesday 08 October 2014 11:19:43 Lorenzo Pieralisi wrote:
>
> Ok. So, unless I am missing something, on platform with mem_offset != 0
> /proc and /sys interfaces for remapping PCI resources can't work (IIUC
> the proc interface expects the user to pass in the resource address as
> seen from /
Hello Mark,
Thanks for the feedback.
On 10/08/2014 04:25 PM, Mark Brown wrote:
> On Wed, Oct 08, 2014 at 03:44:03PM +0200, Javier Martinez Canillas wrote:
>
>> But currently there isn't a way to do the same with DeviceTrees. Argubly
>> the operating modes are Linux-specific so that information s
On Wed, Oct 08, 2014 at 03:44:06PM +0200, Javier Martinez Canillas wrote:
> Add a function handler for the struct regulator_ops .set_mode so an
> operating mode (opmode) can be set for regulators.
>
> Regulators opmode are defined using the generic REGULATOR_MODE_*
> modes so the driver maps these
On Wed, Oct 08, 2014 at 03:44:05PM +0200, Javier Martinez Canillas wrote:
> +- regulator-initial-mode: initial regulator operating mode. One of following:
> + <1>: REGULATOR_MODE_FAST- Regulator can handle fast changes.
> + <2>: REGULATOR_MODE_NORMAL - Normal regulator power supply mo
On Wed, Oct 08, 2014 at 03:44:03PM +0200, Javier Martinez Canillas wrote:
> But currently there isn't a way to do the same with DeviceTrees. Argubly
> the operating modes are Linux-specific so that information should not be
> in the DT which should be used to only describe hardware. But regulators
The regulator core allows boards to define an initial operating mode to
be used as a default for regulators. With board files and platform data,
it is possible to fill a struct regulation_constraints .initial_mode to
set an initial mode for each regulator.
But currently there isn't a way to do the
Device Tree source files can set a regulator operating mode to be
used as an initial default. Instead of using magic numbers, a header
file can be included that provides macro definitions for the opmodes.
Signed-off-by: Javier Martinez Canillas
---
include/dt-bindings/regulator/regulator.h | 16
The regulator core now has support to choose a default initial
operating mode for regulators from DT. Set the initial opmode
for the max77802 PMIC regulators with the same modes that are
used in the downstream ChromeOS kernel, in order to allow the
system to lower power at suspend time.
Signed-off
Add a function handler for the struct regulator_ops .set_mode so an
operating mode (opmode) can be set for regulators.
Regulators opmode are defined using the generic REGULATOR_MODE_*
modes so the driver maps these generic modes to the device-specific
operating modes as stated in the hardware data
Regulators can run on different operating modes (opmodes). This allows
systems to choose the most efficient opmode for each regulator. The
regulator core defines a set of generic modes so each system can define
the opmode in these generic terms and drivers are responsible to map the
generic modes t
Hello Mark,
This series add support to setup an initial operating mode for regulators.
There were previous attempts to solve the same issue by adding DT bindings
that were driver-specific like Abhilash Kesavan's "Add MAX77686 Operating
mode support" [0] or Krzysztof Kozlowski's "regulator: s2mps1
On Tuesday, October 07, 2014 02:18:45 AM Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> Make use of device property API in this driver so that both OF and ACPI
> based system can use the same driver.
>
> This change contains material from Max Eliaser and Mika Westerberg.
>
> Signed-off-
On Wed, Oct 8, 2014 at 9:32 PM, Dinh Nguyen wrote:
>
>
> On 10/8/14, 8:02 AM, Chen-Yu Tsai wrote:
>> The A80 Optimus Board is was launched with the Allwinner A80 SoC.
>> It was jointly developed by Allwinner and Merrii.
>>
>> This board has a UART port, a JTAG connector, USB host ports, a USB
>> 3
On Wednesday, October 08, 2014 11:55:08 AM Alexandre Courbot wrote:
> On Wed, Oct 8, 2014 at 9:09 AM, Rafael J. Wysocki wrote:
> > On Tuesday, October 07, 2014 07:52:02 PM Alexandre Courbot wrote:
> >> On Tue, Oct 7, 2014 at 7:40 PM, Mika Westerberg
> >> wrote:
> >> > On Tue, Oct 07, 2014 at 07:2
Adding Grant as it is in his tree now...
On Sat, Sep 27, 2014 at 7:24 PM, Peter Chen wrote:
> On Fri, Sep 26, 2014 at 11:32:49AM -0500, Rob Herring wrote:
>> On Mon, Sep 15, 2014 at 7:35 PM, Peter Chen wrote:
>> > Adds chipidea to the list of DT vendor prefixes.
>> >
>> > Signed-off-by: Peter Ch
On Wednesday 08 October 2014 03:58:15 Scott Branden wrote:
> On 14-10-08 12:57 AM, Arnd Bergmann wrote:
> > On Tuesday 07 October 2014 22:27:02 Scott Branden wrote:
> >> diff --git a/Documentation/devicetree/bindings/arm/cygnus.txt
> >> b/Documentation/devicetree/bindings/arm/cygnus.txt
> >> new f
On 10/8/14, 8:02 AM, Chen-Yu Tsai wrote:
> The A80 Optimus Board is was launched with the Allwinner A80 SoC.
> It was jointly developed by Allwinner and Merrii.
>
> This board has a UART port, a JTAG connector, USB host ports, a USB
> 3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND f
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