From: Mikko Perttunen mperttu...@nvidia.com
Implements functionality needed to change the rate of the memory bus clock.
Signed-off-by: Mikko Perttunen mperttu...@nvidia.com
Signed-off-by: Tomeu Vizoso tomeu.viz...@collabora.com
---
v4: * Move CONFIG to drivers/memory/tegra/Kconfig
The EMC clock needs some extra information for changing its rate.
Signed-off-by: Tomeu Vizoso tomeu.viz...@collabora.com
---
v4: * Remove comma from unit-address of CAR node in the example
* Simplify reg property value in the example
---
.../bindings/clock/nvidia,tegra124-car.txt
From: Mikko Perttunen mperttu...@nvidia.com
This adds a node for the EMC memory controller. It is always enabled, but only
provides read-only functionality without board-specific timing tables.
Signed-off-by: Mikko Perttunen mperttu...@nvidia.com
Signed-off-by: Tomeu Vizoso
From: Mikko Perttunen mperttu...@nvidia.com
This adds a new file, tegra124-jetson-tk1-emc.dtsi that contains
valid timings for the EMC memory clock. The file is included to the
main Jetson TK1 device tree.
Signed-off-by: Mikko Perttunen mperttu...@nvidia.com
Signed-off-by: Tomeu Vizoso
From: Mikko Perttunen mperttu...@nvidia.com
Add binding documentation for the nvidia,tegra124-emc device tree node.
Signed-off-by: Mikko Perttunen mperttu...@nvidia.com
Signed-off-by: Tomeu Vizoso tomeu.viz...@collabora.com
---
v4: * Remove mandatory naming of the timings subnode
*
The MC driver needs some timing-specific information to program the EMEM during
a rate change of the EMC clock.
Signed-off-by: Tomeu Vizoso tomeu.viz...@collabora.com
---
v4: * Add more information about nvidia,emem-configuration
* Remove mandatory naming of the timings subnode
Hello,
in this v4 you can find these changes:
* Adapt to changes in the latest version of Thierry's IOMMU series
* OF bindings don't specify any unit-address or naming for the timings and
timing subnodes. This is
in line with how the display timings are specified.
* Misc improvements on error
Hi,
[...]
index ..cbd2d4e720bb
--- /dev/null
+++ b/include/dt-bindings/phy/armada-375-usb-cluster.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2014 Marvell
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
On Wed, Nov 12, 2014 at 9:38 AM, Jingoo Han jg1@samsung.com wrote:
On Thursday, October 30, 2014 10:24 PM, Vivek Gautam wrote:
Now that we have moved to generic phy based bindings,
we don't need to have any code related to older dptx-phy.
Nobody is using this dptx-phy anymore, so removing
On Thu, Oct 30, 2014 at 10:48:33AM +0100, Geert Uytterhoeven wrote:
On Thu, Oct 30, 2014 at 6:56 AM, Simon Horman
horms+rene...@verge.net.au wrote:
From: Koji Matsuoka koji.matsuoka...@renesas.com
gpio_keys appears to be consistent with more dts files than gpio-keys
The closest match on
Hi Grant,
On Tue, Nov 11, 2014 at 10:49 PM, Grant Likely grant.lik...@linaro.org wrote:
However, I am concerned about handover. I've lost track over the entire
thread on whether the handover mechanism has been resolved, and I would
really like to have a proposed solution to this documented in
From: Tushar Behera tushar.beh...@linaro.org
In a multi-platform scenario, the hard-coded major/minor numbers in
serial drivers may conflict with each other. A typical scenario is
observed with amba-pl011 and samsung-uart drivers, both of these
drivers use same set of major/minor numbers. If both
With a few tweaks, the PXA serial driver can handle other 16550A clones.
Add a fifo-size DT property to override the FIFO depth (BCM7xxx uses 32),
and {native,big}-endian properties similar to regmap to support SoCs that
have BE or automagic endian registers.
Signed-off-by: Kevin Cernekee
Add a big_endian flag alongside membase, regshift, and iotype. Most
drivers currently use readl/writel, but if it is necessary to support
a BE SoC, the driver can check this field to see which MMIO accessor
functions to use.
Signed-off-by: Kevin Cernekee cerne...@gmail.com
---
Implement a bare bones earlycon; this assumes that the bootloader sets
up the tty parameters. Matches all three compatible strings.
Signed-off-by: Kevin Cernekee cerne...@gmail.com
---
drivers/tty/serial/pxa.c | 45 +
1 file changed, 45 insertions(+)
SoC peripherals can come in several different flavors:
- little-endian: registers always need to be accessed in LE mode (so the
kernel should perform a swap if the CPU is running BE)
- big-endian: registers always need to be accessed in BE mode (so the
kernel should perform a swap if the
Use the pxa serial driver to support BCM7xxx's UARTs; add code to allow
native-endian operation on both LE and BE systems. Enable OF_EARLYCON
in the pxa driver.
After applying these changes I am able to build a multiplatform kernel
that boots to the prompt on BCM6328 (bcm63xx_uart) and BCM7346
Add a couple of missing required properties; add the new optional
properties and an example.
Signed-off-by: Kevin Cernekee cerne...@gmail.com
---
.../devicetree/bindings/serial/mrvl-serial.txt | 34 +-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git
Remove the platform dependency in Kconfig and add an appropriate
compatible string. Note that BCM7401 has one 16550A-compatible UART
in the UPG uart_clk domain, and two proprietary UARTs in the 27 MHz
clock domain. This driver handles the former one.
Signed-off-by: Kevin Cernekee
If an earlycon (stdout-path) node is being used, check for big-endian
and native-endian properties and pass that information to the driver.
Signed-off-by: Kevin Cernekee cerne...@gmail.com
---
drivers/of/fdt.c | 9 -
drivers/tty/serial/earlycon.c | 3 ++-
On 11/12/2014, 09:46 AM, Kevin Cernekee wrote:
SoC peripherals can come in several different flavors:
- little-endian: registers always need to be accessed in LE mode (so the
kernel should perform a swap if the CPU is running BE)
- big-endian: registers always need to be accessed in
On Tue, 2014-11-11 at 23:39 +0100, Hartmut Knaack wrote:
Ivan T. Ivanov schrieb am 11.11.2014 09:21:
Hi Hartmut,
On Mon, 2014-11-10 at 22:11 +0100, Hartmut Knaack wrote:
Ivan T. Ivanov schrieb am 03.11.2014 16:24:
From: Stanimir Varbanov svarba...@mm-sol.com
The voltage
On Wed, Nov 12, 2014 at 9:53 AM, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
i2c_shmobile support.) in v2.6.37.
Without this fix i2c may not operate correctly on the sh73a0/kzm9g.
Thanks, that's correct.
git tag --contains b028f94b76319e1b8 says v2.6.38.
Not that you're gonna
Hi Simon,
On Wed, Nov 12, 2014 at 2:44 AM, Simon Horman ho...@verge.net.au wrote:
On Fri, Nov 07, 2014 at 06:24:21AM +0100, Wolfram Sang wrote:
On Thu, Nov 06, 2014 at 12:52:06PM +0100, Geert Uytterhoeven wrote:
On sh73a0/kzm9g-legacy, probing of the i2c masters fails with:
On Wed, Nov 12, 2014 at 01:26:58AM +, bpqw wrote:
Signed-off-by: bean huo bean...@micron.com
Signed-off-by: bpqw b...@micron.com
---
V2:
- Add signed-off-by
- Modify commit logs that wrapped to less than 80 columns
Dear maintainers:
Please give some tips,if this patch is
On Wednesday 12 November 2014 00:46:29 Kevin Cernekee wrote:
diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c
index 21b7d8b..78ed7ee 100644
--- a/drivers/tty/serial/pxa.c
+++ b/drivers/tty/serial/pxa.c
@@ -60,13 +60,19 @@ struct uart_pxa_port {
static inline unsigned int
On 11/12/2014, 09:46 AM, Kevin Cernekee wrote:
With a few tweaks, the PXA serial driver can handle other 16550A clones.
Add a fifo-size DT property to override the FIFO depth (BCM7xxx uses 32),
and {native,big}-endian properties similar to regmap to support SoCs that
have BE or automagic
On Wed, Nov 12, 2014 at 12:50 AM, Jiri Slaby jsl...@suse.cz wrote:
/**
+ * of_device_is_big_endian - check if a device has BE registers
+ *
+ * @device: Node to check for availability
Oops, just noticed a copy/paste error here.
+ *
+ * Returns 1 if the device has a big-endian property,
On Wednesday 12 November 2014 00:46:30 Kevin Cernekee wrote:
Remove the platform dependency in Kconfig and add an appropriate
compatible string. Note that BCM7401 has one 16550A-compatible UART
in the UPG uart_clk domain, and two proprietary UARTs in the 27 MHz
clock domain. This driver
On Wed, Nov 12, 2014 at 09:53:27AM +0100, Geert Uytterhoeven wrote:
Hi Simon,
On Wed, Nov 12, 2014 at 2:44 AM, Simon Horman ho...@verge.net.au wrote:
On Fri, Nov 07, 2014 at 06:24:21AM +0100, Wolfram Sang wrote:
On Thu, Nov 06, 2014 at 12:52:06PM +0100, Geert Uytterhoeven wrote:
On
On Wed, Nov 12, 2014 at 09:55:58AM +0100, Geert Uytterhoeven wrote:
On Wed, Nov 12, 2014 at 9:53 AM, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
i2c_shmobile support.) in v2.6.37.
Without this fix i2c may not operate correctly on the sh73a0/kzm9g.
Thanks, that's correct.
git
On Wednesday 12 November 2014 10:03:58 Jiri Slaby wrote:
On 11/12/2014, 09:46 AM, Kevin Cernekee wrote:
With a few tweaks, the PXA serial driver can handle other 16550A clones.
Add a fifo-size DT property to override the FIFO depth (BCM7xxx uses 32),
and {native,big}-endian properties
On Tue, 2014-11-11 at 12:27 -0800, Courtney Cavin wrote:
On Fri, Nov 07, 2014 at 04:40:52PM +0100, Ivan T. Ivanov wrote:
Forgot to add. PMIC subtype and version are used also in charger and BMS
drivers to workaround hardware issues.
All of the blocks on the PM8x41 series have their own
Hello again,
[extending audience a bit]
On Tue, Nov 11, 2014 at 07:42:26PM +0100, Uwe Kleine-König wrote:
On Tue, Nov 11, 2014 at 07:10:33PM +0100, Juergen Borleis wrote:
Hi,
the S3C2410 NAND driver [1] can still be used for NANDs attached to an
S3C6410
SoC. But this driver has a
On Wed, Nov 12, 2014 at 08:01:27AM +0100, Sascha Hauer wrote:
On Tue, Nov 11, 2014 at 07:18:25PM +0100, Johan Hovold wrote:
On Tue, Nov 11, 2014 at 05:57:42PM +, Mark Rutland wrote:
On Tue, Nov 11, 2014 at 05:37:37PM +, Johan Hovold wrote:
Add micrel,rmii_ref_clk_sel_25_mhz to
On Wed, Nov 12, 2014 at 1:04 AM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 12 November 2014 00:46:30 Kevin Cernekee wrote:
Remove the platform dependency in Kconfig and add an appropriate
compatible string. Note that BCM7401 has one 16550A-compatible UART
in the UPG uart_clk domain, and
On 11/12/2014, 10:04 AM, Kevin Cernekee wrote:
This should actually return bool and use true/false.
Well, the other APIs currently return an int:
extern int of_device_is_compatible(const struct device_node *device,
const char *);
extern int
Now that we have moved to generic phy based bindings,
we don't need to have any code related to older dptx-phy.
Nobody is using this dptx-phy anymore, so removing the
same.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Inki Dae inki@samsung.com
Cc: Jingoo Han jg1@samsung.com
This driver register pm_power_off with snvs power off function. If
your boards NOT use PMIC_ON_REQ to turn on/off external pmic, or use
other pin to do, please disable the driver in dts, otherwise, your
pm_power_off maybe overwrote by this driver.
Signed-off-by: Robin Gong b38...@freescale.com
All chips of i.mx6 can be powered off by programming SNVS.
For example :
On i.mx6q-sabresd board, PMIC_ON_REQ connect with external
pmic ON/OFF pin, that will cause the whole PMIC powered off
except VSNVS. And system can restart once PMIC_ON_REQ goes
high by push POWRER key.
Signed-off-by: Robin
On Fri, Nov 07, 2014 at 12:15:45PM +0800, Chen-Yu Tsai wrote:
Hi Vinod,
This is my sun8i DMA controller series rebased onto slave-dma/next
(242 dmaengine: xdmac: fix print warning on dma_addr_t variable)
Original cover letter:
This is v2 of my sun8i DMA controller support series.
On Wednesday, November 12, 2014 6:28 PM, Vivek Gautam wrote:
Now that we have moved to generic phy based bindings,
we don't need to have any code related to older dptx-phy.
Nobody is using this dptx-phy anymore, so removing the
same.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Resend the patchset with the latest MAINTAINERS
Add simple power off driver for i.mx6, including:
- add basic imx-snvs-poweroff driver in drivers/power/reset
- add device node in all dts files of i.mx6.
- enable in config file
Change from v3:
- disable poweroff driver in soc level dts and enable
Hi Jason,
On Tue, 11 Nov 2014 17:58:00 -0500
Jason Cooper ja...@lakedaemon.net wrote:
On Tue, Nov 11, 2014 at 02:33:36PM +0100, Boris Brezillon wrote:
First of all IRQCHIP_SKIP_SET_WAKE is not a valid irq_gc_flags and thus
should not be passed as the last argument of
Add power off driver in config file.
Signed-off-by: Robin Gong b38...@freescale.com
---
arch/arm/configs/imx_v6_v7_defconfig |3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/imx_v6_v7_defconfig
b/arch/arm/configs/imx_v6_v7_defconfig
index 16cfec4..a310e61 100644
---
On Wednesday, November 12, 2014, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
Hi Grant,
On Tue, Nov 11, 2014 at 10:49 PM, Grant Likely grant.lik...@linaro.org
wrote:
However, I am concerned about handover. I've lost track over the entire
thread on whether the handover mechanism has
Now that the USB cluster node has been added, use it as a PHY provider
for the USB controller linked to it: the first EHCI and the xHCI.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Acked-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6
The Armada 375 SoC comes with an USB2 host and device controller and
an USB3 controller. The USB cluster control register allows to manage
common features of both USB controllers.
This commit adds a driver integrated in the generic PHY framework to
control this USB cluster feature.
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers. This commit adds the Device Tree
binding documentation for this piece of hardware.
Signed-off-by: Gregory CLEMENT
From: Andrew Lunn and...@lunn.ch
Describe the binding for the Marvell MVEBU SATA phy. This driver
can be used at least with Kirkwood, Dove and maybe others.
Additionally, update the SATA binding with the properties to link
to the phy nodes.
Signed-off-by: Andrew Lunn and...@lunn.ch
---
this is the third version of a series adding support for the USB
cluster which is on the Armada 375 SoC. We can mainly see this device
as a PHY muxer.
Since the last version I reused the file include/dt-bindings/phy/phy.h
as suggested by Kishon and I added his acked-by on the 5th patch.
While I
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: coccinelle/api/ptr_ret.cocci
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
drivers/phy/phy-berlin-sata.c | 5 +
drivers/phy/phy-hix5hd2-sata.c | 5 +
drivers/phy/phy-miphy365x.c| 5 +
Hi Grant,
On Wed, Nov 12, 2014 at 10:57 AM, Grant Likely grant.lik...@linaro.org wrote:
On Wednesday, November 12, 2014, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
On Tue, Nov 11, 2014 at 10:49 PM, Grant Likely grant.lik...@linaro.org
wrote:
However, I am concerned about handover. I've
On Mon, Nov 10, 2014 at 04:41:46PM +, Lorenzo Pieralisi wrote:
The current logic used for PCI domain assignment in arm64
pci_bus_assign_domain_nr() is flawed in that, depending on the host
controllers configuration for a platform and the respective initialization
sequence, core code may
On Wed, Nov 12, 2014 at 10:09:44AM +, Lorenzo Pieralisi wrote:
On Mon, Nov 10, 2014 at 04:41:46PM +, Lorenzo Pieralisi wrote:
The current logic used for PCI domain assignment in arm64
pci_bus_assign_domain_nr() is flawed in that, depending on the host
controllers configuration for a
On Wed, Nov 12, 2014 at 10:08 AM, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
Hi Grant,
On Wed, Nov 12, 2014 at 10:57 AM, Grant Likely grant.lik...@linaro.org
wrote:
On Wednesday, November 12, 2014, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
On Tue, Nov 11, 2014 at 10:49 PM, Grant
On Mon, Sep 29, 2014 at 10:03:07AM +0530, Archit Taneja wrote:
The BAM DMA IP comes in different versions. The register offset layout varies
among these versions. The layouts depend on which generation/family of SoCs
they
belong to.
The current SoCs(like 8084, 8074) have a layout where the
On Monday 10 November 2014 16:41:46 Lorenzo Pieralisi wrote:
The current logic used for PCI domain assignment in arm64
pci_bus_assign_domain_nr() is flawed in that, depending on the host
controllers configuration for a platform and the respective initialization
sequence, core code may end up
On 10/11/14 18:47, Ard Biesheuvel wrote:
Create a new /sys entry '/sys/firmware/fdt' to export the FDT blob
that was passed to the kernel by the bootloader. This allows userland
applications such as kexec to access the raw binary. The blob needs to
be preserved as early as possible by calling
On Tue, Nov 11, 2014 at 05:03:25PM +0100, Arnd Bergmann wrote:
The newly introduced LS1021A SoC selects CONFIG_SOC_FSL, which
is originally symbol used for the PowerPC based platforms
and guards lots of code that does not build on ARM.
This breaks allmodconfig, so let's remove it for now,
Hi Magnus,
On Tue, Nov 11, 2014 at 11:16 AM, Magnus Damm magnus.d...@gmail.com wrote:
On Mon, Nov 10, 2014 at 6:16 PM, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
On Fri, Nov 7, 2014 at 4:51 PM, Ulrich Hecht
ulrich.hecht+rene...@gmail.com wrote:
On Wed, Nov 12, 2014 at 04:20:36PM +0800, Robin Gong wrote:
Resend the patchset with the latest MAINTAINERS
Add simple power off driver for i.mx6, including:
- add basic imx-snvs-poweroff driver in drivers/power/reset
- add device node in all dts files of i.mx6.
- enable in config file
On Wednesday 12 November 2014 18:42:41 Shawn Guo wrote:
I noticed the issue from 0-DAY testing and was trying to drop the patch.
Jingchang said someone is trying to fixing the issues from driver code.
But it seems to take some time. So I agree with this partial reverting.
Patch applied.
On Fri, Oct 24, 2014 at 12:37:41PM -0700, Nicolin Chen wrote:
This patch simply adds a new DMATYPE for SAI which's included
in i.MX6 Solo X.
Applied, thanks.
Please snure you use the right subsystem name.
--
~Vinod
--
To unsubscribe from this list: send the line unsubscribe devicetree in
On Wednesday 12 November 2014 18:56:22 Shawn Guo wrote:
On Wed, Nov 12, 2014 at 04:20:36PM +0800, Robin Gong wrote:
Resend the patchset with the latest MAINTAINERS
Add simple power off driver for i.mx6, including:
- add basic imx-snvs-poweroff driver in drivers/power/reset
- add device
2014-11-11 4:55 GMT+01:00 Howard Chen ibanezc...@gmail.com:
The mt6592-evb is an evaluation board based on the MT6592 SoC.
Signed-off-by: Howard Chen ibanezc...@gmail.com
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot/dts/mt6592-evb.dts | 29 +
2
2014-11-11 4:55 GMT+01:00 Howard Chen ibanezc...@gmail.com:
This adds a DT binding documentation for the MT6592 SoC from Mediatek.
Signed-off-by: Howard Chen ibanezc...@gmail.com
---
Documentation/devicetree/bindings/arm/mediatek.txt| 7 +--
On Tue, Nov 11, 2014 at 8:34 PM, Ard Biesheuvel
ard.biesheu...@linaro.org wrote:
On 11 November 2014 21:08, Grant Likely grant.lik...@linaro.org wrote:
On Tue, Nov 11, 2014 at 4:25 PM, Rob Herring robherri...@gmail.com wrote:
On Tue, Nov 11, 2014 at 8:42 AM, Grant Likely grant.lik...@linaro.org
On Tue, Nov 11, 2014 at 7:01 PM, Romain Perier romain.per...@gmail.com wrote:
2014-11-11 16:01 GMT+01:00 Grant Likely grant.lik...@linaro.org:
So, to be a little pendantic, the 'ti,' prefix is basically just for
backwards compatibility with the old binding, and that old binding is
only used on
On 12 November 2014 12:45, Grant Likely grant.lik...@linaro.org wrote:
On Tue, Nov 11, 2014 at 8:34 PM, Ard Biesheuvel
ard.biesheu...@linaro.org wrote:
On 11 November 2014 21:08, Grant Likely grant.lik...@linaro.org wrote:
On Tue, Nov 11, 2014 at 4:25 PM, Rob Herring robherri...@gmail.com
On Wednesday 12 November 2014 10:14:58 Uwe Kleine-König wrote:
Hello again,
[extending audience a bit]
On Tue, Nov 11, 2014 at 07:42:26PM +0100, Uwe Kleine-König wrote:
On Tue, Nov 11, 2014 at 07:10:33PM +0100, Juergen Borleis wrote:
Hi,
the S3C2410 NAND driver [1] can still be
We found freescale imx6 and rockchip rk3288 and Ingenic JZ4780 (Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they also have some
lightly differences, such as phy pll configuration, register width(imx hdmi
register is one byte, but rk3288 is 4 bytes width and can only access
CHECK: Alignment should match open parenthesis
+ if ((hdmi-vic == 10) || (hdmi-vic == 11) ||
+ (hdmi-vic == 12) || (hdmi-vic == 13) ||
CHECK: braces {} should be used on all arms of this statement
+ if (hdmi-hdmi_data.video_mode.mdvi)
[...]
+ else {
[...]
drm driver may probe before the i2c bus, so the driver should
defer probing until it is available
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- defer probe ddc i2c adapter
Changes in v3: None
On Wed, Nov 12, 2014 at 11:51 AM, Ard Biesheuvel
ard.biesheu...@linaro.org wrote:
On 12 November 2014 12:45, Grant Likely grant.lik...@linaro.org wrote:
On Tue, Nov 11, 2014 at 8:34 PM, Ard Biesheuvel
ard.biesheu...@linaro.org wrote:
On 11 November 2014 21:08, Grant Likely
imx6 and rockchip rk3288 and JZ4780 (Ingenic Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they
also have some lightly differences, such as phy pll configuration,
register width, 4K support, clk useage, and the crtc mux configuration
is also platform specific.
To reuse the imx
the original imx hdmi driver is under staging/imx-drm,
which depends on imx-drm, so move the imx hdmi driver out
to drm/bridge and rename imx-hdmi to dw_hdmi
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
From: Yakir Yang y...@rock-chips.com
keep the connector birdge in dw_hdmi.c, handle encoder
in dw_hdmi-imx.c, as most of the encoder operation are
platform specific such as crtc select and panel format
set
Signed-off-by: Andy Yan andy@rock-chips.com
Signed-off-by: Yakir Yang
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v8:
- correct some spelling mistake
- modify ddc-i2c-bus and interrupt description
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
On rockchip rk3288, only word(32-bit) accesses are
permitted for hdmi registers. Byte width accesses (writeb,
readb) generate an imprecise external abort.
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v8: None
Changes in v7: None
Changes in v6:
- move some modification to
Signed-off-by: Andy Yan andy@rock-chips.com
---
Changes in v8:
- Add documentation for rockchip dw hdmi
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../devicetree/bindings/video/dw_hdmi-rockchip.txt | 43
rk3288 hdmi is compatible with Designware hdmi
this patch is depend on patch by Mark Yao Add drm
driver for Rockchip Socs
see https://lkml.org/lkml/2014/10/8/201
Signed-off-by: Andy Yan andy@rock-chips.com
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v8:
- add support for
This patchset adds driver for Richtek rt5033 chip The chip contains
switching charge mode Li-Ion/Li-Polymer battery charger, fuelgauge, regulators.
This patchset provides common support for accessing the device.
This patchset have been tested base on exynos board.
Changes in v3
- Correct
This patch add device driver of Richtek RT5033 PMIC. The driver support
switching charger. rt5033 charger provide three charging mode.
Three charging mode are pre charge mode, fast cahrge mode and constant voltage
mode. They are have vary charge rate, charge parameters. The charge parameters
can
This patch adds a new driver for Richtek RT5033 driver.
RT5033 is a Multifunction device which includes battery charger, fuel gauge,
flash LED current source, LDO and synchronous Buck converter. It is interfaced
to host controller using I2C interface.
Cc: Samuel Ortiz sa...@linux.intel.com
Cc:
This patch add device driver of Richtek RT5033 PMIC.
The driver support multiple regulator like LDO and synchronous Buck.
The integrated synchronous buck converter is designed to provide 0.6 A
application with high efficiency. Two LDOs are integrated. One safe LDO is
for 60mA and the other one LDO
This patch adds device driver of Richtek PMIC.
The driver support battery fuel gange. Fuel gauge calculates and determines the
battery state of charge(SOC) according to battery open circuit voltage(OCV).
Also, this driver provides battery average voltage, voltage and bettery present
property.
Cc:
On 12 November 2014 13:01, Grant Likely grant.lik...@linaro.org wrote:
On Wed, Nov 12, 2014 at 11:51 AM, Ard Biesheuvel
ard.biesheu...@linaro.org wrote:
On 12 November 2014 12:45, Grant Likely grant.lik...@linaro.org wrote:
On Tue, Nov 11, 2014 at 8:34 PM, Ard Biesheuvel
This patch device tree binding documentation for rt5033 multifunction device.
Cc: Rob Herring robh...@kernel.org
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Ian campbell ijc+devicet...@hellion.org.uk
Cc: Kumar Gala ga...@codeaurora.org
Signed-off-by: Beomho Seo
On Wed, Nov 12, 2014 at 12:08 PM, Ard Biesheuvel
ard.biesheu...@linaro.org wrote:
On 12 November 2014 13:01, Grant Likely grant.lik...@linaro.org wrote:
On Wed, Nov 12, 2014 at 11:51 AM, Ard Biesheuvel
ard.biesheu...@linaro.org wrote:
On 12 November 2014 12:45, Grant Likely
Create a new /sys entry '/sys/firmware/fdt' to export the FDT blob
that was passed to the kernel by the bootloader. This allows userland
applications such as kexec to access the raw binary.
The fact that this node does not reside under /sys/firmware/device-tree
is deliberate: FDT is also used on
Hi,
On 03/11/14 23:59, Marek Belisko wrote:
gta04 board need for tvout enabled 2 bits in devconf1 register (tvbypass and
acbias).
Add single pinmux entry and enable it.
Signed-off-by: Marek Belisko ma...@goldelico.com
---
arch/arm/boot/dts/omap3-gta04.dtsi | 22 ++
Hello Vignesh,
I tried your patch version 3 on a customized board and had some
behavior I couldn't explain.
If I only use the touchscreen it works fine but if I also read values
from the ADCs then I get a lot of pen_up events even if I am still
touching the screen.
For the test I read via
# cat
On Wed, Nov 12, 2014 at 12:01:46AM +0100, Karsten Merker wrote:
On the LeMaker Banana Pi, probing the external ethernet PHY connected
to the SoC's internal GMAC module sometimes fails. The PHY power
supply is handled via a GPIO-controlled regulator, and the existing
regulator startup-delay of
Hi Arnd,
Thanks for reviewing.
On Fri, 07 Nov 2014, Arnd Bergmann wrote:
+ ehci0: usb@0xfe1ffe00 {
Please drop the '0x' from the unit address in all instances.
Ok, fixed in v2
+ compatible = st,st-ehci-300x;
+ reg =
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, November 12, 2014 1:38 AM
To: Xie Shaohui-B21989
Cc: Liberman Igal-B31950; linuxppc-...@lists.ozlabs.org;
devicetree@vger.kernel.org; Medve Emilian-EMMEDVE1
Subject: Re: [PATCH] DT: add MDIO node for FMan node
On Tue,
Hi Arnd,
Thanks for reviewing.
On Friday 07 November 2014 11:57:54 Peter Griffin wrote:
+
+ soc {
+
+ ohci0: usb@9a03c00 {
+ status = okay;
+ };
+
+ ehci0: usb@9a03e00 {
+ status =
Hi Lee,
Thanks for reviewing.
On Mon, 10 Nov 2014, Lee Jones wrote:
On Fri, 07 Nov 2014, Peter Griffin wrote:
This usb picophy is found on stih415/6 SoC.
Then shouldn't it live in stih41x.dtsi?
No, it is the same ip block, and underlying driver, but needs a different
compatible string
Hi,
On 03/11/14 23:59, Marek Belisko wrote:
opa362 is amplifier for videoand can be connected to the tvout pads
of the OMAP3. It has one gpio control for enable/disable of the output
(high impedance).
Signed-off-by: H. Nikolaus Schaller h...@goldelico.com
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