The binding of the armada-380-sdhci has been extended with a new
register in order to be able to use the SDR50 and DDR50 mode. This
commit add the resource associated to this new register for the
Armada 38x.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
Instead of hardcoding the values of the interrupt flags, use the
macros provided by include/dt-bindings/interrupt-controller/irq.h
and include/dt-bindings/interrupt-controller/arm-gic.h for the
Armada 38x SDHCI node.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
From: Marcin Wojtas m...@semihalf.com
According to erratum 'FE-2946959' both SDR50 and DDR50 modes require
specific clock adjustments in SDIO3 Configuration register.
This commit add the support of this register and for SDR50 or DDR50
mode use it as suggested by the erratum:
- Set the SDIO3
The Device Tree description of SDHCI on Armada 388 RD board was
missing. This commit adds the node for it.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
arch/arm/boot/dts/armada-388-rd.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git
Currently there is no way to keep a chained handler disabled when
registering it.
This might be annoying for irq demuxer that want to keep the source irq
disabled until at least one of their child irq is requested.
Replace the is_chained argument of __irq_set_handler by an enum, thus
adding a new
Some interrupt controllers are multiplexing several peripheral IRQs on
a single interrupt line.
While this is not a problem for most IRQs (as long as all peripherals
request the interrupt with IRQF_SHARED flag set), multiplexing timers and
other type of peripherals will generate a WARNING (mixing
Add documentation for the dumb demuxer.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
.../bindings/interrupt-controller/dumb-demux.txt | 41 ++
1 file changed, 41 insertions(+)
create mode 100644
On Fri, Jan 23, 2015 at 02:56:04PM +0100, Lars-Peter Clausen wrote:
On 01/23/2015 01:15 PM, Jean-Francois Moine wrote:
Your example is a relative simple one where you do not have any additional
audio fabric on the board itself.
Right, and that's why I'd be glad to have quickly something in
On Fri, Jan 23, 2015 at 12:19 PM, Murali Karicheri m-kariche...@ti.com wrote:
On 01/09/2015 10:34 AM, Rob Herring wrote:
On Thu, Jan 8, 2015 at 4:24 PM, Arnd Bergmanna...@arndb.de wrote:
On Thursday 08 January 2015 14:26:36 Murali Karicheri wrote:
On 01/08/2015 03:40 AM, Arnd Bergmann
Older at91 SoCs need a virtual dumb irq demuxer to gracefully support the
fact that irq1 is shared by several devices and a timer.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
arch/arm/mach-at91/Kconfig | 2 ++
1 file
On 01/23/2015 10:34 AM, Mark Rutland wrote:
On Fri, Jan 23, 2015 at 04:57:19PM +, Stephen Warren wrote:
On 01/23/2015 04:31 AM, Paul Walmsley wrote:
+ Arto, Terje for comments on the host1x section
+ Stephen Warren for comments on the serial DT data
On Wed, 21 Jan 2015, Mark Rutland
On Fri, 23 Jan 2015 14:56:04 +0100
Lars-Peter Clausen l...@metafoo.de wrote:
On 01/23/2015 01:15 PM, Jean-Francois Moine wrote:
[...]
The DT should describe the hardware, and the simple-card mixes hardware
and software.
For example, the kirkwood controller may create 2 CPU DAIs. With the
On Fri, 23 Jan 2015, Thomas Gleixner wrote:
On Thu, 22 Jan 2015, Lee Jones wrote:
These defines are used to allow values used for configuration to be
easily human readable and will lessen the chance of logical mistakes.
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
From: Marcin Wojtas m...@semihalf.com
According to erratum 'ERR-7878951' Armada 38x SDHCI controller has
different capabilities than the ones shown in its registers:
- it doesn't support the voltage switching: it can work either with
3.3V or 1.8V supply
- it doesn't support the SDR104 mode
-
The SDHCI unit used on the Armada 38x needs using an extra register to
do specific clock adjustments in order to support the SDR50 and DDR50
modes. This patch extends the binding to allow using this register.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
According to erratum 'FE-2946959' both SDR50 and DDR50 modes require
specific clock adjustments in SDIO3 Configuration register. However,
this register was not part of the device tree binding. Even if the
binding can (and will) be extended we still need handling the case
where this register was
Hi,
this series brings fixes and improvements for the SDHCI controller of
the Armada 38x SoCs.
The changes for this third version was done on the second patch, see
the changelog for the details.
The first two patches are fixes and should be also applied on the
stable branch (I added stable in
On Fri, Jan 23, 2015 at 04:57:19PM +, Stephen Warren wrote:
On 01/23/2015 04:31 AM, Paul Walmsley wrote:
+ Arto, Terje for comments on the host1x section
+ Stephen Warren for comments on the serial DT data
On Wed, 21 Jan 2015, Mark Rutland wrote:
As mentioned in my reply to the DT
IRQ is multiplexing several peripheral IRQs, but there's no way to
properly demultiplex those IRQs.
Use a dumb irq demux chip to achieve this demultiplexing operation.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/at91rm9200.dtsi | 20
On Fri, 23 Jan 2015, Thomas Gleixner wrote:
On Thu, 22 Jan 2015, Lee Jones wrote:
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
I'm wondering how this is related to
Commit cab303be91dc47942bc25de33dc1140123540800 [1] introduced a WARN_ON
test which triggers a WARNING backtrace on at91 platforms.
While this WARN_ON is absolutely necessary to warn users that they should
not mix request with and without IRQF_NO_SUSPEND flags on shared IRQs,
there is no easy way
On 01/23/2015 04:31 AM, Paul Walmsley wrote:
+ Arto, Terje for comments on the host1x section
+ Stephen Warren for comments on the serial DT data
On Wed, 21 Jan 2015, Mark Rutland wrote:
As mentioned in my reply to the DT list patch [1], there are a couple of
bits I'd like to see cleaned up
On 23 January 2015 at 16:56, Javier Martinez Canillas
jav...@dowhile0.org wrote:
Hello Ulf,
On Mon, Jan 19, 2015 at 10:13 AM, Ulf Hansson ulf.hans...@linaro.org wrote:
int mmc_pwrseq_simple_alloc(struct mmc_host *host, struct device *dev)
{
struct mmc_pwrseq_simple *pwrseq;
+
Hello Ulf,
On Fri, Jan 23, 2015 at 6:01 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
Any reason to not use the devm_gpiod_get_index() managed version instead?
This struct device don't have a bound driver to it. Thus this device
won't be freed automagically from the -remove() or failed
On 01/09/2015 10:34 AM, Rob Herring wrote:
On Thu, Jan 8, 2015 at 4:24 PM, Arnd Bergmanna...@arndb.de wrote:
On Thursday 08 January 2015 14:26:36 Murali Karicheri wrote:
On 01/08/2015 03:40 AM, Arnd Bergmann wrote:
On Wednesday 07 January 2015 17:37:56 Rob Herring wrote:
On Wed, Jan 7, 2015
Hi,
I'm working on a new board that has a marvell,dsa switch. Similar to the
kirkwood-mv88f6281gtw-ge board. However the major difference is that instead of
being connected to an integrated Ethernet port it is connected via a PCI-e
Ethernet port (basically a NIC hardwired onto the board).
Hi,
A few general things below (I'll leave the actual networking bits for
others to comment about).
On Friday 23 January 2015 10:07:01 Stathis Voukelatos wrote:
---
.../bindings/net/linn-ether-packet-sniffer.txt | 27 ++
.../devicetree/bindings/vendor-prefixes.txt| 1 +
The OCTEON SATA controller is currently found on cn71XX devices.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com
Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com
---
Version 1:
On Friday 23 January 2015 19:02:33 Chris Packham wrote:
Hi,
I'm working on a new board that has a marvell,dsa switch. Similar to the
kirkwood-mv88f6281gtw-ge board. However the major difference is that instead
of being connected to an integrated Ethernet port it is connected via a PCI-e
Gemei G9 is an A10 based tablet, with 1G RAM, 16G NAND, 1024x768
IPS LCD display, stereo speakers, 1.3MP front camera and 5 MP
rear camera, 8000mAh battery, GT901 2+1 touchscreen, Bosch BMA250
accelerometer and RTL8188CUS USB wifi. It also has MicroSD slot,
miniHDMI, 1 x MicroUSB OTG port and 1 x
Renesas has made some changes to the Henninger low cost board hardware and at
the same time decided to rename the board to Porter.
Signed-off-by: Sergei Shtylyov sergei.shtyl...@cogentembedded.com
---
This patch is against 'renesas-devel-20150123-v3.19-rc5' tag of Simon Horman's
'renesas.git
On Fri, Jan 23, 2015 at 07:34:56PM +0100, Jean-Francois Moine wrote:
A card builder is a device which
- scans the graph of ports,
- fills the struct snd_soc_card according to the links between the
ports and their properties,
- and, eventually, calls snd_soc_register_card().
The simple
Hi Arnd,
Thanks for the quick response (and sorry for the horribly formatted
message, travelling with only a webmail interface at the moment).
On Fri, 23 Jan 2015, Arnd Bergmann wrote:
On Friday 23 January 2015 19:02:33 Chris Packham wrote:
Hi,
I'm working on a new board that has a
Move of_dma_configure() to device.c so that same function can be re-used
for PCI devices to obtain DMA configuration from DT. Also add a second
argument so that for PCI, DT node of root bus host bridge can be used to
obtain the DMA configuration for the slave PCI device.
Cc: Joerg Roedel
Fix the dma-range size when the DT attribute is missing. i.e set size to
dev-coherent_dma_mask + 1 instead of dev-coherent_dma_mask. To detect
overflow when mask is set to max of u64, add a check, log error and return.
Some platform use mask format for size in DTS. So add a work around to
catch
On Fri, Jan 23, 2015 at 05:32:38PM -0500, Murali Karicheri wrote:
If there is a DT node available for the root bridge's parent device,
use the dma configuration from that device node. For example, keystone
PCI devices would require dma_pfn_offset to be set correctly in the
device structure of
On Thu, Jan 22, 2015 at 11:21:32AM +, Robin Murphy wrote:
Without explicit command-line parameters, the Juno UART ends up running
at 57600 baud in the kernel, which is at odds with the 115200 baud used
by the rest of the firmware. Since commit 7914a7c5651a5161 now lets us
fix this by
On Fri, 2015-01-23 at 22:22 +0100, Maxime Ripard wrote:
On Fri, Jan 23, 2015 at 10:36:49PM +0200, Priit Laes wrote:
Gemei G9 is an A10 based tablet, with 1G RAM, 16G NAND, 1024x768
IPS LCD display, stereo speakers, 1.3MP front camera and 5 MP
rear camera, 8000mAh battery, GT901 2+1
Hi all,
with these patches we can use perf with AM43xx devices
and get actual statistics.
Full boot logs: http://hastebin.com/yoxaxurohu
Felipe Balbi (4):
arm: omap: hwmod: 43xx: add DebugSS hwmod data
arm: dts: am4372: add missing debugss clocks
clk: ti: 43xx: add debugss clocks to
On Thu, 22 Jan 2015 13:40:53 -0800 Tony Lindgren t...@atomide.com wrote:
* Marek Belisko ma...@goldelico.com [150122 12:42]:
From: NeilBrown n...@brown.name
Signed-off-by: NeilBrown n...@brown.name
---
arch/arm/boot/dts/omap3-gta04.dtsi | 4
1 file changed, 4 insertions(+)
Limit the dma_mask to minimum of dma_mask and dma_base + size - 1.
Also arm_iommu_create_mapping() has size parameter of size_t and
arm_setup_iommu_dma_ops() can take a value higher than that. So
limit the size to SIZE_MAX.
Signed-off-by: Murali Karicheri m-kariche...@ti.com
---
On 23/01/15 11:38, Chris Packham wrote:
Hi Arnd,
Thanks for the quick response (and sorry for the horribly formatted
message, travelling with only a webmail interface at the moment).
On Fri, 23 Jan 2015, Arnd Bergmann wrote:
On Friday 23 January 2015 19:02:33 Chris Packham wrote:
Hi,
On Fri, Jan 23, 2015 at 04:39:23PM +0100, Hans de Goede wrote:
The Hyundai A7HD is a 7 16:9 A10 powered tablet featuring 1G RAM, 8G
nand, 1024x600 IPS screen, a mini hdmi port, mini usb receptacle and a
headphones port for details see: http://linux-sunxi.org/Hyundai_A7HD
Cc: Mark Janssen
On Fri, Jan 23, 2015 at 10:36:49PM +0200, Priit Laes wrote:
Gemei G9 is an A10 based tablet, with 1G RAM, 16G NAND, 1024x768
IPS LCD display, stereo speakers, 1.3MP front camera and 5 MP
rear camera, 8000mAh battery, GT901 2+1 touchscreen, Bosch BMA250
accelerometer and RTL8188CUS USB wifi. It
Add of_pci_dma_configure() to allow updating the dma configuration
of the pci device using the configuration from DT of the parent of
the root bridge device.
Cc: Joerg Roedel j...@8bytes.org
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring robh...@kernel.org
Cc: Bjorn Helgaas
PCI devices on Keystone doesn't have correct dma_pfn_offset set. This patch
add capability to set the dma configuration such as dma-mask, dma_pfn_offset,
and dma ops etc using the information from DT. The prior RFCs and discussions
are available at [1] and [2] below.
[2] :
Function of_iommu_configure() is called from of_dma_configure() to
setup iommu ops using DT property. This API is currently used for
platform devices for which DMA configuration (including iommu ops)
may come from device's parent. To extend this functionality for PCI
devices, this API need to take
If there is a DT node available for the root bridge's parent device,
use the dma configuration from that device node. For example, keystone
PCI devices would require dma_pfn_offset to be set correctly in the
device structure of the pci device in order to have the correct dma mask.
The DT node will
These clocks are needed so that OMAP HWMOD can
control them when we're using performance
monitors.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/boot/dts/am43xx-clocks.dtsi | 51
1 file changed, 51 insertions(+)
diff --git
Without hwmod data for DebugSS, performance monitors
have no chance of running on AM43xx devices.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 40 ++
arch/arm/mach-omap2/prcm43xx.h | 1 +
2 files changed, 41
with this patch, performance monitors work
and show sensible data on AM43xx devices:
~# perf stat sleep 5
Performance counter stats for 'sleep 5':
6.079585 task-clock (msec) #0.001 CPUs utilized
3 context-switches #0.493 K/sec
without these entries, omap_hwmod will not be
able to find debugss clocks.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/clk/ti/clk-43xx.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/ti/clk-43xx.c b/drivers/clk/ti/clk-43xx.c
index 3795fce8a830..46a597c815c9
On 23 January 2015 at 17:22, Mark Brown broo...@kernel.org wrote:
On Fri, Jan 23, 2015 at 12:39:14PM +0100, Lucas Stach wrote:
I tend to agree that this is clearer. It might be nice to have variants
for specifying directly as a percentage but I don't think it's really
worth the complexity.
On Sun, Jan 11, 2015 at 8:19 AM, Gaurav Minocha
gaurav.minocha...@gmail.com wrote:
This patch intends to remove the unittests dependency on
the functions defined in dynamic.c. So, rather than calling
of_attach_node defined in dynamic.c, minimal functionality
required to attach a new node is
On Fri, Jan 23, 2015 at 9:31 PM, Peter Hurley pe...@hurleysoftware.com wrote:
Hi Chunyan,
Just the minor fix to zeroing the stack local in sprd_set_termios()
and using dev_get_drvdata() in sprd_suspend()/sprd_resume().
ok, I see.
Regards,
Peter Hurley
On 01/23/2015 08:01 AM, Chunyan
On Friday 23 January 2015 09:56:51 Geert Uytterhoeven wrote:
diff --git a/Documentation/devicetree/bindings/bus/simple-pm-bus.txt
b/Documentation/devicetree/bindings/bus/simple-pm-bus.txt
new file mode 100644
index ..d03abf7fd8e3997a
--- /dev/null
+++
On 01/23/2015 01:15 PM, Jean-Francois Moine wrote:
[...]
The DT should describe the hardware, and the simple-card mixes hardware
and software.
For example, the kirkwood controller may create 2 CPU DAIs. With the
simple-card, the DT contains a number to reference these DAIs (for
example,
From: Courtney Cavin courtney.ca...@sonymobile.com
Signed-off-by: Courtney Cavin courtney.ca...@sonymobile.com
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
drivers/input/misc/Kconfig | 12 ++
drivers/input/misc/Makefile| 1 +
These patches add dt bindings and a device driver for the power key block in
the Qualcomm PM8941 pmic.
Changes since v1:
* Use a reboot_notifier to set power off/reboot mode
* Use irq flags from devicetree
* Some style fixes
Courtney Cavin (2):
input: Add Qualcomm PM8941 power key driver
On Fri, Jan 23, 2015 at 4:54 PM, Bjorn Andersson
bjorn.anders...@sonymobile.com wrote:
From: Courtney Cavin courtney.ca...@sonymobile.com
This adds support for the WLED ('White' LED) block on Qualcomm's
PM8941 PMICs.
Signed-off-by: Courtney Cavin courtney.ca...@sonymobile.com
Signed-off-by:
From: Courtney Cavin courtney.ca...@sonymobile.com
Signed-off-by: Courtney Cavin courtney.ca...@sonymobile.com
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
.../bindings/input/qcom,pm8941-pwrkey.txt | 43 ++
1 file changed, 43 insertions(+)
On Tue, Dec 30, 2014 at 10:58:00PM +0100, Arnd Bergmann wrote:
On Tuesday 30 December 2014 13:28:33 Rob Herring wrote:
+ list_for_each_entry(win, res, list) {
+ struct resource *parent, *res = win-res;
+
+ switch (resource_type(res)) {
+ case
* NeilBrown ne...@suse.de [150123 14:31]:
On Thu, 22 Jan 2015 13:40:53 -0800 Tony Lindgren t...@atomide.com wrote:
+uart4 {
+ status = disabled;
+};
+
This you probably want to avoid from PM point of view. Depending on
bootloader state of uart4, Linux may or may not be
From: Courtney Cavin courtney.ca...@sonymobile.com
This adds support for the WLED ('White' LED) block on Qualcomm's
PM8941 PMICs.
Signed-off-by: Courtney Cavin courtney.ca...@sonymobile.com
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
drivers/leds/Kconfig| 8 +
From: Courtney Cavin courtney.ca...@sonymobile.com
This adds device tree binding documentation for the WLED ('White' LED)
block on Qualcomm's PM8941 PMICs.
Signed-off-by: Courtney Cavin courtney.ca...@sonymobile.com
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
Sorry for the late reply; maybe this has already been queued up somewhere,
so this might be moot.
I usually capitalize the PCI and first letter of the subject, like:
PCI: Add DT based ARM Versatile PCI host driver
And I try to ask for MAINTAINER updates since these drivers are under
On Fri, Jan 23, 2015 at 05:11:43PM -0600, Felipe Balbi wrote:
without these entries, omap_hwmod will not be
able to find debugss clocks.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/clk/ti/clk-43xx.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
On Fri, Jan 23, 2015 at 05:32:37PM -0500, Murali Karicheri wrote:
Add of_pci_dma_configure() to allow updating the dma configuration
of the pci device using the configuration from DT of the parent of
the root bridge device.
Cc: Joerg Roedel j...@8bytes.org
Cc: Grant Likely
Hello,
I've tested the series on my X2 and so far I haven't encountered any
obvious issues with it.
I have a small question though. With the move to simple-audio-card the
old driver (selected by SND_SOC_ODROIDX2) is probably going away after
some time.
Currently SND_SOC_ODROIDX2 also selects
On Wed, Jan 14, 2015 at 05:41:49PM -0600, Aaron Sierra wrote:
From: Jordan Friendshuh jfriends...@xes-inc.com
Support the generic nand-ecc-mode, nand-ecc-strength, and
nand-ecc-step-size device-tree properties with the Freescale UPM NAND
driver.
This patch preserves the default software
From: Arnd Bergmann a...@arndb.de
Date: Thu, 22 Jan 2015 11:18:50 +0100
I see. In this case, I think merging your new driver is not a good idea:
+1
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Am Freitag, den 23.01.2015, 16:14 +0530 schrieb Viresh Kumar:
Rob et al,
This is another attempt to redefine OPP bindings which we concluded to after
first round of reviews.
Current OPP (Operating performance point) DT bindings are proven to be
insufficient at multiple instances.
There
On Fri, Jan 23, 2015 at 11:31:24AM +, Paul Walmsley wrote:
+ Arto, Terje for comments on the host1x section
+ Stephen Warren for comments on the serial DT data
Hi Mark,
thanks for the review.
On Wed, 21 Jan 2015, Mark Rutland wrote:
As mentioned in my reply to the DT list patch
Hi Ludovic,
On Jan 23, 2015, at 11:07 , Ludovic Desroches ludovic.desroc...@atmel.com
wrote:
Hi Pantelis,
On Thu, Jan 22, 2015 at 10:54:42PM +0200, Pantelis Antoniou wrote:
Hi Ludovic,
On Jan 22, 2015, at 17:02 , Ludovic Desroches ludovic.desroc...@atmel.com
wrote:
Hi,
I have
On Fri, Jan 23, 2015 at 12:14:00PM +, Arto Merilainen wrote:
Hi all,
On 01/23/2015 01:31 PM, Paul Walmsley wrote:
+ Arto, Terje for comments on the host1x section
+ Stephen Warren for comments on the serial DT data
Hi Mark,
thanks for the review.
On Wed, 21 Jan 2015, Mark
Dear Gregory,
@@ -118,8 +118,11 @@ static int mv_conf_mbus_windows(struct platform_device
*pdev,
return 0;
}
-static int armada_38x_quirks(struct sdhci_host *host)
+static int armada_38x_quirks(struct platform_device *pdev,
+struct sdhci_host *host)
On Fri, Jan 23, 2015 at 12:39:14PM +0100, Lucas Stach wrote:
+ Required properties:
+ - opp-khz: Frequency in kHz
+ - opp-microvolt: voltage in micro Volts
Each OPP voltage should be defined by the triplet of minimum,
nominal/typical, maximum. This lets you specify exact tolerances in
On Fri, Jan 23, 2015 at 11:44:24AM +, Mark Rutland wrote:
On Fri, Jan 23, 2015 at 11:31:24AM +, Paul Walmsley wrote:
On Wed, 21 Jan 2015, Mark Rutland wrote:
On Fri, Jan 16, 2015 at 11:45:29AM +, Paul Walmsley wrote:
[...]
+
+ clocks = tegra_car
Hi all,
On 01/23/2015 01:31 PM, Paul Walmsley wrote:
+ Arto, Terje for comments on the host1x section
+ Stephen Warren for comments on the serial DT data
Hi Mark,
thanks for the review.
On Wed, 21 Jan 2015, Mark Rutland wrote:
As mentioned in my reply to the DT list patch [1], there are a
On Thu, 22 Jan 2015 20:25:39 +0100
Lars-Peter Clausen l...@metafoo.de wrote:
On 01/22/2015 09:07 AM, Jean-Francois Moine wrote:
On Wed, 21 Jan 2015 21:14:07 +0100
Lars-Peter Clausen l...@metafoo.de wrote:
[...]
+ card-dai_link-dai_fmt =
+ snd_soc_of_parse_daifmt(of_cpu,
On Fri, Jan 23, 2015 at 12:03:57PM +, Thierry Reding wrote:
On Fri, Jan 23, 2015 at 11:44:24AM +, Mark Rutland wrote:
On Fri, Jan 23, 2015 at 11:31:24AM +, Paul Walmsley wrote:
On Wed, 21 Jan 2015, Mark Rutland wrote:
On Fri, Jan 16, 2015 at 11:45:29AM +, Paul Walmsley
Feel free to apply it for 3.19 with my ack. You then want to pick up
v1 of this patch.
Sigh, I give up, this is too confusing. I don't know which one is V1,
they are not numbered in any way. And I have been holding back my pull
request for too long already.
I'll drop this patch. Whatever
Mark (and unmark) device nodes with the POPULATE flag as appropriate.
This is required to avoid multi probing when using I2C and device
overlays containing a mux.
This patch is also more careful with the release of the adapter device
which caused a deadlock with muxes, and does not break the build
Hi Wolfram,
On Jan 24, 2015, at 06:26 , Wolfram Sang w...@the-dreams.de wrote:
Feel free to apply it for 3.19 with my ack. You then want to pick up
v1 of this patch.
Sigh, I give up, this is too confusing. I don't know which one is V1,
they are not numbered in any way. And I have been
On Fri, 23 Jan 2015 19:13:43 +
Mark Brown broo...@kernel.org wrote:
On Fri, Jan 23, 2015 at 07:34:56PM +0100, Jean-Francois Moine wrote:
A card builder is a device which
- scans the graph of ports,
- fills the struct snd_soc_card according to the links between the
ports and their
On Fri, 23 Jan 2015, David Paris wrote:
Hi Lee,
Just a minor remark/question,
David
On 01/22/2015 12:56 PM, Lee Jones wrote:
On current ST platforms the LPC controls a number of functions. This
patch enables support for the LPC Watchdog and LPC RTC devices on LPC1
and LPC2
On 01/22/2015 05:53 PM, Nathan Lynch wrote:
On 01/19/2015 04:30 AM, Michal Simek wrote:
diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
index 5e343bab9458..3955f42e9e9c 100644
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
@@ -64,4 +64,15 @@ config
Hi Lee,
Just a minor remark/question,
David
On 01/22/2015 12:56 PM, Lee Jones wrote:
On current ST platforms the LPC controls a number of functions. This
patch enables support for the LPC Watchdog and LPC RTC devices on LPC1
and LPC2 respectively.
Signed-off-by: David Paris
Hi Pantelis,
On Thu, Jan 22, 2015 at 10:54:42PM +0200, Pantelis Antoniou wrote:
Hi Ludovic,
On Jan 22, 2015, at 17:02 , Ludovic Desroches ludovic.desroc...@atmel.com
wrote:
Hi,
I have assisted to Pantelis' talk about device tree and overlays at ELCE
2014. Since the patch
On Thu, Jan 22, 2015 at 6:44 AM, Olliver Schinagl oli...@schinagl.nl wrote:
Hey Alexandre,
On 01/19/2015 05:04 AM, Alexandre Courbot wrote:
On Wed, Jan 7, 2015 at 6:08 PM, Olliver Schinagl
oliver+l...@schinagl.nl wrote:
From: Olliver Schinagl oli...@schinagl.nl
The gpio binding document
Le 21/01/2015 10:49, Linus Walleij a écrit :
On Mon, Jan 19, 2015 at 11:46 AM, Nicolas Ferre nicolas.fe...@atmel.com
wrote:
Le 16/01/2015 16:31, Ludovic Desroches a écrit :
PioD controller was not described in the device tree since we don't use
it. As pinctrl-at91 allows disabled gpio
This patch adds support the Ethernet Packet Sniffer H/W module
developed by Linn Products Ltd and found in the IMG Pistachio SoC.
The module allows Ethernet packets to be parsed, matched against
a user-defined pattern and timestamped. It sits between a 100M
Ethernet MAC and PHY and is completely
From: Zhizhou Zhang zhizhou.zh...@spreadtrum.com
Adds support for Spreadtrum's SoC Platform in the arm64 Kconfig and
defconfig files.
Signed-off-by: Zhizhou Zhang zhizhou.zh...@spreadtrum.com
Signed-off-by: Orson Zhai orson.z...@spreadtrum.com
Signed-off-by: Chunyan Zhang
This patch-set split the last version, and addressed the review comments from
last version on serial driver code.
Changes from v5:
- Added maintenance interrupt for gic
- Removed reg property from 'soc' and 'apb' nodes
Zhizhou Zhang (2):
arm64: dts: Add support for Spreadtrum
Fixing Olof's email address ..
On 23 January 2015 at 16:14, Viresh Kumar viresh.ku...@linaro.org wrote:
Rob et al,
This is another attempt to redefine OPP bindings which we concluded to after
first round of reviews.
Current OPP (Operating performance point) DT bindings are proven to be
On Fri, Jan 23, 2015 at 10:07:01AM +, Stathis Voukelatos wrote:
This patch adds support the Ethernet Packet Sniffer H/W module
developed by Linn Products Ltd and found in the IMG Pistachio SoC.
The module allows Ethernet packets to be parsed, matched against
a user-defined pattern and
Hi,
this series brings fixes and improvements for the SDHCI controller of
the Armada 38x SoCs.
The main change for this second version was to put back the authorship
on patch 2 and 4 from Marcin as I ported them a 3.10 kernel.
The first two patches are fixes and should be also applied on the
Instead of hardcoding the values of the interrupt flags, use the
macros provided by include/dt-bindings/interrupt-controller/irq.h
and include/dt-bindings/interrupt-controller/arm-gic.h for the
Armada 38x SDHCI node.
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
---
From: Marcin Wojtas m...@semihalf.com
According to erratum 'ERR-7878951' Armada 38x SDHCI controller has
different capabilities than the ones shown in its registers:
- it doesn't support the voltage switching: it can work either with
3.3V or 1.8V supply
- it doesn't support the SDR104 mode
-
From: Marcin Wojtas m...@semihalf.com
According to erratum 'FE-2946959' both SDR50 and DDR50 modes require
specific clock adjustments in SDIO3 Configuration register.
This commit add the support of this register and for SDR50 or DDR50
mode use it as suggested by the erratum:
- Set the SDIO3
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