Hi,
NVEC driver contains code to manage tegra i2c controller in slave mode.
I2C slave support was implemented in linux kernel. The goal of this
patch serie is to implement I2C slave mode in tegra drived and rework
NVEC driver to use it.
Patches are based on i2c for-next.
Patch 1 imeplents slave
NVEC driver was reimplemented to use tegra i2c. Use common i2c bindings
for NVEC node.
Signed-off-by: Andrey Danin
---
.../devicetree/bindings/nvec/nvidia,nvec.txt | 19 ++-
arch/arm/boot/dts/tegra20-paz00.dts| 22 +-
2 files changed, 11
On 01/28, Andy Gross wrote:
> On Wed, Jan 28, 2015 at 06:11:50PM -0800, Stephen Boyd wrote:
>
> >
> > > +- syscon-tcsr: indicates phandle of TCSR syscon node
> >
> > Make this optional but required if any child nodes use dma?
>
> To enforce that I'd have to determine that a child has a dmas. I
On Wed, Jan 28, 2015 at 03:39:22PM -0300, Ezequiel Garcia wrote:
> On 01/20/2015 10:59 AM, Guenter Roeck wrote:
> > On 01/20/2015 03:13 AM, Ezequiel Garcia wrote:
> >> Hi Wim,
> >>
> >> On 01/06/2015 10:19 AM, Ezequiel Garcia wrote:
> >>> Here's the seventh round for IMG PDC Watchdog driver.
> >>>
On Wed, Jan 28, 2015 at 06:11:50PM -0800, Stephen Boyd wrote:
> > Required properties:
> > -- compatible: must contain "qcom,gsbi-v1.0.0" for APQ8064/IPQ8064
> > +- compatible: Should contain:
> > + "qcom,gsbi-ipq8064" for IPQ8064
> > + "qcom,gsbi-apq8064" for APQ8064
>
Hi,
Here are a few simple patches for the jz4740.
First adds a simple DT binding.
Seconds adds DT support.
Third is a minor fix in clock enabling.
Patches are based on 3.19-rc6. Quite disjoint and stay within jz4740
so should apply easily on other trees.
If you would like to have them rebased
From: Paul Burton
The clock must have been prepared before enabling it.
Signed-off-by: Paul Burton
Signed-off-by: Zubair Lutfullah Kakakhel
Acked-by: Alan Stern
--
V2 changes. Add disable_unprepare as well
---
drivers/usb/host/ohci-jz4740.c | 6 +++---
1 file changed, 3 insertions(+), 3 del
From: Paul Burton
This is a simple matter of providing a match table, the probe code needs
no modification.
Signed-off-by: Paul Burton
Signed-off-by: Zubair Lutfullah Kakakhel
Acked-by: Alan Stern
---
drivers/usb/host/ohci-jz4740.c | 9 +
1 file changed, 9 insertions(+)
diff --git a
From: Paul Burton
Add the binding documentation for the JZ4740 OHCI controller.
Signed-off-by: Paul Burton
Signed-off-by: Zubair Lutfullah Kakakhel
---
The jz4740 is platform only at the moment.
But DT support is being added
See http://patchwork.linux-mips.org/bundle/paulburton/ci20-v3.20/
Hello!
Ulf Hansson wrote:
> On 28 January 2015 at 14:59, Marek Szyprowski
> wrote:
>> There are boards (like Hardkernel's Odroid boards) on which eMMC card's
>> reset line is connected to GPIO line instead of the hardware reset
>> logic. In case of such boards, if first stage of bootloader is lo
On 01/22/2015 12:56 PM, Mark Rutland wrote:
> On Wed, Jan 21, 2015 at 05:56:37PM +, Suman Anna wrote:
>> On 01/21/2015 06:41 AM, Ohad Ben-Cohen wrote:
>>> On Tue, Jan 20, 2015 at 8:05 PM, Tony Lindgren wrote:
How about default to Linux id space and allow overriding that with
a module
t; > series to the respective maintainers for irqchip and clocksource.
>
> I found this message while looking into CONFIG_ARCH_DIGICOLOR. That
> Kconfig macro entered linux-next in next-20150128. But there's no
> Kconfig symbol ARCH_DIGICOLOR yet in linux-next.
Just for the record: bas
On Wed, Jan 28, 2015 at 10:49:39PM +0100, peterhu...@gmx.de wrote:
> >> I will go for a define making the code more readable together with a
> >> comment.
> >
> >You can probably just make these static arrays inside your priv
> >structure and drop these independent allocations:
>
> Hmm, doesn' t
+ Felipe, Mugunthan for commenting on TI_CPSW, ALE.
On 01/28/2015 04:03 PM, Arnd Bergmann wrote:
On Wednesday 28 January 2015 15:43:57 Murali Karicheri wrote:
this. Hope I am on the right track.
Reproduced this. Following errors seen when building the modules.
LD [M] drivers/net/etherne
patches to a...@kernel.org, and send the other patches as separate
> > > series to the respective maintainers for irqchip and clocksource.
> >
> > I found this message while looking into CONFIG_ARCH_DIGICOLOR. That
> > Kconfig macro entered linux-next in next-20150128. B
Hi Mark,
> Mark Brown hat am 27. Januar 2015 um 20:43 geschrieben:
>
>
> On Tue, Jan 27, 2015 at 07:35:09PM +0100, Stefan Wahren wrote:
> > > Mark Brown hat am 27. Januar 2015 um 01:16
> > > geschrieben:
>
> > > > okay i understand. But doesn't it need a extra driver to set the
> > > > switching
On Fri, Jan 23, 2015 at 04:14:50PM +0530, Viresh Kumar wrote:
> +- opp-listN:
> + List of nodes defining performance points. Following belong to the nodes
> + within the opp-lists.
Why is there the N here? It doesn't correspond to the examples...
> + Required properties:
> + - opp-khz: Freq
On Wed, Jan 28, 2015 at 03:16:10PM +0100, Peter Rosin wrote:
> community pages (1). The clocking functionality is also much better
> described in the datasheet for the chip PCM5242, which seems to be
> register compatible with PCM512x and PCM514x (which both have severely
> lacking datasheets).
I
On Tue, Jan 27, 2015 at 04:27:22PM +0530, Bhuvanchandra DV wrote:
> From: Chao Fu
>
> DSPI module need cs change information in
> a spi transfer. According to cs change, DSPI
Applied, thanks.
signature.asc
Description: Digital signature
On Wed, Jan 28, 2015 at 03:16:08PM +0100, Peter Rosin wrote:
> @@ -78,7 +78,7 @@ static const struct reg_default pcm512x_reg_defaults[] = {
> { PCM512x_DIGITAL_VOLUME_2, 0x30 },
> { PCM512x_DIGITAL_VOLUME_3, 0x30 },
> { PCM512x_DIGITAL_MUTE_1,0x22 },
> - { PCM512x_DIGIT
On Tue, Jan 27, 2015 at 04:33:28PM +0530, Bhuvanchandra DV wrote:
> TCFQ is interrupt of Transfer Complete Flag in DSPI module.
> EOQ is interrupt of End of Queue Flag in DSPI module.
> For adopting of different platform, either of them is a way of DSPI
> transfer data. This patch add TCF support
Hi, Baruch
I'm sorry that I didn't receive your previous email.
and my explanations are below.
On Wed, Jan 28, 2015 at 2:12 PM, Baruch Siach wrote:
> Hi Chunyan Zhang,
>
> On Wed, Jan 28, 2015 at 10:47:41AM +0800, Chunyan Zhang wrote:
> [...]
>> +static inline void sprd_rx(struct uart_port *port
DT maintainers require all compatible strings used in chip or board
DTS file to be previously documented somewhere in
Documentation/devicetree/bindings, per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Document this requirement in the DT patch submission requirements
text file.
Signed
Hello Ulf,
On Mon, Jan 19, 2015 at 10:13 AM, Ulf Hansson wrote:
> System on chip designs may specify a specific MMC power sequence. To
> successfully detect an (e)MMC/SD/SDIO card, that power sequence must
> be followed while initializing the card.
>
> To be able to handle these SOC specific powe
Add compatible strings for the APB_MISC IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campb
On Wed, Jan 28, 2015 at 11:05:50AM +0200, Stanimir Varbanov wrote:
>
>
> > diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
> > index 7bd2c94..32f20be 100644
> > --- a/drivers/soc/qcom/Kconfig
> > +++ b/drivers/soc/qcom/Kconfig
> > @@ -4,6 +4,7 @@
> > config QCOM_GSBI
> >
Add compatible strings for the SOR IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Thierry Reding
Cc: "Terje Bergström"
Cc: Rob Herring
Cc: Pawel
Update some of the DT binding documentation text files, per Mark's
comments at:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
The primary goal with this series is to avoid checkpatch.pl warnings
and align to the policy that Mark described. This series also updates
Documentation/devicetre
On Tue, Jan 27, 2015 at 07:11:50PM -0800, Bjorn Andersson wrote:
> On Tue 27 Jan 14:10 PST 2015, Andy Gross wrote:
>
> This solution looks good, just some style things.
>
> > diff --git a/drivers/soc/qcom/qcom_gsbi.c b/drivers/soc/qcom/qcom_gsbi.c
> [..]
> > +#define MAX_GSBI 12
> > +
>
Add a Tegra132 compatible string to the pinmux IP blocks present on
chips similar to Tegra124. The primary objective here is to avoid
checkpatch warnings, per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Add a compatible string for the NVIDIA Denver CPU to the ARM CPU DT
binding documentation file. The primary objective here is to keep
checkpatch.pl from warning when the compatible string is used in an
SoC DT file, per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul
On 28 January 2015 at 16:23, Tobias Jakobi wrote:
> Ulf Hansson wrote:
>> On 28 January 2015 at 13:41, Tobias Jakobi wrote:
>>> Hello!
>>>
>>> Jaehoon Chung wrote:
mmc core supported to hw_reset function.
So i think we can use it. It's called at only initial time to clear the
prev
Add compatible strings for the I2C IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Wolfram Sang
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Add compatible strings for the SDHCI IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Add compatible strings for the AHUB IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Add compatible strings for the EHCI IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Add compatible strings for the USB PHY IP blocks present on several
Tegra chips. The primary objective here is to avoid checkpatch
warnings, per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbe
On Wednesday 28 January 2015 09:53:25 Suman Tripathi wrote:
>
> I added the iommus in the IOMMU AHBC patch. Anything wrong in that ?
> In the next version Also I will remove the IOMMU hacks from arasan
> driver
Hmm, I guess you have a required ordering between the patches either
way, which makes
On Wed, Jan 28, 2015 at 5:05 AM, Catalin Marinas
wrote:
> On Tue, Jan 27, 2015 at 06:55:15PM +, Murali Karicheri wrote:
>> On 01/27/2015 06:27 AM, Robin Murphy wrote:
>> > On 23/01/15 22:32, Murali Karicheri wrote:
>> >> Fix the dma-range size when the DT attribute is missing. i.e set size to
Hello Ulf,
On Wed, Jan 28, 2015 at 12:36 PM, Ulf Hansson wrote:
>>> ---
>>
>> Patch looks good to me and I could successfully get the SDIO wlan chip
>> in the Snow Chromebook after extending the pwrseq_simple driver so on
>> Exynos5250 Snow Chromebook:
>
> By extending you mean?
>
Sorry, I shoud
Google has submitted a board config for the pinmux programming of the
Nyan Big board. Use the whole of it as it's generated to make it easier
to update as the configuration gets fixed in the future.
Signed-off-by: Tomeu Vizoso
---
arch/arm/boot/dts/tegra124-nyan-big.dts | 1438 ++
Add compatible strings for the PWM IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Thierry Reding
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Add compatible strings for the SPI IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
This is used in the Tegra-based Chromebooks.
Signed-off-by: Tomeu Vizoso
---
Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.txt | 1 +
sound/soc/tegra/tegra_max98090.c| 2 ++
2 files changed, 3 insertions(+)
diff --git
a/Documentatio
Add compatible strings for the I2S IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
On Wed, Jan 28, 2015 at 03:55:57PM +, Robin Murphy wrote:
> On 28/01/15 11:05, Catalin Marinas wrote:
> > On Tue, Jan 27, 2015 at 06:55:15PM +, Murali Karicheri wrote:
> >> How about having the logic like this?
> >>
> >>ret = of_dma_get_range(np, &dma_addr, &paddr, &size);
> >>if (r
Add compatible strings for the UART IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
It's commercial name is HP Chromebook 14 and is substantially similar to
the Acer Chromebook 13 (nyan-big).
Signed-off-by: Tomeu Vizoso
---
arch/arm/boot/dts/Makefile|1 +
arch/arm/boot/dts/tegra124-nyan-blaze.dts | 1325 +
2 files changed, 1326 in
The digicolor interrupt controller driver now needs syscon.
Also, as per clocksource maintainer request, we now have a separate config
symbol, CONFIG_DIGICOLOR_TIMER, for the digicolor timer.
Signed-off-by: Baruch Siach
---
v4:
New patch in this series
arch/arm/mach-digicolor/Kconfig | 2 ++
Hi Linus, Hi Haojian,
Any comments about this patch?
Best regards,
Zhou Wang
On 2015/1/12 15:05, Zhou Wang wrote:
> This series add the support for the GPIOs of Hisilicon Soc hip04. Hip04 uses
> synopsis' GPIO IP, and we use the dwapb GPIO driver here. This series add the
> corresponding dts. Th
cx92755.dtsi describes CX92755 on chip peripherals. cx92755_equinox.dts
describes the Equinox evaluation board for the CX92755 SoC.
Acked-by: Arnd Bergmann
Signed-off-by: Baruch Siach
---
This is the only remaining part of the "ARM: Conexant Digicolor CX92755 SoC
support" series. See v3 changel
The Nyan boards have a eKTH3000 from Elan as their trackpad, connected
through I2C.
Signed-off-by: Tomeu Vizoso
---
arch/arm/boot/dts/tegra124-nyan.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi
b/arch/arm/boot/dts/tegra124-nyan.dtsi
index
From: Seungwon Jeon
Implements HS400 mode support for exynos host driver.
This also include some updates as new mode is added.
Signed-off-by: Seungwon Jeon
Signed-off-by: Alim Akhtar
[Alim: addressed review comments]
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt |7 +
drivers/mmc
This adds HS400 mode support for exynos dw_mmc host controller.
Currently tested on Exynos5800-peach-pi and Exyons7 platform for HS400 mode.
Tested HS200 mode with this series applied, HS200 still works.
Appreciate testing on other exynos5/7 platform which supports emmc5.0
Changes in V5:
On 27 January 2015 at 17:48, Stephen Warren wrote:
> On 01/27/2015 04:13 AM, Tomeu Vizoso wrote:
>>
>> On 15 January 2015 at 18:26, Stephen Warren wrote:
>>>
>>> On 01/15/2015 09:12 AM, Tomeu Vizoso wrote:
To silence a warning on Nyan boards.
Signed-off-by: Tomeu Vizoso
On Wed, Jan 28, 2015 at 05:13:35PM +, Srinivas Kandagatla wrote:
> There are various issues with the examples in this documentation, some
> of the DT labels are invalid and one of the macro THERMAL_NO_LIMITS
> referenced is not available as well.
>
> This patch attempts to fix such errors in t
From: Seungwon Jeon
HS400 timing values are added for SMDK5420, exynos5420-peach-pit
and exynos5800-peach-pi boards.
This also adds RCLK GPIO line, this gpio should be in pull-down
state.
This also enables HS400 on peach-pi and this updates the clock frequency
to 800MHz to be set as input clock t
Hi Mark,
On Tue, Jan 27, 2015 at 7:17 PM, Mark Rutland wrote:
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/bus/simple-pm-bus.txt
>> @@ -0,0 +1,41 @@
>> +Simple Power-Managed Bus
>> +
>> +
>> +A Simple Power-Managed Bus is a transparent bus that doesn't need
In preparation for adding the DT for the nyan-blaze board.
Signed-off-by: Tomeu Vizoso
---
arch/arm/boot/dts/tegra124-nyan-big.dts | 684 +---
arch/arm/boot/dts/tegra124-nyan.dtsi| 676 +++
2 files changed, 683 insertions(+), 677 deleti
Hello Ulf,
On Mon, Jan 19, 2015 at 10:13 AM, Ulf Hansson wrote:
> To add the core part for the MMC power sequence, let's start by adding
> initial support for the simple MMC power sequence provider.
>
> In this initial step, the MMC power sequence node are fetched and the
> compatible string for
Hi Christophe,
sorry to be nitty picky but I still don't get this calculation
+ /* max tpm tx buffer(TPM_BUFSIZE) + max tpm rx buffer(TPM_BUFSIZE / 2)
+ * + MAX_SPI_LATENCY.
+ */
+ phy->spi_xfer.tx_buf = devm_kmalloc(&dev->dev, (TPM_BUFSIZE +
+ (TPM_BUFSIZE / 2) + MAX_SPI_LATENCY),
+ GFP_KERNEL)
On Wed, Jan 21, 2015 at 10:39:05AM +0100, Jacek Anaszewski wrote:
> I agree. I think that led-sources-cnt is redundant. A list property
> can be read using of_prop_next_u32 function. I missed that and thus
> proposed putting led-sources-cnt in each sub-node to be able to read
> led-sources list wit
Hi Jaehoon,
Thanks for review.
On Thu, Jan 22, 2015 at 11:28 AM, Jaehoon Chung wrote:
> Hi.
>
> On 01/21/2015 11:12 PM, Alim Akhtar wrote:
>> Hi Jaehoon
>>
>> On Wed, Jan 21, 2015 at 4:32 AM, Jaehoon Chung
>> wrote:
>>> Hi,
>>>
>>> If you want to enable the hs400 mode, need to add "mmc-hs400-1
From: Stéphane Marchesin
This panel is used by the Nyan Blaze board and supported by the simple-panel
driver.
Signed-off-by: Stéphane Marchesin
[tomeu.viz...@collabora.com: add device tree binding document]
Signed-off-by: Tomeu Vizoso
---
.../bindings/panel/samsung,ltn140at29-301.txt |
Hello!
Jaehoon Chung wrote:
> mmc core supported to hw_reset function.
> So i think we can use it. It's called at only initial time to clear the
> previous status.
> But i think it can be called at reboot time. (it needs to implement codes.)
> how about?
I don't think that's going the work. The p
Hello Ulf,
On Mon, Jan 19, 2015 at 10:13 AM, Ulf Hansson wrote:
> The need for reset GPIOs has several times been pointed out from
> erlier posted patchsets. Especially some WLAN chips which are
> attached to an SDIO interface may use a GPIO reset.
>
> The reset GPIO is asserted at initialization
Hi Roger,
We need to discuss one point about 'id_irqwake'.
I don't recommend to use 'id_irqwake' field.
And I catch build warning by using "select" keywork in Kconfig.
It is my wrong guide of "select" keyword. So, I'll change it
as 'depends on' keyword.
Looks good to me except for 'id_irqwake'.
The Nyan boards have a Marvell 88w8897 wifi card connected through SDIO
that needs the reset line to be asserted before mmc power up and deasserted
afterwards.
This patch also adds references to the power supplies of the card so that
the regulators are enabled when it's probed.
Signed-off-by: Tom
. I have tested that USB2, the panels,
HDMI, the trackpad, Wifi and sound work on both.
The DT for the Big includes the pinmux configuration as generated by
tegra-pinmux-scripts with Simon's patch at:
https://patchwork.ozlabs.org/patch/417779/
These patches are based on top of linux-next 201
Otherwise spi core will refuse to register the device.
Signed-off-by: Tomeu Vizoso
---
arch/arm/boot/dts/tegra124-nyan.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi
b/arch/arm/boot/dts/tegra124-nyan.dtsi
index 632d181..6752e95 100644
--- a/arch/ar
On Wed, Jan 28, 2015 at 5:54 PM, Baruch Siach wrote:
> Hi Lyra Zhang,
>
> On Wed, Jan 28, 2015 at 04:46:33PM +0800, Lyra Zhang wrote:
>> On Wed, Jan 28, 2015 at 2:12 PM, Baruch Siach wrote:
>> > On Wed, Jan 28, 2015 at 10:47:41AM +0800, Chunyan Zhang wrote:
>> >> + if (uart_handle_sys
Add compatible strings for the RTC IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Add compatible strings for the PMC IP block present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
C
On 28 January 2015 at 11:11, Hans de Goede wrote:
> Hi,
>
> On 28-01-15 11:02, Hans de Goede wrote:
>>
>> Hi,
>>
>> On 04-01-15 21:06, Michal Suchanek wrote:
>>>
>>> Signed-off-by: Michal Suchanek
>>
>>
>> Thanks, I've merged this with a number of changes:
>>
>> - Cleaned it up a bit
>> - Ported
Add compatible strings for the HDA IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Add compatible strings for the eFuse IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Add compatible strings for the XUSB pad control IP blocks present on
several Tegra chips. The primary objective here is to avoid
checkpatch warnings, per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: I
Add compatible strings for the SOC_THERM IP block present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Zhang Rui
Cc: Eduardo Valentin
Cc: Rob Herring
Cc: Pawel
Add compatible strings for the AHCI IP blocks present on several Tegra
chips. The primary objective here is to avoid checkpatch warnings,
per:
http://marc.info/?l=linux-tegra&m=142201349727836&w=2
Signed-off-by: Paul Walmsley
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Patches are on its way to add a config file to alsaucm for the Nyan
boards. Use the same card ID that alsaucm will expect.
Signed-off-by: Tomeu Vizoso
---
arch/arm/boot/dts/tegra124-nyan-big.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-ny
On 20/01/15 10:15, Ivan T. Ivanov wrote:
> From: Stanimir Varbanov
>
> The voltage ADC is peripheral of Qualcomm SPMI PMIC chips. It has
> 15bits resolution and register space inside PMIC accessible across
> SPMI bus.
>
> The vadc driver registers itself through IIO interface.
>
> Signed-off-by
On Tue, 27 Jan 2015, Mike Turquette wrote:
> Quoting Lee Jones (2015-01-26 03:14:00)
> > Signed-off-by: Lee Jones
> > ---
> > .../devicetree/bindings/clock/st/st,clk-domain.txt | 34
> > ++
> > 1 file changed, 34 insertions(+)
> > create mode 100644
> > Documentation/devic
From: Joonwoo Park
On newer TLMM hardware blocks the registers are spread and
we need an offsets upper than 16 bits to address them. Increase
the register offset variables to 32 bits size.
Signed-off-by: Joonwoo Park
Signed-off-by: Stanimir Varbanov
Reviewed-by: Bjorn Andersson
---
drivers/p
On 27/01/15 22:42, Arnd Bergmann wrote:
> On Tuesday 27 January 2015 23:36:36 Arnd Bergmann wrote:
>> On Tuesday 27 January 2015 14:19:09 Guenter Roeck wrote:
>>> On Tue, Jan 27, 2015 at 10:29:49PM +0100, Arnd Bergmann wrote:
On Tuesday 27 January 2015 12:52:29 Guenter Roeck wrote:
> Dri
From: Joonwoo Park
Add initial pinctrl driver to support pin configuration with
pinctrl framework for msm8916.
Signed-off-by: Joonwoo Park
Signed-off-by: Stanimir Varbanov
Reviewed-by: Bjorn Andersson
---
drivers/pinctrl/qcom/Kconfig |8 +
drivers/pinctrl/qcom/Makefile
Hi Will,
On Wednesday 28 January 2015 13:32:19 Will Deacon wrote:
> On Wed, Jan 28, 2015 at 01:15:10PM +, Laurent Pinchart wrote:
> > On Wednesday 28 January 2015 12:29:42 Will Deacon wrote:
> >> On Wed, Jan 28, 2015 at 12:23:03PM +, Laurent Pinchart wrote:
> >>> On Wednesday 28 January 20
Adds devicetree binding documentation.
Signed-off-by: Stanimir Varbanov
Reviewed-by: Bjorn Andersson
---
.../bindings/pinctrl/qcom,msm8916-pinctrl.txt | 186
1 files changed, 186 insertions(+), 0 deletions(-)
create mode 100644
Documentation/devicetree/bindings/pinc
Hello Srinivas,
Thanks a lot for your feedback.
On 01/28/2015 03:01 PM, Srinivas Kandagatla wrote:
> Hi Javier,
>
> You are in a lead of 3 hrs from me..
> Surprisingly I send very much same patch just few Mins ago :-)
:-)
I didn't find the posted patch you are referring too though, did you cc
Hi,
On Wed, Jan 28, 2015 at 10:35:01AM +0100, Pavel Machek wrote:
> Nokia N900 contains bluetooth module connected on serial
> port. Unfortunately, serial and bluetooth are rather closely coupled,
> so standard serial driver can not be used, and we really don't want
> /dev/ttyS1 to be published fo
On 01/27, Andy Gross wrote:
> This patch adds automatic configuration for the ADM CRCI muxing required to
> support DMA operations for GSBI clients. The GSBI mode and instance determine
> the correct TCSR ADM CRCI MUX value that must be programmed so that the DMA
> works properly.
>
> Signed-off-
This patch adds reset-gpios property to the eMMC slot, so the MMC driver
is able to properly reset eMMC card on system restart and thus fixes
system hang on software reboot.
Signed-off-by: Marek Szyprowski
---
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 13 -
1 file changed, 12 inse
On 28. Januar 2015 21:36:25 MEZ, Jason Gunthorpe
wrote:
>On Wed, Jan 28, 2015 at 08:13:33PM +0100, RICARD Christophe wrote:
>> Hi Peter,
>>
>> A TPM command can be up to 2048 byte, A TPM response can be up to
>1024 byte.
>> Between command and response, there are latency byte (up to 15
>> usua
- Original Message -
> From: "Brian Norris"
> Sent: Friday, January 23, 2015 2:30:26 AM
>
> On Wed, Jan 14, 2015 at 05:41:49PM -0600, Aaron Sierra wrote:
> > From: Jordan Friendshuh
> >
> > Support the generic nand-ecc-mode, nand-ecc-strength, and
> > nand-ecc-step-size device-tree prop
On 01/27/2015 01:00 AM, Andreas Färber wrote:
> Am 12.01.2015 um 08:27 schrieb Michal Simek:
>> On 01/11/2015 10:38 PM, Linus Walleij wrote:
>>> On Fri, Jan 9, 2015 at 4:43 PM, Soren Brinkmann
>>> wrote:
>>>
Add pinctrl descriptions to the zc702 and zc706 device trees.
Signed-off-by
Changes since v1:
- correct the subject and description in 1/3
- not break the fields in msm8916_groups[] array in 3/3
- added Reviewed-by tags on all three patches
---
This series adds a pinctrl driver for Snapdragon
On 28 January 2015 at 14:59, Marek Szyprowski wrote:
> There are boards (like Hardkernel's Odroid boards) on which eMMC card's
> reset line is connected to GPIO line instead of the hardware reset
> logic. In case of such boards, if first stage of bootloader is loaded
> from such eMMC card, before
On 20/01/15 10:15, Ivan T. Ivanov wrote:
> From: Stanimir Varbanov
>
> Document DT binding for Qualcomm SPMI PMIC voltage ADC
> driver.
>
> Signed-off-by: Stanimir Varbanov
> Signed-off-by: Ivan T. Ivanov
Given the only changes since the previous version (back in
November are trivial typo corr
There are various issues with the examples in this documentation, some
of the DT labels are invalid and one of the macro THERMAL_NO_LIMITS
referenced is not available as well.
This patch attempts to fix such errors in the documentation.
Signed-off-by: Srinivas Kandagatla
---
Changes Since v1:
On Wednesday 28 January 2015 10:27:00 Zubair Lutfullah Kakakhel wrote:
>
> There is on-going work to fix jz4740, add jz4780 and shake the entire clock
> tree as well.
>
> Patch 14 onwards in this series
> http://patchwork.linux-mips.org/bundle/paulburton/ci20-v3.20/
Right, that looks good.
>
From: Shaohui Xie
This binding is for FMan MDIO, it covers FMan v2 & FMan v3.
Signed-off-by: Shaohui Xie
---
changes for V4:
revised MDIO interrupt related statement.
changes in v3:
rephrase the 'Definition' of property 'bus-frequency', don't include the
property in example.
changes in v2:
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