On 02/18/2015 11:47 PM, Pavel Machek wrote:
On Wed 2015-02-18 17:20:22, Jacek Anaszewski wrote:
Add a documentation of LED Flash class specific sysfs attributes.
Signed-off-by: Jacek Anaszewski j.anaszew...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Bryan Wu
Hi Lee,
On Wed, Feb 18, 2015 at 10:54 PM, Lee Jones lee.jo...@linaro.org wrote:
+Some hardware is contains bunches of clocks which must never be
+turned off. If drivers a) fail to obtain a reference to any of
+these or b) give up a previously obtained reference during suspend,
+the
On Wed, Feb 18, 2015 at 11:47:47PM +0100, Pavel Machek wrote:
On Wed 2015-02-18 17:20:22, Jacek Anaszewski wrote:
Add a documentation of LED Flash class specific sysfs attributes.
Signed-off-by: Jacek Anaszewski j.anaszew...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
If master clock is provided through device tree, then update
the master clock frequency during set_sysclk.
Cc: Tushar Behera tushar.beh...@linaro.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
sound/soc/codecs/max98088.c | 24
1 file changed, 24 insertions(+)
This patch changes the dtc grammar to allow following syntax
i2cexp: i2c2 {
...
};
Current device tree compiler allows to define multiple labels when defining
the device node the first time. Typically device nodes are defined in
DTSI files. Now these nodes can be overwritten for updating
Hello Andreas,
We already talked over irc but for completeness I'll comment here
as well.
On 02/19/2015 07:54 PM, Andreas Färber wrote:
Am 19.02.2015 um 19:40 schrieb Andreas Färber:
Am 19.02.2015 um 18:48 schrieb Doug Anderson:
On Thu, Feb 19, 2015 at 6:13 AM, Andreas Färber afaer...@suse.de
Hi Lee,
On Thu, Feb 19, 2015 at 10:42 AM, Lee Jones lee.jo...@linaro.org wrote:
What kind of clocks are these? What do they control?
Memory controllers? Bus controllers?
They must control some device(s), so there should be one or more device
nodes in DT that reference these clocks.
As soon
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
On Thu, Feb 19, 2015 at 11:43 AM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
On Thu, Feb 19, 2015 at 11:28 AM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
On
Hi Lee,
On Thu, Feb 19, 2015 at 11:28 AM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
On Thu, Feb 19, 2015 at 11:11 AM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
On Thu, Feb 19, 2015 at 10:42 AM, Lee Jones
On Thu, Feb 19, 2015 at 01:16:50AM +, Rafael J. Wysocki wrote:
On Monday, February 16, 2015 12:23:43 PM Mark Rutland wrote:
[...]
The suspend part is kind of a distraction to me here, because that
really
only is about sharing an IRQ with a timer and the your interrupt
Hello Andreas,
On 02/18/2015 05:17 PM, Andreas Färber wrote:
Configure the pins in external interrupt mode, as done for Snow in
e5e5c6d14e39 (ARM: dts: Add power and lid GPIO keys pinctrl for
exynos5250-snow).
Reported-by: Kukjin Kim kg...@kernel.org
Suggested-by: Javier Martinez Canillas
On Wed, Feb 18, 2015 at 07:25:58PM +0100, Andreas Färber wrote:
static const struct of_device_id snow_of_match[] = {
+ { .compatible = google,snow-audio-max98089, },
{ .compatible = google,snow-audio-max98090, },
{ .compatible = google,snow-audio-max98091, },
{
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
Hi Lee,
On Thu, Feb 19, 2015 at 10:42 AM, Lee Jones lee.jo...@linaro.org wrote:
What kind of clocks are these? What do they control?
Memory controllers? Bus controllers?
They must control some device(s), so there should be one or more
Hi Lee,
On Thu, Feb 19, 2015 at 11:11 AM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
On Thu, Feb 19, 2015 at 10:42 AM, Lee Jones lee.jo...@linaro.org wrote:
What kind of clocks are these? What do they control?
Memory controllers? Bus controllers?
Hi Baruch,
On Thu, 19 Feb 2015 11:43:01 +0200
Baruch Siach bar...@tkos.co.il wrote:
Hi Boris,
On Thu, Feb 19, 2015 at 12:17:04AM +0100, Boris Brezillon wrote:
On Thu, 12 Feb 2015 13:10:19 +0200
Baruch Siach bar...@tkos.co.il wrote:
This commit adds driver for the NAND flash controller
Hello Andreas,
On 02/18/2015 05:10 PM, Andreas Färber wrote:
Resolve a merge conflict with mmc refactoring aaa25a5a33cb (ARM: dts:
unuse the slot-node and deprecate the supports-highspeed for dw-mmc in
exynos) by dropping the slot@0 nodes, moving its bus-width property to
the mmc node and
Hi Boris,
On Thu, Feb 19, 2015 at 12:17:04AM +0100, Boris Brezillon wrote:
On Thu, 12 Feb 2015 13:10:19 +0200
Baruch Siach bar...@tkos.co.il wrote:
This commit adds driver for the NAND flash controller on the CX92755 SoC.
This
SoC is one of the Conexant Digicolor series, and this driver
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
On Wed, Feb 18, 2015 at 10:54 PM, Lee Jones lee.jo...@linaro.org wrote:
+Some hardware is contains bunches of clocks which must never be
+turned off. If drivers a) fail to obtain a reference to any of
+these or b) give up a previously
Hi Mark,
On Thu, Feb 19, 2015 at 11:33 AM, Mark Brown broo...@kernel.org wrote:
On Tue, Feb 17, 2015 at 03:18:40PM +0100, Geert Uytterhoeven wrote:
On Tue, Feb 17, 2015 at 3:01 PM, Mark Brown broo...@kernel.org wrote:
On Tue, Feb 17, 2015 at 01:11:12PM +0100, Geert Uytterhoeven wrote:
-
Hi Lee,
On Thu, Feb 19, 2015 at 11:43 AM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
On Thu, Feb 19, 2015 at 11:28 AM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
On Thu, Feb 19, 2015 at 11:11 AM, Lee Jones
On Wed, 18 Feb 2015, Rob Herring wrote:
On Wed, Feb 18, 2015 at 3:54 PM, Lee Jones lee.jo...@linaro.org wrote:
On Wed, 18 Feb 2015, Rob Herring wrote:
On Wed, Feb 18, 2015 at 11:12 AM, Lee Jones lee.jo...@linaro.org wrote:
On Wed, 18 Feb 2015, Rob Herring wrote:
On Wed, Feb 18,
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
Hi Lee,
On Thu, Feb 19, 2015 at 11:11 AM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
On Thu, Feb 19, 2015 at 10:42 AM, Lee Jones lee.jo...@linaro.org wrote:
What kind of clocks are these? What do
On Tue, Feb 17, 2015 at 03:18:40PM +0100, Geert Uytterhoeven wrote:
Hi Mark,
On Tue, Feb 17, 2015 at 3:01 PM, Mark Brown broo...@kernel.org wrote:
On Tue, Feb 17, 2015 at 01:11:12PM +0100, Geert Uytterhoeven wrote:
- Does there exist any regulator notifier event that corresponds to
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
Hi Lee,
On Thu, Feb 19, 2015 at 11:28 AM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 19 Feb 2015, Geert Uytterhoeven wrote:
On Thu, Feb 19, 2015 at 11:11 AM, Lee Jones lee.jo...@linaro.org wrote:
On Thu, 19 Feb 2015, Geert Uytterhoeven
Am 19.02.2015 um 10:44 schrieb Mark Brown:
On Wed, Feb 18, 2015 at 07:25:58PM +0100, Andreas Färber wrote:
static const struct of_device_id snow_of_match[] = {
+{ .compatible = google,snow-audio-max98089, },
{ .compatible = google,snow-audio-max98090, },
{ .compatible =
On 02/17/2015 08:17 PM, Pavel Machek wrote:
On Tue 2015-02-17 11:07:53, Rob Landley wrote:
On 02/15/2015 04:40 PM, Pavel Machek wrote:
On Wed 2015-01-21 13:27:00, Jason Gunthorpe wrote:
On Wed, Jan 21, 2015 at 06:33:12PM +0200, Pantelis Antoniou wrote:
My point is that the current firmware
Hello Andreas,
On 02/18/2015 07:25 PM, Andreas Färber wrote:
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/sound/max98088.txt | 16
1 file changed, 16 insertions(+)
create mode 100644
From: Ryo Kataoka ryo.kataoka...@renesas.com
Signed-off-by: Ryo Kataoka ryo.kataoka...@renesas.com
Signed-off-by: Yoshihiro Kaneko ykaneko0...@gmail.com
---
This patch is based on devel branch of Simon Horman's renesas tree.
arch/arm/boot/dts/r8a7791.dtsi | 2 +-
1 file changed, 1
On 1/31/2015 10:36 PM, Ravikumar Kattekola wrote:
Fix bypass clock source for a few DPLLs.
On DRA7x/OMAP5, for a few DPLLs, both CLKINP and CLKINPULOW are connected
to a mux and the output from mux is routed to the bypass clkout.
Add a mux-clock as bypass clock with CLKINP and CLKINPULOW as
On Tue, Jan 27, 2015 at 12:33:26PM +0530, Pranavkumar Sawargaonkar wrote:
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page
size due to size alignment checking in vgic driver for VCPU Control
Hi Mark,
On Feb 18, 2015, at 19:31 , Mark Rutland mark.rutl...@arm.com wrote:
+While this may in theory work, in practice it is very cumbersome
+for the following reasons:
+
+1. The act of selecting a different boot device tree blob requires
+a reasonably advanced bootloader with some
On Thu, 2015-02-19 at 19:38 +0200, Pantelis Antoniou wrote:
Having to boot and tweak the bootloader settings to select the correct
dtb (even if it’s present on the flash medium) takes time and is
error-prone.
Dedicate a set of GPIO for board/PCB revision detection (it only costs a
few
On Thu, 2015-02-19 at 19:12 +0100, Sylvain Rochet wrote:
Or use a 1-wire or I2C EEPROM to store your board information.
no, you don't reduce the human error probability.
eeprom needs to be preprogrammed, factory will at some point have a lot
of eeprom with different version, and will
On Tue, Jan 27, 2015 at 1:03 AM, Pranavkumar Sawargaonkar
psawargaon...@apm.com wrote:
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page
size due to size alignment checking in vgic driver for
Hi Tony,
On Feb 19, 2015, at 20:16 , Tony Lindgren t...@atomide.com wrote:
* Pantelis Antoniou pantelis.anton...@konsulko.com [150218 07:03]:
Implement DT quirks for the am33xx beaglebone boards.
--- /dev/null
+++ b/arch/arm/mach-omap2/am33xx-dt-quirks.c
...
+
+/*
+ * The board IDs for
Am 19.02.2015 um 19:40 schrieb Andreas Färber:
Am 19.02.2015 um 18:48 schrieb Doug Anderson:
On Thu, Feb 19, 2015 at 6:13 AM, Andreas Färber afaer...@suse.de wrote:
I see that a master clock (mclk) is added in patch 6/6 but the
max98088 codec driver does handle this clock.
If the SoC XCLKOUT
Andreas,
On Thu, Feb 19, 2015 at 9:56 AM, Andreas Färber afaer...@suse.de wrote:
Am 19.02.2015 um 18:44 schrieb Doug Anderson:
On Thu, Feb 19, 2015 at 1:44 AM, Mark Brown broo...@kernel.org wrote:
On Wed, Feb 18, 2015 at 07:25:58PM +0100, Andreas Färber wrote:
static const struct
On Thu, Feb 19, 2015 at 05:08:28PM +, Srinivas Kandagatla wrote:
From: Maxime Ripard maxime.rip...@free-electrons.com
Up until now, EEPROM drivers were stored in drivers/misc, where they all had
to
duplicate pretty much the same code to register a sysfs file, allow in-kernel
users to
On Thu, Feb 19, 2015 at 12:01:14PM -0600, Rob Herring wrote:
On Wed, Feb 18, 2015 at 8:08 PM, Frank Rowand frowand.l...@gmail.com wrote:
On 2/18/2015 6:59 AM, Pantelis Antoniou wrote:
Implement a method of applying DT quirks early in the boot sequence.
A DT quirk is a subtree of the boot
* Pantelis Antoniou pa...@antoniou-consulting.com [150219 10:32]:
On Feb 19, 2015, at 20:16 , Tony Lindgren t...@atomide.com wrote:
Uhh I don't like the idea of duplicating the i2c-omap.c driver under
arch/arm.. And in general we should initialize things later rather
than earlier.
Am 19.02.2015 um 18:48 schrieb Doug Anderson:
On Thu, Feb 19, 2015 at 6:13 AM, Andreas Färber afaer...@suse.de wrote:
I see that a master clock (mclk) is added in patch 6/6 but the
max98088 codec driver does handle this clock.
If the SoC XCLKOUT provides the master clock to the max98089
* Pantelis Antoniou pantelis.anton...@konsulko.com [150218 07:03]:
Implement DT quirks for the am33xx beaglebone boards.
--- /dev/null
+++ b/arch/arm/mach-omap2/am33xx-dt-quirks.c
...
+
+/*
+ * The board IDs for am33xx board are in an I2C EEPROM
+ * We are very early in the boot process so
On Thu, Feb 19, 2015 at 12:23:15PM -0600, Rob Herring wrote:
On Tue, Jan 27, 2015 at 1:03 AM, Pranavkumar Sawargaonkar
psawargaon...@apm.com wrote:
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is built with
Hello,
On Thu, Feb 19, 2015 at 07:01:59PM +0100, Maxime Bizon wrote:
On Thu, 2015-02-19 at 19:38 +0200, Pantelis Antoniou wrote:
Having to boot and tweak the bootloader settings to select the correct
dtb (even if it’s present on the flash medium) takes time and is
error-prone.
Hi Tony,
On Feb 19, 2015, at 20:36 , Tony Lindgren t...@atomide.com wrote:
* Pantelis Antoniou pa...@antoniou-consulting.com [150219 10:32]:
On Feb 19, 2015, at 20:16 , Tony Lindgren t...@atomide.com wrote:
Uhh I don't like the idea of duplicating the i2c-omap.c driver under
arch/arm..
On Thu, Feb 19, 2015 at 10:36:00AM -0800, Tony Lindgren wrote:
* Pantelis Antoniou pa...@antoniou-consulting.com [150219 10:32]:
On Feb 19, 2015, at 20:16 , Tony Lindgren t...@atomide.com wrote:
Uhh I don't like the idea of duplicating the i2c-omap.c driver under
arch/arm.. And in
On 02/19/2015 08:55 PM, Simon Horman wrote:
Define the generic R8A7794 part of the MMCIF0 device node.
Based on the orginal patch by Shinobu Uehara shinobu.uehara...@renesas.com.
Signed-off-by: Sergei Shtylyov sergei.shtyl...@cogentembedded.com
---
arch/arm/boot/dts/r8a7794.dtsi |
On 01/06/2015 01:22 AM, Sergei Shtylyov wrote:
Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20141231-v3.19-rc2' tag. Here we add the CAN device tree support
for the R8A7791-based Henninger board. It depends on the clk driver RCAN clock
patch reposted
On 01/06/2015 12:31 AM, Sergei Shtylyov wrote:
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20141231-v3.19-rc2' tag. Here we add the CAN device tree support
for the R8A7790 SoC (unfortunately, it's impossible to test CAN on the Lager
board). It
On Wed, Feb 18, 2015 at 11:23:42AM -0600, Benoit Parrot wrote:
Gentle ping.
Is there any chance this will make it in 3.21?
Benoit
Is there a reason that the pin has to be hogged?
Couldn't the pin be released after configuration for eventual use in the
userspace?
Parrot, Benoit
On Thu, Feb 19, 2015 at 11:02:04AM +0200, Sakari Ailus wrote:
On Wed, Feb 18, 2015 at 11:47:47PM +0100, Pavel Machek wrote:
On Wed 2015-02-18 17:20:22, Jacek Anaszewski wrote:
Add a documentation of LED Flash class specific sysfs attributes.
Signed-off-by: Jacek Anaszewski
On Fri, Feb 20, 2015 at 12:43:33AM +0300, Sergei Shtylyov wrote:
On 01/06/2015 12:31 AM, Sergei Shtylyov wrote:
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20141231-v3.19-rc2' tag. Here we add the CAN device tree
support
for the R8A7790 SoC
On Thursday, February 19, 2015 11:23:46 AM Mark Rutland wrote:
On Thu, Feb 19, 2015 at 01:16:50AM +, Rafael J. Wysocki wrote:
On Monday, February 16, 2015 12:23:43 PM Mark Rutland wrote:
[...]
The suspend part is kind of a distraction to me here, because that
really
On Fri, Feb 20, 2015 at 12:44:26AM +0300, Sergei Shtylyov wrote:
On 01/06/2015 01:22 AM, Sergei Shtylyov wrote:
Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20141231-v3.19-rc2' tag. Here we add the CAN device tree
support
for the R8A7791-based
Am Freitag, 12. Dezember 2014, 23:00:08 schrieb Yunzhi Li:
Patches to add support for Rockchip usb phys.Add a new Rockchip
usb phy driver and modify dwc2 controller driver to make dwc2
platform devices support a generic PHY framework driver. This
patch set has been tested on my rk3288-evb and
On 02/20/2015 01:13 AM, Simon Horman wrote:
Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20141231-v3.19-rc2' tag. Here we add the CAN device tree support
for the R8A7791-based Henninger board. It depends on the clk driver RCAN clock
patch reposted
Addy,
Your subject needs work. It should at least touch on what the bug
was. Please use a subject more like:
mmc: dw_mmc: fix mmc_test by not sending abort for DRTO / EBE errors
On Mon, Jan 26, 2015 at 4:04 AM, Addy Ke addy...@rock-chips.com wrote:
The STOP command can terminate a data
On Tue, Feb 17, 2015 at 9:52 PM, Marek Belisko ma...@goldelico.com wrote:
From: H. Nikolaus Schaller h...@goldelico.com
This device tree allows to boot, supports the panel,
framebuffer, touch screen, as well as some more peripherals.
Since there is a OMAP3530 based 600 MHz variant and a
On Sat, Feb 14, 2015 at 02:21:52PM +, Appana Durga Kedareswara Rao wrote:
Hi Vinod,
-Original Message-
From: Vinod Koul [mailto:vinod.k...@intel.com]
Sent: Thursday, February 12, 2015 3:05 PM
To: Appana Durga Kedareswara Rao
Cc: Arnd Bergmann;
On 02/19/2015 10:40 PM, Greg KH wrote:
On Thu, Feb 19, 2015 at 11:02:04AM +0200, Sakari Ailus wrote:
On Wed, Feb 18, 2015 at 11:47:47PM +0100, Pavel Machek wrote:
On Wed 2015-02-18 17:20:22, Jacek Anaszewski wrote:
Add a documentation of LED Flash class specific sysfs attributes.
On Fri, Feb 20, 2015 at 11:07:21AM +0800, zhangfei wrote:
Hi, Balbi
On 02/18/2015 10:35 PM, Felipe Balbi wrote:
On Wed, Feb 18, 2015 at 01:44:21PM +0800, zhangfei wrote:
Hi, Kishon
On 02/18/2015 01:35 PM, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 12 February 2015 01:07 PM,
On Thu, Feb 19, 2015 at 2:23 AM, Benoit Parrot bpar...@ti.com wrote:
Gentle ping.
Is there any chance this will make it in 3.21?
I'm good with it - Linus will probably come to it after the 3.20 merge
window closes.
--
To unsubscribe from this list: send the line unsubscribe devicetree in
the
It's interrupt-names, not interrupts-names.
Signed-off-by: Jassi Brar jaswinder.si...@linaro.org
---
arch/arm/boot/dts/stih407-pinctrl.dtsi | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi
Am Montag, 26. Januar 2015, 02:22:55 schrieb Heiko Stübner:
Am Sonntag, 25. Januar 2015, 21:39:33 schrieb FUKAUMI Naoki:
This series adds support for following Rockchip SoC based boards.
- Firefly, Firefly-RK3288 (both beta and mass production version)
- ChipSPARK, Rayeager PX2
I've
On 02/19/15 09:08, Srinivas Kandagatla wrote:
diff --git a/drivers/Kconfig b/drivers/Kconfig
index c70d6e4..d7afc82 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -184,4 +184,6 @@ source drivers/thunderbolt/Kconfig
source drivers/android/Kconfig
+source drivers/eeprom/Kconfig
Hi Rob,
2015-02-15 23:42 GMT+01:00 Rob Herring robherri...@gmail.com:
On Fri, Feb 13, 2015 at 2:42 AM, Maxime Coquelin
mcoquelin.st...@gmail.com wrote:
Hi Geert,
2015-02-12 21:34 GMT+01:00 Geert Uytterhoeven ge...@linux-m68k.org:
On Thu, Feb 12, 2015 at 6:45 PM, Maxime Coquelin
On 2/19/2015 6:41 AM, Pantelis Antoniou wrote:
Hi Frank,
On Feb 19, 2015, at 04:08 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/18/2015 6:59 AM, Pantelis Antoniou wrote:
Implement a method of applying DT quirks early in the boot sequence.
A DT quirk is a subtree of the boot DT that
When running with device-tree, we no longer have a board file
that can set up the platform data for wlcore.
Allow this data to be passed from DT.
For now, parse only the irq used. Other (optional) properties
can be added later on.
Signed-off-by: Ido Yariv i...@wizery.com
Signed-off-by: Eliad
Add device tree binding documentation for TI's wl18xx
wlan chip.
Signed-off-by: Eliad Peller el...@wizery.com
---
v3:
* make the bindings device-specific (wl18xx) (Arnd, Mark)
* split bindings and driver changes (Arnd)
* make interrupt-parent optional (Arnd)
* make unit-address same as reg
On Thu, Feb 19, 2015 at 10:13 AM, Maxime Coquelin
mcoquelin.st...@gmail.com wrote:
Hi Rob,
2015-02-15 23:42 GMT+01:00 Rob Herring robherri...@gmail.com:
On Fri, Feb 13, 2015 at 2:42 AM, Maxime Coquelin
mcoquelin.st...@gmail.com wrote:
Hi Geert,
2015-02-12 21:34 GMT+01:00 Geert Uytterhoeven
On Tue, Feb 17, 2015 at 01:59:02AM +0300, Sergei Shtylyov wrote:
Define the generic R8A7794 part of the MMCIF0 device node.
Based on the orginal patch by Shinobu Uehara shinobu.uehara...@renesas.com.
Signed-off-by: Sergei Shtylyov sergei.shtyl...@cogentembedded.com
---
This patch adds QFPROM support driver which is used by other drivers
like thermal sensor and cpufreq.
On MSM parts there are some efuses (called qfprom) these fuses store things like
calibration data, speed bins.. etc. Drivers like cpufreq, thermal sensors would
read out this data for configuring
From: Maxime Ripard maxime.rip...@free-electrons.com
Now that we have the EEPROM framework, we can consolidate the common driver
code. Move the driver to the framework, and hopefully, it will fix the sysfs
file creation race.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
From: Maxime Ripard maxime.rip...@free-electrons.com
Up until now, EEPROM drivers were stored in drivers/misc, where they all had to
duplicate pretty much the same code to register a sysfs file, allow in-kernel
users to access the content of the devices they were driving, etc.
This was also a
This patchset adds a new simple EEPROM framework to kernel.
Up until now, EEPROM drivers were stored in drivers/misc, where they all had to
duplicate pretty much the same code to register a sysfs file, allow in-kernel
users to access the content of the devices they were driving, etc.
This
On 19/02/15 16:10, Jassi Brar wrote:
On 18 February 2015 at 16:07, Sudeep Holla sudeep.ho...@arm.com wrote:
+++ b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt
@@ -0,0 +1,35 @@
+ARM MHU Mailbox Driver
+==
+
+The ARM's Message-Handling-Unit (MHU) is a mailbox
On 2/19/2015 9:00 AM, Pantelis Antoniou wrote:
Hi Frank,
On Feb 19, 2015, at 18:48 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 6:29 AM, Pantelis Antoniou wrote:
Hi Mark,
On Feb 18, 2015, at 19:31 , Mark Rutland mark.rutl...@arm.com wrote:
+While this may in theory work, in
Hello Javier, Doug,
Am 19.02.2015 um 14:55 schrieb Javier Martinez Canillas:
On 02/18/2015 07:25 PM, Andreas Färber wrote:
Signed-off-by: Andreas Färber afaer...@suse.de
---
Documentation/devicetree/bindings/sound/max98088.txt | 16
1 file changed, 16 insertions(+)
create
Hi Frank,
On Feb 19, 2015, at 04:08 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/18/2015 6:59 AM, Pantelis Antoniou wrote:
Implement a method of applying DT quirks early in the boot sequence.
A DT quirk is a subtree of the boot DT that can be applied to
a target in the base DT
Hello Andreas,
On 02/18/2015 07:25 PM, Andreas Färber wrote:
Signed-off-by: Andreas Färber afaer...@suse.de
---
arch/arm/boot/dts/exynos5250-spring.dts | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-spring.dts
Offset for smc91x must be zero otherwise smc91x linux kernel driver does not
detect smc91x ethernet hardware in qemu N900 machine.
Signed-off-by: Pali Rohár pali.ro...@gmail.com
---
arch/arm/boot/dts/omap3-n900.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 2/19/2015 8:40 AM, Frank Rowand wrote:
On 2/19/2015 6:41 AM, Pantelis Antoniou wrote:
Hi Frank,
On Feb 19, 2015, at 04:08 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/18/2015 6:59 AM, Pantelis Antoniou wrote:
Implement a method of applying DT quirks early in the boot sequence.
A
On 2/19/2015 6:29 AM, Pantelis Antoniou wrote:
Hi Mark,
On Feb 18, 2015, at 19:31 , Mark Rutland mark.rutl...@arm.com wrote:
+While this may in theory work, in practice it is very cumbersome
+for the following reasons:
+
+1. The act of selecting a different boot device tree blob requires
Hi Frank,
On Feb 19, 2015, at 18:48 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 6:29 AM, Pantelis Antoniou wrote:
Hi Mark,
On Feb 18, 2015, at 19:31 , Mark Rutland mark.rutl...@arm.com wrote:
+While this may in theory work, in practice it is very cumbersome
+for the
Hello.
On 02/19/2015 07:10 PM, Simon Horman wrote:
Define the generic R8A7794 part of the MMCIF0 device node.
Based on the orginal patch by Shinobu Uehara shinobu.uehara...@renesas.com.
Signed-off-by: Sergei Shtylyov sergei.shtyl...@cogentembedded.com
---
On Feb 19, 2015, at 19:30 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 9:00 AM, Pantelis Antoniou wrote:
Hi Frank,
On Feb 19, 2015, at 18:48 , Frank Rowand frowand.l...@gmail.com wrote:
On 2/19/2015 6:29 AM, Pantelis Antoniou wrote:
Hi Mark,
On Feb 18, 2015, at 19:31 ,
Mark,
On Thu, Feb 19, 2015 at 1:44 AM, Mark Brown broo...@kernel.org wrote:
On Wed, Feb 18, 2015 at 07:25:58PM +0100, Andreas Färber wrote:
static const struct of_device_id snow_of_match[] = {
+ { .compatible = google,snow-audio-max98089, },
{ .compatible =
Andreas,
On Thu, Feb 19, 2015 at 6:13 AM, Andreas Färber afaer...@suse.de wrote:
I see that a master clock (mclk) is added in patch 6/6 but the
max98088 codec driver does handle this clock.
If the SoC XCLKOUT provides the master clock to the max98089
codec in Spring like is the case for the
On Thu, Feb 19, 2015 at 08:02:56PM +0300, Sergei Shtylyov wrote:
Hello.
On 02/19/2015 07:10 PM, Simon Horman wrote:
Define the generic R8A7794 part of the MMCIF0 device node.
Based on the orginal patch by Shinobu Uehara
shinobu.uehara...@renesas.com.
Signed-off-by: Sergei Shtylyov
Am 19.02.2015 um 18:44 schrieb Doug Anderson:
On Thu, Feb 19, 2015 at 1:44 AM, Mark Brown broo...@kernel.org wrote:
On Wed, Feb 18, 2015 at 07:25:58PM +0100, Andreas Färber wrote:
static const struct of_device_id snow_of_match[] = {
+ { .compatible = google,snow-audio-max98089, },
On Wed, Feb 18, 2015 at 8:08 PM, Frank Rowand frowand.l...@gmail.com wrote:
On 2/18/2015 6:59 AM, Pantelis Antoniou wrote:
Implement a method of applying DT quirks early in the boot sequence.
A DT quirk is a subtree of the boot DT that can be applied to
a target in the base DT resulting in a
Am 19.02.2015 um 21:48 schrieb Javier Martinez Canillas:
On 02/19/2015 07:54 PM, Andreas Färber wrote:
Am 19.02.2015 um 19:40 schrieb Andreas Färber:
I updated max98088 and had it working on first boot, but on
second boot it complained about the frequency:
[7.896834] max98088 7-0010:
On 02/03/15 04:17, Ivan T. Ivanov wrote:
Following set of patches add initial DT support for PMIC devices
found on recent Quqalcomm chipsets. Details for SPMI bus and PMIC arbiter
could be found here [1].
Can you please put the specific compatible strings for the pmic model
into the nodes in
On 02/19/2015 04:04 PM, Eric Nelson wrote:
Enable HDMI channel and the I2C port it uses for DDC.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 19 +++
1 file changed, 19 insertions(+)
Nak.
An earlier patch set
Hi, Balbi
On 02/18/2015 10:35 PM, Felipe Balbi wrote:
On Wed, Feb 18, 2015 at 01:44:21PM +0800, zhangfei wrote:
Hi, Kishon
On 02/18/2015 01:35 PM, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 12 February 2015 01:07 PM, Zhangfei Gao wrote:
Add usb phy controller for hi6220 platform
The Boundary Devices Nitrogen6x board supports three companion displays:
Okaya 1024x600
Hannstar 1024x768
LG 1280x800
This patch adds timing entries into the LDB device tree and aliases
for them and HDMI to make it easy for the boot loader to configure them.
The BD-SL-i.MX6 (SABRE Lite board) supports three companion displays:
Okaya 1024x600
Hannstar 1024x768
LG 1280x800
This patch adds timing entries into the LDB device tree and aliases
for them and HDMI to make it easy for the boot loader to configure them.
Signed-off-by:
On 02/20/2015 12:48 AM, Andreas Färber wrote:
If master clock is provided through device tree, then update
the master clock frequency during set_sysclk.
Cc: Tushar Behera tushar.beh...@linaro.org
Signed-off-by: Andreas Färber afaer...@suse.de
---
sound/soc/codecs/max98088.c | 24
Enable HDMI channel and the I2C port it uses for DDC.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
On Tue, Feb 17, 2015 at 9:52 PM, Marek Belisko ma...@goldelico.com wrote:
changes from v1:
- add new boards to makefile in patch 2,3 (don't add them
in separate commit together), fix gpmc issues (reported by Tony Lindgren)
- fix various issues reported by Grazvydas Ignotas
(drop internal
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