On 10.04.2015 [14:37:19 +0300], Konstantin Khlebnikov wrote:
On 10.04.2015 01:58, Tanisha Aravamudan wrote:
On 09.04.2015 [07:27:28 +0300], Konstantin Khlebnikov wrote:
On Thu, Apr 9, 2015 at 2:07 AM, Nishanth Aravamudan
n...@linux.vnet.ibm.com wrote:
On 08.04.2015 [20:04:04 +0300],
On 04/10/15 12:39, Srinivas Kandagatla wrote:
On 10/04/15 18:04, Stephen Boyd wrote:
On 04/10/15 05:34, Srinivas Kandagatla wrote:
@@ -250,6 +265,18 @@
};
};
+ext_3p3v: regulator-fixed@1 {
+compatible = regulator-fixed;
+
Hi Tony,
On Tue, Mar 17, 2015 at 2:23 AM, Tony Lindgren t...@atomide.com wrote:
* Lad, Prabhakar prabhakar.cse...@gmail.com [150316 18:20]:
Hi Tony,
On Mon, Mar 16, 2015 at 10:17 PM, Tony Lindgren t...@atomide.com wrote:
* Lad Prabhakar prabhakar.cse...@gmail.com [150312 16:38]:
From:
On 10/04/15 21:21, Stephen Boyd wrote:
On 04/10/15 12:39, Srinivas Kandagatla wrote:
On 10/04/15 18:04, Stephen Boyd wrote:
On 04/10/15 05:34, Srinivas Kandagatla wrote:
@@ -250,6 +265,18 @@
};
};
+ext_3p3v: regulator-fixed@1 {
+compatible =
This patch adds rpm node to apq8064 dt as rpm would be used by other
devices for regulator support.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 24
1 file changed, 24 insertions(+)
diff --git
Thanks all for reviewing v2 patches.
Hi Kumar,
Now that the rpm redesign dependency is resolved, If its not too late could you
queue these dt patches for v4.1-rc1 or v4.1-rc2.
I tested these patches on APQ8064 based IFC6410 and CMQS600 board with SATA/USB.
I also rebased these patches on top
From: Abhimanyu Kapur abhim...@codeaurora.org
Move the secondary_pen_release variable and the secondary_holding_pen
entry function to asm/smp_plat.h so that the other cpu ops implementations
can share them.
Signed-off-by: Abhimanyu Kapur abhim...@codeaurora.org
Signed-off-by: Kumar Gala
From: Nicolas Dechesne nicolas.deche...@linaro.org
This patch adds USB OTG support on USB1 for Compulab QS-600 Board.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
[Srinivas Kandagatla: fixed up regulators and status properties]
Signed-off-by: Nicolas Dechesne
From: Nicolas Dechesne nicolas.deche...@linaro.org
This patch adds device tree nodes to support two usb hosts on Compulab QS600
board.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
[Srinivas Kandagatla: fixed up regulators and status properties]
Signed-off-by: Nicolas
I2C1 pinctrl is not really specific to a board, moving to SOC dtsi would
avoid redefining this in every board.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 7 ---
arch/arm/boot/dts/qcom-apq8064.dtsi| 7 +++
2
This patch adds i2c3 node which is used for panel control on IFC6410.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 10 ++
arch/arm/boot/dts/qcom-apq8064.dtsi| 27 +++
2 files changed, 37
This patch adds basic regulator support for USB and HDMI.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 61 +
1 file changed, 61 insertions(+)
diff --git
This patch adds device tree nodes to support two usb hosts on APQ8064
SOC.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 22 ++
arch/arm/boot/dts/qcom-apq8064.dtsi| 47 ++
2 files
This patch set adds support for SMP boot on the MSM8x16 family of Qualcomm SoCs.
To support SMP on the MSM8x16 SoCs we need to add ARMv8/64-bit SCM interfaces to
setup the boot/release addresses for the secondary CPUs. In addition we need
a uniquie set of cpu ops. I'm aware the desired methods
This patch adds USB OTG support on USB1 of APQ8064 SOC.
Tested on IFC6410 with ethernet gadget.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 17
arch/arm/boot/dts/qcom-apq8064.dtsi| 32
This patch adds AHCI based SATA controller support to APQ8064.
Tested on IFC6410 board.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 9
arch/arm/boot/dts/qcom-apq8064.dtsi| 35 ++
From: Abhimanyu Kapur abhim...@codeaurora.org
Add qcom cpu operations for arm-v8 cpus. Implement secondary cpu boot ops
As a part of this change update device tree documentation for:
1. Arm cortex-a ACC device which provides percpu reg
2. Armv8 cortex-a compatible string in arm/cpus.txt
From: Pramod Gurav pramod.gu...@smartplayin.com
Define an alias for serial port present on ifc6410 which is used as
console.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
[Srinivas Kandagatla: renamed the serial0 label appropriately]
Signed-off-by: Pramod Gurav
This patch adds support to basic regulators wiredup on IFC6410 board.
All these regulators are tested as part of USB, SATA and HDMI.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 67 ++
1 file
Quoting Vincent Yang (2015-03-04 03:04:03)
From: Jassi Brar jaswinder.si...@linaro.org
The CRG11 clock controller is managed by remote f/w.
This driver simply maps Linux CLK ops onto mailbox api.
Signed-off-by: Andy Green andy.gr...@linaro.org
Signed-off-by: Vincent Yang
On Friday 10 April 2015 15:43:25 Kumar Gala wrote:
+static int qcom_cpu_boot(unsigned int cpu)
+{
+ int ret = 0;
+
+ if (per_cpu(cold_boot_done, cpu) == false) {
+ ret = qcom_unclamp_secondary_arm_cpu(cpu);
+ if (ret)
+ return
On Fri, Apr 10, 2015 at 4:21 PM, Stephen Boyd sb...@codeaurora.org wrote:
That's true, These are existing bindings, so I can't change it as part
of this patch, However I will make another patch to fix this in both
drivers and DT for good reasons. Just noticed that bindings are not
consistent
From: Dinh Nguyen dingu...@opensource.altera.com
The CIU(Card Interface Unit) clock is used by the dw_mmc IP to clock an SD
card. The ciu_clk is the sdmmc_clk passed through a fixed divider of 4. This
patch
adds the ciu_clk node and makes the sdmmc_clk it's parent.
Signed-off-by: Dinh Nguyen
On Fri 10 Apr 13:42 PDT 2015, Srinivas Kandagatla wrote:
This patch adds rpm node to apq8064 dt as rpm would be used by other
devices for regulator support.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Reviewed-by: Bjorn Andersson bjorn.anders...@sonymobile.com
On Fri 10 Apr 13:44 PDT 2015, Srinivas Kandagatla wrote:
From: Pramod Gurav pramod.gu...@smartplayin.com
Define an alias for serial port present on ifc6410 which is used as
console.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
[Srinivas Kandagatla: renamed the
One thing where we need your help as a I2C maintainer is how to represent an
i2c slave device using device-tree. You may remember our discussion in the
past from here [1] where you suggested to just make a slave client by its
compatible name. Stephen Warren from NVIDIA raised some concerns
From: Marcel Ziswiler marcel.ziswi...@toradex.com
This series is a set of patches accumulated over Easter ultimately
bringing HDA audio to Tegra30 devices.
Marcel Ziswiler (9):
ARM: tegra: Cardhu device-tree comment spelling fix
ARM: tegra: fix hda2codec_2x clock name for Tegra30
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Fix hda2codec_2x clock name in Tegra30 HDA controller device tree node
documentation.
While at it also fix coma vs. semicolon issue.
Signed-off-by: Marcel Ziswiler marcel.ziswi...@toradex.com
---
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Signed-off-by: Marcel Ziswiler marcel.ziswi...@toradex.com
---
arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Signed-off-by: Marcel Ziswiler marcel.ziswi...@toradex.com
---
drivers/clk/tegra/clk-tegra30.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Signed-off-by: Marcel Ziswiler marcel.ziswi...@toradex.com
---
arch/arm/configs/tegra_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index 18047c4..cdf9abb
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Fix pin muxing, add digital audio aka HDA pin muxing and activate HDA
driver.
Fix pu vs. gpio_pu pin muxing.
While at it also update comment about supported module hardware
versions.
While at it also add an emmc label to the SDHCI node just like
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Signed-off-by: Marcel Ziswiler marcel.ziswi...@toradex.com
---
arch/arm/boot/dts/tegra124.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Activate STMPE811 touch controller as found on Colibri T30 modules.
While at it change order of HDMI sub nodes as well to be more in line
with Apalis T30.
While at it also update comment about supported module hardware
versions.
Signed-off-by:
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Signed-off-by: Marcel Ziswiler marcel.ziswi...@toradex.com
---
arch/arm/configs/tegra_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index d199eb2..18047c4
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Add a device node for the HDA controller found on Tegra30.
Signed-off-by: Marcel Ziswiler marcel.ziswi...@toradex.com
---
arch/arm/boot/dts/tegra30.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git
Quoting Philipp Zabel (2015-03-12 03:04:17)
Am Freitag, den 13.02.2015, 20:18 +0100 schrieb Philipp Zabel:
Some board designers, when running out of clock output pads, decide to
(mis)use PWM output pads to provide a clock to external components.
This driver supports this practice by
On Fri, 10 Apr 2015, Marcel Ziswiler wrote:
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Signed-off-by: Marcel Ziswiler marcel.ziswi...@toradex.com
This patch is missing a commit message; please add one.
On Fri, 10 Apr 2015, Marcel Ziswiler wrote:
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Signed-off-by: Marcel Ziswiler marcel.ziswi...@toradex.com
This one is also missing a commit message; please add one.
On Fri, 10 Apr 2015, Marcel Ziswiler wrote:
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Signed-off-by: Marcel Ziswiler marcel.ziswi...@toradex.com
This one is also missing a commit message; please add one.
On Fri, 10 Apr 2015, Marcel Ziswiler wrote:
From: Marcel Ziswiler marcel.ziswi...@toradex.com
Fix hda2codec_2x clock name in Tegra30 HDA controller device tree node
documentation.
While at it also fix coma vs. semicolon issue.
Signed-off-by: Marcel Ziswiler marcel.ziswi...@toradex.com
Hey Boris,
On Fri, Apr 10, 2015 at 05:11:48PM +0200, Boris Brezillon wrote:
On Fri, 10 Apr 2015 13:50:56 + Jason Cooper ja...@lakedaemon.net wrote:
On Thu, Apr 09, 2015 at 04:58:41PM +0200, Boris Brezillon wrote:
I know we usually try to adapt existing drivers instead of replacing them
On Fri, 2015-04-10 at 01:23 -0500, Jia Hongtao-B38951 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Friday, April 10, 2015 11:56 AM
To: Jia Hongtao-B38951
Cc: linuxppc-...@lists.ozlabs.org; devicetree@vger.kernel.org;
robh...@kernel.org; rui.zh...@intel.com
Quoting Ray Jui (2015-03-17 22:45:17)
Document the device tree binding for Broadcom iProc architecture based
clock controller
Signed-off-by: Ray Jui r...@broadcom.com
Reviewed-by: Scott Branden sbran...@broadcom.com
---
.../bindings/clock/brcm,iproc-clocks.txt | 171
Stefan,
On Thu, Apr 09, 2015 at 10:04:04PM +0200, Stefan Agner wrote:
Stefan Agner (11):
genirq: generic chip: support hierarchy domain
irqchip: nvic: support hierarchy irq domain
irqchip: vf610-mscm: support NVIC parent
I've applied patches 1 to 3 onto irqchip/vybrid. And will merge
This patch implements the shared memory based communication system found on all
Qualcomm platforms. SMD was originally used to communicate with the modem but
has grown to be part of power management as well as the various DSPs etc found
in Qualcomm platforms.
The code depends on the SMEM
Add device tree binding documentation for the Qualcomm Shared Memory
Device, used for communication between the various CPUs in the Qualcomm
SoCs.
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
.../devicetree/bindings/soc/qcom/qcom,smd.txt | 78 ++
1
Corrected spelling of the msm mailing list...
On Fri 10 Apr 17:16 PDT 2015, Bjorn Andersson wrote:
Add device tree binding documentation for the Qualcomm Shared Memory
Device, used for communication between the various CPUs in the Qualcomm
SoCs.
Signed-off-by: Bjorn Andersson
On 15-04-08 11:54 AM, Mark Brown wrote:
On Tue, Apr 07, 2015 at 07:28:40PM -0700, Lori Hikichi wrote:
On 15-04-06 02:58 AM, Mark Brown wrote:
OK, then it's going to need to be a clock provider at some point - the
clock will be going into external devices which are going to need to be
able
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