2015-05-05 13:07 GMT+09:00 Pankaj Dubey :
> From: Yadwinder Singh Brar
>
> This patch adds pinctrl configuration for using configuring gpx3-2 as an
> external interrupt from max77686. Though max77686 RTC is enabled and gets
> probed by default, it doesnt work as its unable to get interrupt.
>
> Th
Jassi Brar writes:
> On Wed, Apr 29, 2015 at 10:39 PM, Eric Anholt wrote:
>
>> +
>> +struct bcm2835_mbox {
>> + struct device *dev;
>> + void __iomem *regs;
>> + spinlock_t lock;
>> + struct mbox_controller controller;
>> +};
>> +
>> +static struct bcm2835_mbox *mbox;
>>
Hello,
On Mon, May 04, 2015 at 10:13:11PM +0530, Suman Tripathi wrote:
> AFAIK clearing host_irq_stat means we have handled port interrupts .
> Now for our case we still have interrupts left because it didn't get
> detected on
> first ahci_port_intr. So you mean to handle that residual irq in th
* Nishanth Menon [150424 11:34]:
> On 04/24/2015 12:54 PM, Suman Anna wrote:
> > The L3 Error handling on OMAP5 for the most part is very similar
> > to that of OMAP4, and had leveraged common data structures and
> > register layout definitions so far. Upon closer inspection, there
> > are a few m
Migrate the generic r8a7740 platform from calling l2x0_of_init() to the
generic l2c OF initialization.
Signed-off-by: Geert Uytterhoeven
---
v3:
- Use 0/~0 now DT supports "arm,shared-override",
v2:
- Keep only {,~}L2C_AUX_CTRL_SHARED_OVERRIDE.
---
arch/arm/mach-shmobile/setup-r8a7740.c | 6
Migrate the generic r8a7740 platform from calling l2x0_of_init() to the
generic l2c OF initialization.
Signed-off-by: Geert Uytterhoeven
---
v3:
- Use 0/~0 now DT supports "arm,shared-override",
v2:
- Keep only {,~}L2C_AUX_CTRL_SHARED_OVERRIDE.
---
arch/arm/mach-shmobile/board-armadillo800e
On Mon, May 4, 2015 at 4:45 AM, Mark Brown wrote:
> On Sun, May 03, 2015 at 05:00:18PM -0700, Kevin Cernekee wrote:
>> + if (dev->of_node) {
>> + const struct of_device_id *of_id;
>> +
>> + of_id = of_match_device(tas571x_of_match, dev);
>> + if (of_id)
>> +
Hello,
On 1 May 2015 at 14:27, Stefan Monnier wrote:
>> The SPI driver returns an error when more than 64 bytes are
>> transferred at once due to lack of DMA support.
>
> Have you tried the dmaengine patch and make the SPI driver use it?
>
The dmaengine is already merged or queued in sunxi-wip b
Using a string to describe a pin in the device tree can be not enough.
Some controllers may need extra information to fully describe a pin. It
concerns mainly controllers which have a per pin muxing approach which
don't fit well the notions of groups and functions.
Instead of using a pin name, a 32
Add "cdns,zynqmp-gem" to be used for Zynq Ultrascale+ MPSoC.
Signed-off-by: Harini Katakam
Reviewed-by: Punnaiah Choudary Kalluri
---
v2:
Updated SoC name
---
Documentation/devicetree/bindings/net/macb.txt |1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/binding
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