Hi,
On Thursday 11 June 2015 09:04 PM, Evgeniy Polyakov wrote:
> Hi
>
> 25.05.2015, 08:15, "Vignesh R" :
>>> HDQ mode remains unchanged.
>>>
>>> Signed-off-by: Vignesh R
>
> I have no experience with omap_hdq platform, but there are quite a few
> questions
> related to IO - you never check w
Hi Kevin, Heiko
Thanks for your comments.
Sorry for delay reply.
在 2015年04月28日 02:28, Kevin Hilman 写道:
Heiko Stübner writes:
Am Freitag, 24. April 2015, 16:07:45 schrieb Caesar Wang:
Add power domain drivers based on generic power domain for
Rockchip platform, and support RK3288.
Adding Neil Brown who has been doing a UART slave binding[1].
On Thu, Jun 11, 2015 at 7:00 AM, Vincent Cuissard wrote:
> Add support of Marvell NFC chip controlled over UART
>
> Signed-off-by: Vincent Cuissard
> ---
> .../devicetree/bindings/net/nfc/nfcmrvl.txt| 29 +++
> drivers/nfc/n
fu@linaro.org wrote:
+ if (timeout <= gwdt->max_wor_timeout)
+ writel_relaxed(timeout * gwdt->clk,
+ gwdt->control_base + SBSA_GWDT_WOR);
+ else
+ writel_relaxed(gwdt->max_wor_timeout * gwdt->clk,
+
On Thu, Jun 11, 2015 at 7:37 PM, Stephen Boyd wrote:
> Add support for over current protection (OCP), pin control
> selection, soft start and soft start strength, auto-mode, input
> current limiting, and pull down.
>
> Cc:
> Signed-off-by: Stephen Boyd
> ---
>
> Changes from v1:
> * New patch sp
On Thu, Jun 11, 2015 at 05:52:15PM +0300, Roger Quadros wrote:
>
> On Thu, 11 Jun 2015 22:11:22 +0800
> Li Jun wrote:
>
> > On Thu, Jun 11, 2015 at 03:37:03PM +0300, Roger Quadros wrote:
> > >
> > > On Thu, 11 Jun 2015 16:20:13 +0800
> > > Li Jun wrote:
> > >
> > > > On Thu, Jun 11, 2015 at 1
On Tue, Jun 09, 2015 at 06:29:31PM +0300, Roger Quadros wrote:
> Rob,
>
> On Tue, 9 Jun 2015 08:26:20 -0500
> Rob Herring wrote:
>
> > On Mon, Jun 8, 2015 at 8:18 PM, Li Jun wrote:
> > > On Mon, Jun 08, 2015 at 11:06:49AM -0500, Rob Herring wrote:
> > >> On Mon, Jun 8, 2015 at 10:02 AM, Li Jun
On Tue, May 26, 2015 at 2:49 PM, Heiko Stuebner wrote:
> Signed-off-by: Heiko Stuebner
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
Acked-by: Rob Herring
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
> b/Docume
On Thu, 2015-06-11 at 09:03 +0200, Paul Bolle wrote:
> On Wed, 2015-06-10 at 22:24 +0800, Koro Chen wrote:
> > --- /dev/null
> > +++ b/sound/soc/mediatek/Kconfig
>
> > +config SND_SOC_MEDIATEK
> > + bool "ASoC support for Mediatek chip"
> > + depends on ARCH_MEDIATEK
> > + help
> > + Thi
On Thu, Jun 11, 2015 at 05:55:57PM +0300, Roger Quadros wrote:
> > > drivers/usb/core/hub.c
> > >
> > > static int usb_enumerate_device_otg(struct usb_device *udev)
> > > {
> > > int err = 0;
> > >
> > > #ifdefCONFIG_USB_OTG
> > > /*
> > >* OTG-aware devices on OTG-capable root hubs m
On Thu, Jun 11, 2015 at 05:36:00PM -0700, Christopher Li wrote:
> n Sun, Apr 26, 2015 at 10:20 PM, Fengguang Wu wrote:
> >> >
> >> > drivers/dma/xgene-dma.c:2088:1: sparse: symbol
> >> > '__UNIQUE_ID_author__COUNTER__' has multiple initializers (originally
> >> > initialized at drivers/dma/xgene-d
Some regulators need to be configured to pull down a resistor
when the regulator is disabled. Add an op (set_pull_down) and a
DT property + constraint to support this.
Cc:
Signed-off-by: Stephen Boyd
---
Documentation/devicetree/bindings/regulator/regulator.txt | 1 +
drivers/regulator/core.c
Some regulators have a fixed load that isn't captured by
consumers that the kernel knows about. Add a constraint to
support this.
Cc:
Signed-off-by: Stephen Boyd
---
Documentation/devicetree/bindings/regulator/regulator.txt | 2 ++
drivers/regulator/core.c | 2 +
Some regulators can limit their input current (typically annotated
as ilim). Add an op (set_input_current_limit) and a DT property +
constraint to support this.
Cc:
Signed-off-by: Stephen Boyd
---
Documentation/devicetree/bindings/regulator/regulator.txt | 1 +
drivers/regulator/core.c
Add support for over current protection (OCP), pin control
selection, soft start and soft start strength, auto-mode, input
current limiting, and pull down.
Cc:
Signed-off-by: Stephen Boyd
---
Changes from v1:
* New patch split from original SPMI regulator driver
.../bindings/regulator/qcom,sp
Some regulators support a "soft start" feature where the voltage
ramps up slowly when the regulator is enabled. Add an op
(set_soft_start) and a DT property + constraint to support this.
Cc:
Signed-off-by: Stephen Boyd
---
Documentation/devicetree/bindings/regulator/regulator.txt | 1 +
drivers
Add an SPMI regulator driver for Qualcomm's PM8841, PM8941, and
PM8916 PMICs. This driver is based largely on code from
codeaurora.org[1].
[1]
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/regulator/qpnp-regulator.c?h=msm-3.10
Cc: David Collins
Cc:
Signed-off-by: Stephen
On Sun, Apr 26, 2015 at 10:20 PM, Fengguang Wu wrote:
>> >
>> > drivers/dma/xgene-dma.c:2088:1: sparse: symbol
>> > '__UNIQUE_ID_author__COUNTER__' has multiple initializers (originally
>> > initialized at drivers/dma/xgene-dma.c:2087)
>> > So, I kept only one author here.
>> No that is not right,
Some regulators support a "soft start" feature where the voltage
ramps up slowly when the regulator is enabled. Add an op
(set_soft_start) and a DT property + constraint to support this.
Cc:
Signed-off-by: Stephen Boyd
---
Documentation/devicetree/bindings/regulator/regulator.txt | 1 +
drivers
Some regulators have a fixed load that isn't captured by
consumers that the kernel knows about. Add a constraint to
support this.
Cc:
Signed-off-by: Stephen Boyd
---
Documentation/devicetree/bindings/regulator/regulator.txt | 2 ++
drivers/regulator/core.c | 2 +
Add an SPMI regulator driver for Qualcomm's PM8841, PM8941, and
PM8916 PMICs. This driver is based largely on code from
codeaurora.org[1].
[1]
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/regulator/qpnp-regulator.c?h=msm-3.10
Cc: David Collins
Cc:
Signed-off-by: Stephen
Some regulators can limit their input current (typically annotated
as ilim). Add an op (set_input_current_limit) and a DT property +
constraint to support this.
Cc:
Signed-off-by: Stephen Boyd
---
Documentation/devicetree/bindings/regulator/regulator.txt | 1 +
drivers/regulator/core.c
Add support for over current protection (OCP), pin control
selection, soft start and soft start strength, auto-mode, input
current limiting, and pull down.
Cc:
Signed-off-by: Stephen Boyd
---
Changes from v1:
* New patch split from orignal SPMI regulator driver
.../bindings/regulator/qcom,spm
Some regulators need to be configured to pull down a resistor
when the regulator is disabled. Add an op (set_pull_down) and a
DT property + constraint to support this.
Cc:
Signed-off-by: Stephen Boyd
---
Documentation/devicetree/bindings/regulator/regulator.txt | 1 +
drivers/regulator/core.c
On 06/08, Sascha Hauer wrote:
> On Fri, Jun 05, 2015 at 05:59:12PM -0700, Stephen Boyd wrote:
> >
> > And similar things could be done for the reset driver.
>
> The problem I see with this approach is that we scatter the code for a
> otherwise simple driver over a bunch of directories. We would h
Hi,
On 11/06/2015 at 09:27:45 +, Opensource [Steve Twiss] wrote :
>
> Thanks for replying so quickly.
>
> > I'm still not particularly happy with this. Can yo speak to your H/W
> > guys and get them to change their scripts to output sensible header
> > files?
>
> Ah. Ok.
>
> For our side
Hi Vincent,
On Thu, Jun 11, 2015 at 02:00:18PM +0200, Vincent Cuissard wrote:
> Hi,
>
> Please find patches that add platform data configuration, DT bindings,
> and UART driver for nfcmrvl NFC NCI driver.
>
> Br,
> Vincent
>
> Vincent Cuissard (2):
> NFC: nfcmrvl: add platform_data and DT con
In the default Broadcom SDK the shared override is activated for this
cache controller, do the same in the upstream code. Data and
instruction prefetching is not activated by default for this cache
controller on the bcm53xx SoC, do it manually like it is done in the
vendor SDK.
Signed-off-by: Hauk
Sorry for the noise: apparently I forgot to remove existing patches
when regenerating the series with format-patch.
I'll resend the series tomorrow.
On Thu, 11 Jun 2015 19:36:19 +0200
Boris Brezillon wrote:
> Hello,
>
> This patch series adds a new driver supporting Marvell's CESA IP.
> This d
Hi,
On Mon, Jun 8, 2015 at 8:47 PM, Alan Stern wrote:
> On Mon, 8 Jun 2015, Vivek Gautam wrote:
>
>> Facilitate getting required 3.3V and 1.0V VDD supply for
>> EHCI controller on Exynos.
>>
>> For example, patches for regulators' nodes:
>> c8c253f ARM: dts: Add regulator entries to smdk5420
>>
The existing mv_cesa driver supports some features of the CESA IP but is
quite limited, and reworking it to support new features (like involving the
TDMA engine to offload the CPU) is almost impossible.
This driver has been rewritten from scratch to take those new features into
account.
This commi
The mv_cesa driver currently expects the SRAM memory region to be passed
as a platform device resource.
This approach implies two drawbacks:
- the DT representation is wrong
- the only one that can access the SRAM is the crypto engine
The last point is particularly annoying in some cases: for exa
We are about to add a new driver to support new features like using the
TDMA engine to offload the CPU.
Orion, Dove and Kirkwood platforms are already using the mv_cesa driver,
but Orion SoCs do not embed the TDMA engine, which means we will have to
differentiate them if we want to get TDMA support
The mv_cesa driver currently expects the SRAM memory region to be passed
as a platform device resource.
This approach implies two drawbacks:
- the DT representation is wrong
- the only one that can access the SRAM is the crypto engine
The last point is particularly annoying in some cases: for exa
The existing mv_cesa driver supports some features of the CESA IP but is
quite limited, and reworking it to support new features (like involving the
TDMA engine to offload the CPU) is almost impossible.
This driver has been rewritten from scratch to take those new features into
account.
This commi
We are about to add a new driver to support new features like using the
TDMA engine to offload the CPU.
Orion, Dove and Kirkwood platforms are already using the mv_cesa driver,
but Orion SoCs do not embed the TDMA engine, which means we will have to
differentiate them if we want to get TDMA support
Hello,
This patch series adds a new driver supporting Marvell's CESA IP.
This driver addresses some limitations of the existing one.
>From a performance and CPU load point of view the most important
limitation in the existing driver is the lack of DMA support, thus
preventing us from chaining cryp
Add support for DES operations.
Signed-off-by: Boris Brezillon
Signed-off-by: Arnaud Ebalard
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/cipher.c | 150
3 files changed, 154 insertions(+)
The CESA IP supports CPU offload through a dedicated DMA engine (TDMA)
which can control the crypto block.
When you use this mode, all the required data (operation metadata and
payload data) are transferred using DMA, and the results are retrieved
through DMA when possible (hash results are not ret
From: Arnaud Ebalard
Add support for SHA256 operations.
Signed-off-by: Arnaud Ebalard
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/hash.c | 157 ++
3 files change
The CESA IP supports CPU offload through a dedicated DMA engine (TDMA)
which can control the crypto block.
When you use this mode, all the required data (operation metadata and
payload data) are transferred using DMA, and the results are retrieved
through DMA when possible (hash results are not ret
From: Arnaud Ebalard
Add support for Triple-DES operations.
Signed-off-by: Arnaud Ebalard
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/cipher.c | 147
3 file
From: Arnaud Ebalard
Add support for Triple-DES operations.
Signed-off-by: Arnaud Ebalard
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/cipher.c | 147
3 file
Add support for DES operations.
Signed-off-by: Boris Brezillon
Signed-off-by: Arnaud Ebalard
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/cipher.c | 150
3 files changed, 154 insertions(+)
From: Arnaud Ebalard
Add support for MD5 operations.
Signed-off-by: Arnaud Ebalard
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/hash.c | 170 +-
3 files changed,
The old and new marvell CESA drivers both support Orion and Kirkwood SoCs.
Add a module parameter to choose whether these SoCs should be attached to
the new or the old driver.
The default policy is to keep attaching those IPs to the old driver if it
is enabled, until we decide the new CESA driver
From: Arnaud Ebalard
Add support for SHA256 operations.
Signed-off-by: Arnaud Ebalard
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/hash.c | 157 ++
3 files change
From: Arnaud Ebalard
Add support for MD5 operations.
Signed-off-by: Arnaud Ebalard
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/hash.c | 170 +-
3 files changed,
Add CESA IP description for all the missing armada SoCs (XP, 375 and 38x).
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/cesa.c
index e4dfee0..087370e 10064
Add CESA IP description for all the missing armada SoCs (XP, 375 and 38x).
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/cesa.c
index e4dfee0..087370e 10064
The old and new marvell CESA drivers both support Orion and Kirkwood SoCs.
Add a module parameter to choose whether these SoCs should be attached to
the new or the old driver.
The default policy is to keep attaching those IPs to the old driver if it
is enabled, until we decide the new CESA driver
From: Arnaud Ebalard
Add the Kirkwood and Dove SoC descriptions, and control the allhwsupport
module parameter to avoid probing the CESA IP when the old CESA driver is
enabled (unless it is explicitly requested to do so).
Signed-off-by: Arnaud Ebalard
Signed-off-by: Boris Brezillon
---
driver
Add DT bindings documentation for the new marvell-cesa driver.
Signed-off-by: Boris Brezillon
---
.../devicetree/bindings/crypto/marvell-cesa.txt| 45 ++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/marvell-cesa.txt
diff -
From: Arnaud Ebalard
Add the Kirkwood and Dove SoC descriptions, and control the allhwsupport
module parameter to avoid probing the CESA IP when the old CESA driver is
enabled (unless it is explicitly requested to do so).
Signed-off-by: Arnaud Ebalard
Signed-off-by: Boris Brezillon
---
driver
Add DT bindings documentation for the new marvell-cesa driver.
Signed-off-by: Boris Brezillon
---
.../devicetree/bindings/crypto/marvell-cesa.txt| 45 ++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/marvell-cesa.txt
diff -
Add the Orion SoC description, and select this implementation by default
to support non-DT probing: Orion is the only platform where non-DT boards
are declaring the CESA block.
Control the allhwsupport module parameter to avoid probing the CESA IP when
the old CESA driver is enabled (unless it is
On Dove platforms, the crypto engine requires a clock. Document this
clocks property in the mv_cesa bindings doc.
Signed-off-by: Boris Brezillon
---
Documentation/devicetree/bindings/crypto/mv_cesa.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/crypto
Add the Orion SoC description, and select this implementation by default
to support non-DT probing: Orion is the only platform where non-DT boards
are declaring the CESA block.
Control the allhwsupport module parameter to avoid probing the CESA IP when
the old CESA driver is enabled (unless it is
Am 11.06.2015 um 14:30 schrieb Linus Walleij:
On Thu, Jun 11, 2015 at 12:17 PM, Alexander Holler wrote:
Am 11.06.2015 um 10:12 schrieb Linus Walleij:
On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler
wrote:
You would end up with the same problem of deadlocks as currently, and you
would st
On Thu, Jun 11, 2015 at 07:22:44PM +0800, Fu Wei wrote:
> Hi Guenter,
>
[ ... ]
>
> > value we are trying to set. Effectively the above accepts every pretimeout
> > if wdd->pretimeout is 0. It also accepts every pretimeout if
> > max_pretimeout == 0, even if wdd->timeout is set and t >= wdd->time
Le 09/06/2015 19:25, Mark Brown a écrit :
> On Tue, Jun 09, 2015 at 01:53:53PM +0200, Cyrille Pitchen wrote:
>> - add new property "atmel,fifo-size"
>
> Why is this a property and not something we know from the IP version?
>
Hi Mark,
Please be aware that the VERSION register can not be used to g
On Thu, Jun 11, 2015 at 01:47:29AM +0800, fu@linaro.org wrote:
> From: Fu Wei
>
> This driver bases on linux kernel watchdog framework.
> It supports getting timeout from parameter and FDT
> at the driver init stage.
> The first timeout period expires, the interrupt routine
> got another time
For now this improvement is only used with TX DMA transfers. The data
width must be set properly when configuring the DMA controller. Also
the FIFO configuration must be set to match the DMA transfer data
width:
TXRDYM (Transmitter Ready Mode) and RXRDYM (Receiver Ready Mode) must
be set into the F
This patch updates macro definitions in atmel_serial.h to fit the
80 column rule.
Please note that some deprecated comments such as "[AT91SAM9261 only]"
are removed as the corresponding bits also exist in some later chips.
The patch also fix macro definitions in atmel_serial.c to replace
(port,v)
Depending on the hardware, TX and RX FIFOs may be available. The RX
FIFO can avoid receive overruns, especially when DMA transfers are
not used to read data from the Receive Holding Register. For heavy
system load, The CPU is likely not be able to fetch data fast enough
from the RHR.
In addition,
This patch adds a new DT property, "atmel,fifo-size", to enable and set
the maximum number of data the RX and TX FIFOs can store on FIFO capable
USARTs.
Please be aware that the VERSION register can not be used to guess the
size of FIFOs. Indeed, for a given hardware version, the USARTs can be
int
ChangeLog
v2:
- remove "atmel,rts-high-threshold" and "atmel,rts-low-threshold" from new
DT properties. For now these two thresholds are set once for all during the
probe but a later patch might allow to configure them at run time.
- reword the commit message of the DT property patch to better
On Thu, Jun 11, 2015 at 07:10:00PM +0800, Zidan Wang wrote:
> > > This imx-wm8960 device-tree-only machine driver works with sai driver
> > > and have below feature.
> > > * support codec master and slave mode
> > > * support headphone jack detect
> > > * support headphone and micphone jack event
Am Donnerstag, 11. Juni 2015, 15:43:52 schrieb Romain Perier:
> Signed-off-by: Romain Perier
I think the appropriate tag would've been Reviewed-by ;-)
Heiko
>
> for the whole serie
>
> 2015-05-26 21:49 GMT+02:00 Heiko Stuebner :
> > Signed-off-by: Heiko Stuebner
> > ---
> >
> > Documentat
Hi
25.05.2015, 08:15, "Vignesh R" :
>> HDQ mode remains unchanged.
>>
>> Signed-off-by: Vignesh R
I have no experience with omap_hdq platform, but there are quite a few questions
related to IO - you never check whether write was successful or read returned
actually
valid data, is it ok? I mea
On Thu, 11 Jun 2015 22:22:09 +0800
Li Jun wrote:
> On Thu, Jun 11, 2015 at 03:51:02PM +0300, Roger Quadros wrote:
> >
> > On Thu, 11 Jun 2015 16:38:52 +0800
> > Li Jun wrote:
> >
> > > On Thu, Jun 11, 2015 at 10:30:35AM +0300, Roger Quadros wrote:
> > > >
> > > > On Wed, 10 Jun 2015 20:06:25
On Thu, 11 Jun 2015 22:11:22 +0800
Li Jun wrote:
> On Thu, Jun 11, 2015 at 03:37:03PM +0300, Roger Quadros wrote:
> >
> > On Thu, 11 Jun 2015 16:20:13 +0800
> > Li Jun wrote:
> >
> > > On Thu, Jun 11, 2015 at 10:18:53AM +0300, Roger Quadros wrote:
> > > >
> > > > On Wed, 10 Jun 2015 21:47:51
Hi Zhou Wang
I apologize, I made a mistake as I didn't rebase the patch on the latest Kernel
(where I was convinced I did), my bad.
The patch below is based on v4.1-rc7
It passes checkpatch and compiles OK
Cheers
Gab
---
---
On Thu, Jun 11, 2015 at 03:51:02PM +0300, Roger Quadros wrote:
>
> On Thu, 11 Jun 2015 16:38:52 +0800
> Li Jun wrote:
>
> > On Thu, Jun 11, 2015 at 10:30:35AM +0300, Roger Quadros wrote:
> > >
> > > On Wed, 10 Jun 2015 20:06:25 +0800
> > > Li Jun wrote:
> > >
> > > > On Tue, Jun 09, 2015 at 1
This reverts commit 3d76be5b933e2a66d85a2f7444e68e99e8a48ad4.
The latest revision of Beaglebone Black does not support RTC-only mode.
To avoid potential hardware damage, RTC-only mode was disabled by
default by commit 7a6cb0abe1aa ("ARM: dts: am335x-boneblack: disable
RTC-only sleep to avoid hard
On Thu, Jun 11, 2015 at 03:37:03PM +0300, Roger Quadros wrote:
>
> On Thu, 11 Jun 2015 16:20:13 +0800
> Li Jun wrote:
>
> > On Thu, Jun 11, 2015 at 10:18:53AM +0300, Roger Quadros wrote:
> > >
> > > On Wed, 10 Jun 2015 21:47:51 +0800
> > > Li Jun wrote:
> > >
> > > > On Wed, Jun 10, 2015 at 0
2015-06-11 21:40 GMT+09:00 Krzysztof Kozlowski :
> W dniu 11.06.2015 o 21:15, Javier Martinez Canillas pisze:
>> Hello Krzysztof,
>>
>> On Thu, Jun 11, 2015 at 12:43 PM, Krzysztof Kozlowski
>> wrote:
>>> W dniu 11.06.2015 o 17:26, Krzysztof Kozlowski pisze:
Add proper gate clock for the Analo
Signed-off-by: Romain Perier
for the whole serie
2015-05-26 21:49 GMT+02:00 Heiko Stuebner :
> Signed-off-by: Heiko Stuebner
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.
Dan Carpenter reported the static checker warning:
drivers/video/fbdev/sm501fb.c:1958 sm501fb_probe()
warn: strcpy() 'cp' of unknown size might be too large for 'fb_mode'
Fix it, as the SM501 datasheet says the SM501 can "200 MHz
DAC support 1280x1024 resolution", which would result in a
too long
On 06/11/2015 12:17 PM, Alexander Holler wrote:
> Am 11.06.2015 um 10:12 schrieb Linus Walleij:
>> On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler
>> wrote:
>>> Am 10.06.2015 um 09:30 schrieb Linus Walleij:
>>
i2c host comes out, probes the regulator driver, regulator driver
probes a
Hello Krzysztof,
On Thu, Jun 11, 2015 at 2:40 PM, Krzysztof Kozlowski
wrote:
> W dniu 11.06.2015 o 21:15, Javier Martinez Canillas pisze:
>> Hello Krzysztof,
>>
>> On Thu, Jun 11, 2015 at 12:43 PM, Krzysztof Kozlowski
>> wrote:
>>> W dniu 11.06.2015 o 17:26, Krzysztof Kozlowski pisze:
Add p
On Thursday 11 June 2015 06:05 PM, Hans de Goede wrote:
Hi,
On 11-06-15 13:16, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 11 June 2015 03:23 PM, Hans de Goede wrote:
Hi,
On 11-06-15 11:42, Kishon Vijay Abraham I wrote:
Hi,
On Sunday 31 May 2015 09:40 PM, Hans de Goede wrote:
The usb0
On Thu, 11 Jun 2015 16:38:52 +0800
Li Jun wrote:
> On Thu, Jun 11, 2015 at 10:30:35AM +0300, Roger Quadros wrote:
> >
> > On Wed, 10 Jun 2015 20:06:25 +0800
> > Li Jun wrote:
> >
> > > On Tue, Jun 09, 2015 at 11:29:31PM +0800, Roger Quadros wrote:
> > > > Rob,
> > > >
> > > > On Tue, 9 Jun 2
W dniu 11.06.2015 o 21:15, Javier Martinez Canillas pisze:
> Hello Krzysztof,
>
> On Thu, Jun 11, 2015 at 12:43 PM, Krzysztof Kozlowski
> wrote:
>> W dniu 11.06.2015 o 17:26, Krzysztof Kozlowski pisze:
>>> Add proper gate clock for the Analog to Digital Converter (ADC) on
>>> Exynos4x12.
>>>
>>>
On Thu, 11 Jun 2015 16:20:13 +0800
Li Jun wrote:
> On Thu, Jun 11, 2015 at 10:18:53AM +0300, Roger Quadros wrote:
> >
> > On Wed, 10 Jun 2015 21:47:51 +0800
> > Li Jun wrote:
> >
> > > On Wed, Jun 10, 2015 at 03:37:37PM +0800, Roger Quadros wrote:
> > > > On Tue, 9 Jun 2015 11:33:11 -0500
> >
Hi,
On 11-06-15 13:16, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 11 June 2015 03:23 PM, Hans de Goede wrote:
Hi,
On 11-06-15 11:42, Kishon Vijay Abraham I wrote:
Hi,
On Sunday 31 May 2015 09:40 PM, Hans de Goede wrote:
The usb0 phy is connected to an OTG controller, and as such needs s
On Thu, Jun 11, 2015 at 12:17 PM, Alexander Holler wrote:
> Am 11.06.2015 um 10:12 schrieb Linus Walleij:
>> On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler
>> wrote:
>>> You would end up with the same problem of deadlocks as currently, and you
>>> would still need something ugly like the def
Hello Krzysztof,
On Thu, Jun 11, 2015 at 12:43 PM, Krzysztof Kozlowski
wrote:
> W dniu 11.06.2015 o 17:26, Krzysztof Kozlowski pisze:
>> Add proper gate clock for the Analog to Digital Converter (ADC) on
>> Exynos4x12.
>>
>> Signed-off-by: Krzysztof Kozlowski
>> ---
>> drivers/clk/samsung/clk-e
Hello Heiko,
On 06/11/2015 01:50 PM, Heiko Stübner wrote:
> Am Dienstag, 9. Juni 2015, 13:04:41 schrieb Javier Martinez Canillas:
>> Hello,
>>
>> This is a v7 of a series that adds support for multiple EC in a system
>> and also for the protocol version 3 that is used on newer ECs.
>>
>> Most pa
Add support of Marvell NFC chip controlled over UART
Signed-off-by: Vincent Cuissard
---
.../devicetree/bindings/net/nfc/nfcmrvl.txt| 29 +++
drivers/nfc/nfcmrvl/Kconfig| 11 +
drivers/nfc/nfcmrvl/Makefile | 3 +
drivers/nfc/nfcmrvl/nfcmr
Declare nfcmrvl platform_data structure and few DT parameters
for nfcmrvl driver.
Signed-off-by: Vincent Cuissard
---
drivers/nfc/nfcmrvl/main.c| 67 +++
drivers/nfc/nfcmrvl/nfcmrvl.h | 36 +--
drivers/nfc/nfcmrvl/usb.c
Usage of labels instead of full paths reduces possible mistakes when
overriding nodes.
Signed-off-by: Krzysztof Kozlowski
---
This one was missed during last label refactor. Rebased on Kukjin's
for-next.
Tested by comparison of DTB and decompiled DTS.
---
arch/arm/boot/dts/exynos4210-universa
Hi,
Please find patches that add platform data configuration, DT bindings,
and UART driver for nfcmrvl NFC NCI driver.
Br,
Vincent
Vincent Cuissard (2):
NFC: nfcmrvl: add platform_data and DT configuration
NFC: nfcmrvl: add UART driver
.../devicetree/bindings/net/nfc/nfcmrvl.txt|
Am Dienstag, 9. Juni 2015, 13:04:41 schrieb Javier Martinez Canillas:
> Hello,
>
> This is a v7 of a series that adds support for multiple EC in a system
> and also for the protocol version 3 that is used on newer ECs.
>
> Most patches were taken from the downstream ChromiumOS v3.14 tree with
> f
Am 11.06.2015 um 13:24 schrieb Alexander Holler:
> Am 11.06.2015 um 12:17 schrieb Alexander Holler:
>> Am 11.06.2015 um 10:12 schrieb Linus Walleij:
>>> On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler
>>> wrote:
Am 10.06.2015 um 09:30 schrieb Linus Walleij:
>>>
> i2c host comes out, pr
On Thu, Jun 11, 2015 at 01:42:16PM +0300, Alexander Shiyan wrote:
> Hello.
>
> Четверг, 11 июня 2015, 12:32 +02:00 от Romain Baeriswyl
> :
> > This patch adds support of device tree to the gpio-generic driver.
> >
> > Signed-off-by: Romain Baeriswyl
> > ---
>
> The only issue how the directio
On Wed, Jun 10, 2015 at 11:36:21AM -0700, Nicolin Chen wrote:
> On Wed, Jun 10, 2015 at 04:26:27PM +0800, Zidan Wang wrote:
> > This imx-wm8960 device-tree-only machine driver works with sai driver
> > and have below feature.
> > * support codec master and slave mode
> > * support headphone jack de
Am 11.06.2015 um 12:17 schrieb Alexander Holler:
Am 11.06.2015 um 10:12 schrieb Linus Walleij:
On Wed, Jun 10, 2015 at 10:28 AM, Alexander Holler
wrote:
Am 10.06.2015 um 09:30 schrieb Linus Walleij:
i2c host comes out, probes the regulator driver, regulator driver
probes and then the regula
Hi Guenter,
Great thanks for your time.
On 11 June 2015 at 00:21, Guenter Roeck wrote:
> On 06/10/2015 06:41 AM, fu@linaro.org wrote:
>>
>> From: Fu Wei
>>
>> Also update Documentation/watchdog/watchdog-kernel-api.txt to
>> introduce:
>> (1)the new elements in the watchdog_device and watchd
Hello.
Четверг, 11 июня 2015, 12:32 +02:00 от Romain Baeriswyl
:
> This patch adds support of device tree to the gpio-generic driver.
>
> Signed-off-by: Romain Baeriswyl
> ---
The only issue how the direction will be handled in this case?
Thanks.
---
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