On Wed, 2015-07-15 at 23:59 +0800, YH Huang wrote:
On Mon, 2015-07-13 at 18:19 +0800, Daniel Kurtz wrote:
On Mon, Jul 13, 2015 at 5:04 PM, YH Huang yh.hu...@mediatek.com wrote:
Add display PWM driver support to modify backlight for MT8173 and MT6595.
The PWM has one channel to control the
On Wed, Jul 15, 2015 at 03:45:07PM -0600, Simon Glass wrote:
Hi Jon,
On 15 July 2015 at 07:29, Jon Loeliger j...@jdl.com wrote:
So, like, Thierry Reding said:
From: Thierry Reding tred...@nvidia.com
These three patches add a couple of string functions that have proven
useful in
On Thursday, July 16, 2015 at 03:19:35 AM, Brian Norris wrote:
On Wed, Jul 15, 2015 at 07:15:50PM +0200, Marek Vasut wrote:
On Wednesday, July 15, 2015 at 05:59:46 PM, Brian Norris wrote:
1. Fix up the SPI driver so that it knows how to break large SPI
transfers up into smaller segments
On Wed 15 Jul 15:27 PDT 2015, Tim Bird wrote:
On 07/15/2015 02:22 PM, Rob Herring wrote:
On Wed, Jul 15, 2015 at 1:24 PM, Tim Bird tim.b...@sonymobile.com wrote:
On 07/14/2015 06:07 PM, Rob Herring wrote:
On Tue, Jul 14, 2015 at 4:41 PM, Tim Bird tim.b...@sonymobile.com wrote:
On
On Wed, Jul 15, 2015 at 07:15:50PM +0200, Marek Vasut wrote:
On Wednesday, July 15, 2015 at 05:59:46 PM, Brian Norris wrote:
1. Fix up the SPI driver so that it knows how to break large SPI
transfers up into smaller segments that its constituent hardware (DMA
controllers, fast clocks, etc.)
On Wed, Jul 8, 2015 at 4:53 AM, Simon Glass s...@chromium.org wrote:
This binding differs from that of Linux. Update it and change existing
users.
Signed-off-by: Simon Glass s...@chromium.org
I'm confused by this. Isn't devicetree@vger.kernel.org the place to discuss
device tree bindings?
On Tue, Jul 14, 2015 at 07:57:49AM +0200, Sascha Hauer wrote:
On Thu, Jun 18, 2015 at 02:33:48PM +0200, Ludovic Desroches wrote:
On Wed, Jun 17, 2015 at 09:55:56AM -0600, Stephen Warren wrote:
On 06/17/2015 06:38 AM, Ludovic Desroches wrote:
Hi Stephen,
On Mon, Jun 15, 2015 at
On Wed, Jul 15, 2015 at 09:46:42AM +0200, Ludovic Desroches wrote:
This driver fits most of my needs but I didn't do it in this way for the
two previous reasons. If it is not an issue to add a new
dt_node_to_map() implementation which should be quite close to the
mediatek one, let's do it.
On Tue, Jul 14, 2015 at 12:59:01PM +0100, Jon Hunter wrote:
On 13/07/15 15:02, Jon Hunter wrote:
On 13/07/15 14:41, Peter De Schrijver wrote:
On Mon, Jul 13, 2015 at 01:39:44PM +0100, Jon Hunter wrote:
From: Vince Hsu vin...@nvidia.com
Tegra114 has a HW bug that the PLLD/PLLD2
Hi Linus,
Thanks for all of your comments, I'll consider them during my works on the
next iteration. However, I have doubts about this one:
On Tue, 14 Jul 2015, Linus Walleij wrote:
On Tue, Jun 30, 2015 at 2:27 PM, Paul Osmialowski paw...@king.net.pl wrote:
Based on K70P256M150SF3RM.pdf
On Mon, Jul 13, 2015 at 06:35:45PM +0100, Kyle Huey wrote:
This patch modifies the device tree for tegra124 based devices to enable
the Cortex A15 PMU. The interrupt numbers are taken from NVIDIA TRM
DP-06905-001_v03p. This patch was tested on a Jetson TK1.
Updated for proper ordering and
On 4 June 2015 at 19:15, Richard Cochran richardcoch...@gmail.com wrote:
On Thu, Jun 04, 2015 at 10:31:45AM +0200, Michal Suchanek wrote:
You might want to try to run the bus at 60MHz or 80MHz and then the
values would probably again be different.
The first two values are set in DT so the
Hi Stephen,
On Tue, 2015-07-14 at 15:13 -0700, Stephen Boyd wrote:
On 07/10, James Liao wrote:
On Wed, 2015-07-08 at 17:44 -0700, Stephen Boyd wrote:
On 07/08/2015 01:37 AM, James Liao wrote:
MT8173 MMPLL frequency settings are different from common PLLs.
It needs different post
On Wed, Jul 15, 2015 at 03:05:48PM +0800, Chunyan Zhang wrote:
Since ETMv4 driver has been merged, this patch adds ETM nodes for SC9836,
and four funnel input ports to connect with ETM output ports.
Signed-off-by: Chunyan Zhang zhang.chun...@linaro.org
Thanks, applied.
-Olof
--
To
On Wed, Jul 15, 2015 at 10:45:42AM +0200, Ludovic Desroches wrote:
On Tue, Jul 14, 2015 at 08:13:59AM +0200, Sascha Hauer wrote:
On Wed, Jun 10, 2015 at 05:04:57PM +0200, Ludovic Desroches wrote:
Using a string to describe a pin in the device tree can be not enough.
Some controllers may
On Wed, Jul 15, 2015 at 11:38 AM, Arnd Bergmann a...@arndb.de wrote:
The CHRP ISA binding defines that a 8250 compatible UART must have this
property:
clock-frequency S
Standard property, encoded as with encode-int, that shall be the baud-rate
generator's clock input frequency (in
Hi!
On Tue, Jul 14, 2015 at 04:23:07PM -0500, dingu...@opensource.altera.com wrote:
From: Dalon Westergreen dwest...@gmail.com
The Terasic DE0 Atlas board is also known as the DE0-Nano board.
Signed-off-by: Dalon Westergreen dwest...@gmail.com
Signed-off-by: Dinh Nguyen
Thanks Stephen,
On 14/07/15 23:06, Stephen Boyd wrote:
On 07/10, Srinivas Kandagatla wrote:
+static int devm_nvmem_device_match(struct device *dev, void *res, void *data)
+{
+ struct nvmem_device **nvmem = res;
+
+ if (!nvmem || !*nvmem) {
+ WARN_ON(!nvmem ||
On Wednesday 15 July 2015 11:00:59 Linus Walleij wrote:
On Wed, Jul 8, 2015 at 4:53 AM, Simon Glass s...@chromium.org wrote:
This binding differs from that of Linux. Update it and change existing
users.
Signed-off-by: Simon Glass s...@chromium.org
I'm confused by this. Isn't
On Tue, Jul 14, 2015 at 08:13:59AM +0200, Sascha Hauer wrote:
On Wed, Jun 10, 2015 at 05:04:57PM +0200, Ludovic Desroches wrote:
Using a string to describe a pin in the device tree can be not enough.
Some controllers may need extra information to fully describe a pin. It
concerns mainly
On Tue, Jul 07, 2015 at 02:02:05PM -0500, Adrian Alonso wrote:
* Extend pinctrl-imx driver to support iomux lpsr conntroller,
* iMX7D has two iomuxc controllers, iomuxc controller similar as
previous iMX SoC generation and iomuxc-lpsr which provides
low power state rentetion capabilities
From: pi-cheng.chen pi-cheng.c...@linaro.org
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Reviewed-by: Daniel Kurtz djku...@chromium.org
---
Changes in v4:
- Address
Since ETMv4 driver has been merged, this patch adds ETM nodes for SC9836,
and four funnel input ports to connect with ETM output ports.
Signed-off-by: Chunyan Zhang zhang.chun...@linaro.org
---
arch/arm64/boot/dts/sprd/sc9836.dtsi | 99 ++--
1 file changed, 94
When the MPP is configured for analog output the output level is selected by
the AOUT_CTL register, this patch makes it possible to control this.
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
Changes since v1:
- Assign aout_level in pmic_mpp_populate()
Hi Linus,
I had some discussion with an expert here and now I see drawbacks of using
struct for regs, I'll turn it into defines as you suggested.
On Wed, 15 Jul 2015, Paul Osmialowski wrote:
Hi Linus,
Thanks for all of your comments, I'll consider them during my works on the
next
On Wednesday 15 July 2015 12:08:05 Linus Walleij wrote:
On Wed, Jul 15, 2015 at 11:38 AM, Arnd Bergmann a...@arndb.de wrote:
The CHRP ISA binding defines that a 8250 compatible UART must have this
property:
clock-frequency S
Standard property, encoded as with encode-int, that
On Tue, 2015-07-14 at 09:45 +0200, Sascha Hauer wrote:
On Tue, Jul 14, 2015 at 02:19:51PM +0800, chunfeng yun wrote:
hi,
On Fri, 2015-07-10 at 07:10 +0200, Sascha Hauer wrote:
On Wed, Jul 08, 2015 at 05:41:03PM +0800, Chunfeng Yun wrote:
add a DT binding documentation of usb3.0 phy for
Hi,
On Sunday 31 May 2015 09:40 PM, Hans de Goede wrote:
The usb0 phy is connected to an OTG controller, and as such needs some special
handling:
1) It allows explicit control over the pullups, enable these on phy_init and
disable them on phy_exit.
2) It has bits to signal id and vbus
Hi,
On Wednesday 08 July 2015 08:11 PM, Hans de Goede wrote:
sun4i_usb_phy_set_squelch_detect is used by other code, which may be built
as a module, so it should be exported.
Signed-off-by: Hans de Goede hdego...@redhat.com
merged this patch to linux-phy tree.
Cheers
Kishon
---
Changes
On Wednesday 15 July 2015 04:25 PM, Kishon Vijay Abraham I wrote:
Hi,
On Sunday 31 May 2015 09:40 PM, Hans de Goede wrote:
The usb0 phy is connected to an OTG controller, and as such needs some
special
handling:
1) It allows explicit control over the pullups, enable these on phy_init
On 15 July 2015 at 12:50, Kishon Vijay Abraham I kis...@ti.com wrote:
On Friday 10 July 2015 02:18 AM, Joachim Eastwood wrote:
This patch set adds support for the internal USB OTG PHY found
on NXP LPC18xx and LPC43xx devices. Driver takes care of
enabling the PHY and setting the clock rate
On Friday 10 July 2015 02:18 AM, Joachim Eastwood wrote:
This patch set adds support for the internal USB OTG PHY found
on NXP LPC18xx and LPC43xx devices. Driver takes care of
enabling the PHY and setting the clock rate which is need for
USB0 support on this platform.
This version
Hi,
On Saturday 13 June 2015 06:07 PM, Hans de Goede wrote:
Hi Kishon,
Here is a patch series with all my oustanding phy-sun4i-usb changes pending
for merging into 4.3.
This includes the 5th iteration of the OTG support addition, now with the
extcon provider support addition split-out
From: Thierry Reding tred...@nvidia.com
Given a device tree node and a property name, the fdt_count_strings()
function counts the number of strings found in the property value.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
libfdt/fdt_ro.c | 20
libfdt/libfdt.h
From: Thierry Reding tred...@nvidia.com
Given a device tree node and a property name, the new fdt_find_string()
function will look up a given string in the string list contained in the
property's value and return its index.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
libfdt/fdt_ro.c |
From: Thierry Reding tred...@nvidia.com
These three patches add a couple of string functions that have proven
useful in U-Boot's copy of libfdt, so they are likely to be useful for
other users as well.
Patch 1 adds a function to count the number of strings in a property's
value. This also adds a
From: Thierry Reding tred...@nvidia.com
Given a device tree node, a property name and an index, the new function
fdt_get_string_index() will return in an output argument a pointer to
the index'th string in the property's value.
The fdt_get_string() is a shortcut for the above with the index
Hi,
On Wednesday 08 July 2015 08:11 PM, Hans de Goede wrote:
sun4i_usb_phy_set_squelch_detect is used by other code, which may be built
as a module, so it should be exported.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
Changes in v6:
-New patch in v6 of the sunxi musb support
On 07/14/2015 06:11 PM, Stephen Boyd wrote:
On 07/14/2015 04:26 PM, Tim Bird wrote:
3 files changed, 166 insertions(+)
create mode 100644 drivers/misc/qcom-coincell.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 42c3852..0909869 100644
--- a/drivers/misc/Kconfig
Hi Linus,
On Tue, May 05, 2015 at 01:55:10PM +0300, Baruch Siach wrote:
This adds pinctrl and gpio driver to the CX92755 SoC General Purpose Pin
Mapping hardware block. The CX92755 is one SoC from the Conexant Digicolor
series. Pin mapping hardware supports configuring pins as either GPIO, or
Add the PMU node, and move the child devices of the PMU node beneath
this new node, giving it a simple-bus so that the OF platform
device creator will create these child devices. No functional change
from this is expected.
The PMU provides multiple features, including an interrupt, reset,
power
Add the required DT binding documentation for the Marvell PMU driver.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
Documentation/devicetree/bindings/soc/dove/pmu.txt | 56 ++
1 file changed, 56 insertions(+)
create mode 100644
What it says in the subject. Not hopeful of a successful outcome, so I'm
not going to bother wasting time writing stuff here.
Documentation/devicetree/bindings/soc/dove/pmu.txt | 56 ++
arch/arm/Kconfig | 1 +
arch/arm/boot/dts/dove.dtsi
Add the description of the video decoder power domain to the PMU DT
entry.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/boot/dts/dove.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index
Now that we have a PMU driver, we can wire up the RTC interrupt in the
DT description for Dove.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/boot/dts/dove.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
Add the description of the GPU power domain to the PMU DT entry.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/boot/dts/dove.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index
The Qualcomm PM8941 WLED block is used for backlight and should therefor
be in the backlight framework and not in the LED framework. This moves
the driver and adapts to the backlight api instead.
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
On 07/15/2015 12:08 PM, Tim Bird wrote:
On 07/14/2015 06:11 PM, Stephen Boyd wrote:
On 07/14/2015 04:26 PM, Tim Bird wrote:
3 files changed, 166 insertions(+)
create mode 100644 drivers/misc/qcom-coincell.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index
On Wed, 3 Jun 2015, Vignesh R wrote:
Legacy IPs like PWMSS, present under l4per2_7xx_clkdm, cannot support
smart-idle when its clock domain is in HW_AUTO on DRA7 SoCs. Hence,
program clock domain to SW_WKUP.
Signed-off-by: Vignesh R vigne...@ti.com
---
On 07/15/2015 12:44 PM, Stephen Boyd wrote:
On 07/15/2015 12:08 PM, Tim Bird wrote:
On 07/14/2015 06:11 PM, Stephen Boyd wrote:
On 07/14/2015 04:26 PM, Tim Bird wrote:
3 files changed, 166 insertions(+)
create mode 100644 drivers/misc/qcom-coincell.c
diff --git
Fix the status of PCIe DT bindings in the SoC specific DTS to
disabled so that it can be enabled on a specific board by
setting the status to Ok in the board specific DTS.
Signed-off-by: Murali Karicheri m-kariche...@ti.com
---
arch/arm/boot/dts/k2e.dtsi | 1 +
On Wednesday, July 15, 2015 at 05:59:46 PM, Brian Norris wrote:
Hi Michal,
Hi all,
On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut wrote:
The problem is, if you add a new DT binding, you'd have to support it
forever, no matter how bad idea that binding turned out to be.
Agreed,
On 07/14/2015 06:07 PM, Rob Herring wrote:
On Tue, Jul 14, 2015 at 4:41 PM, Tim Bird tim.b...@sonymobile.com wrote:
Rob,
Thanks for the quick feedback. You responded off-list. I don't know if
you meant to do this or not. My response is off-list as well, but let me
know if I should have
On Wed, 15 Jul 2015, Paul Walmsley wrote:
On Wed, 3 Jun 2015, Vignesh R wrote:
Legacy IPs like PWMSS, present under l4per2_7xx_clkdm, cannot support
smart-idle when its clock domain is in HW_AUTO on DRA7 SoCs. Hence,
program clock domain to SW_WKUP.
Signed-off-by: Vignesh R
On Wed, Jul 15, 2015 at 1:59 PM, Russell King
rmk+ker...@arm.linux.org.uk wrote:
Add the required DT binding documentation for the Marvell PMU driver.
Looks mostly fine to me.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
Documentation/devicetree/bindings/soc/dove/pmu.txt | 56
On 07/15/2015 03:02 AM, Steffen Trumtrar wrote:
Hi!
On Tue, Jul 14, 2015 at 04:23:07PM -0500, dingu...@opensource.altera.com
wrote:
From: Dalon Westergreen dwest...@gmail.com
The Terasic DE0 Atlas board is also known as the DE0-Nano board.
Signed-off-by: Dalon Westergreen
On Wed, Jul 15, 2015 at 1:24 PM, Tim Bird tim.b...@sonymobile.com wrote:
On 07/14/2015 06:07 PM, Rob Herring wrote:
On Tue, Jul 14, 2015 at 4:41 PM, Tim Bird tim.b...@sonymobile.com wrote:
On 07/13/2015 08:59 PM, Rob Herring wrote:
On Mon, Jul 13, 2015 at 6:39 PM, Tim Bird
There was a race condition where during cleanup/release operation
on-going streaming would cause a kernel panic because the hardware
module was disabled prematurely with IRQ still pending.
Fixes: 417d2e507edc ([media] media: platform: add VPFE capture driver support
for AM437X)
Cc:
From: Dinh Nguyen dingu...@opensource.altera.com
Use stdout-path dts property for kernel console.
Signed-off-by: Dinh Nguyen dingu...@opensource.altera.com
---
arch/arm/boot/dts/socfpga_arria10.dtsi| 5 +
arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 3 ++-
On Wed, Jul 15, 2015 at 03:39:19PM -0500, Rob Herring wrote:
On Wed, Jul 15, 2015 at 1:59 PM, Russell King
rmk+ker...@arm.linux.org.uk wrote:
Add the required DT binding documentation for the Marvell PMU driver.
Looks mostly fine to me.
Signed-off-by: Russell King
On 07/09, Gabriel Fernandez wrote:
@@ -270,6 +285,73 @@ static int clkgen_pll_is_enabled(struct clk_hw *hw)
return !poweroff;
}
+static int __clkgen_pll_enable(struct clk_hw *hw)
+{
+ struct clkgen_pll *pll = to_clkgen_pll(hw);
+ unsigned long timeout;
+ int ret = 0;
Hi Jon,
On 15 July 2015 at 07:29, Jon Loeliger j...@jdl.com wrote:
So, like, Thierry Reding said:
From: Thierry Reding tred...@nvidia.com
These three patches add a couple of string functions that have proven
useful in U-Boot's copy of libfdt, so they are likely to be useful for
other
Hi,
some comments.
On Wed, 3 Jun 2015, Vignesh R wrote:
Add hwmod entries for the PWMSS on DRA7.
Set l4_root_clk_div as the main_clk of PWMSS. It is fixed-factored clock
equal to L4PER2_L3_GICLK/2(l3_iclk_div/2).
As per AM57x TRM SPRUHZ6[1], October 2014, Section 29.1.3 Table 29-4,
clock
On Wed, Jul 15, 2015 at 01:13:57PM +0200, Thierry Reding wrote:
From: Thierry Reding tred...@nvidia.com
Given a device tree node and a property name, the fdt_count_strings()
function counts the number of strings found in the property value.
Signed-off-by: Thierry Reding tred...@nvidia.com
On 07/15/2015 02:22 PM, Rob Herring wrote:
On Wed, Jul 15, 2015 at 1:24 PM, Tim Bird tim.b...@sonymobile.com wrote:
On 07/14/2015 06:07 PM, Rob Herring wrote:
On Tue, Jul 14, 2015 at 4:41 PM, Tim Bird tim.b...@sonymobile.com wrote:
On 07/13/2015 08:59 PM, Rob Herring wrote:
On Mon, Jul 13,
On Wednesday, July 15, 2015 at 11:45:07 AM, Michal Suchanek wrote:
On 4 June 2015 at 19:15, Richard Cochran richardcoch...@gmail.com wrote:
On Thu, Jun 04, 2015 at 10:31:45AM +0200, Michal Suchanek wrote:
You might want to try to run the bus at 60MHz or 80MHz and then the
values would
On Tue, Jul 14, 2015 at 10:20 PM, Shawn Guo shawn...@kernel.org wrote:
The wakeup capability is somehow linux specific, and all existing
bindings name the property linux,wakeup to reflect that, e.g.
Documentation/devicetree/bindings/input/gpio-matrix-keypad.txt. Let's
follow the convention.
On 2015-07-13 17:10, Shawn Guo wrote:
On Fri, Jul 03, 2015 at 10:06:39AM +0200, Stefan Agner wrote:
Define Vybrid's UART0, connected to the Colibri pinout UART_A, as
standard output.
Signed-off-by: Stefan Agner ste...@agner.ch
---
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi | 1 +
1 file
Hi Shawn,
Comments inline, thanks for reviewing :)
Regards
Adrian
-Original Message-
From: Shawn Guo [mailto:shawn...@kernel.org]
Sent: Wednesday, July 15, 2015 2:23 AM
To: Alonso Lazcano Adrian-B38018
Cc: linux-arm-ker...@lists.infradead.org; shawn@linaro.org;
Hi Michal,
On Wed, Jul 15, 2015 at 01:52:27PM +0200, Marek Vasut wrote:
The problem is, if you add a new DT binding, you'd have to support it
forever, no matter how bad idea that binding turned out to be.
Agreed, and a solid NAK to this patch. I could have sworn I gave such a
response when
On Mon, 2015-07-13 at 18:19 +0800, Daniel Kurtz wrote:
On Mon, Jul 13, 2015 at 5:04 PM, YH Huang yh.hu...@mediatek.com wrote:
Add display PWM driver support to modify backlight for MT8173 and MT6595.
The PWM has one channel to control the brightness of the display.
When the (high_width /
On Wed, Jul 15, 2015 at 12:05:25PM +0200, Sascha Hauer wrote:
On Wed, Jul 15, 2015 at 10:45:42AM +0200, Ludovic Desroches wrote:
On Tue, Jul 14, 2015 at 08:13:59AM +0200, Sascha Hauer wrote:
On Wed, Jun 10, 2015 at 05:04:57PM +0200, Ludovic Desroches wrote:
Using a string to describe a
Hi Rob,
I have got your point by chatting with you though IRC,
I will improve my patch according to your suggestion.
Thanks for your help.
On 14 July 2015 at 23:48, Fu Wei fu@linaro.org wrote:
Hi Rob,
Great thanks for your review :-)
On 14 July 2015 at 22:49, Rob Herring
On 2015-07-15 03:57, Shawn Guo wrote:
On Tue, Jul 14, 2015 at 07:23:23PM +0530, Sanchayan Maity wrote:
Add a device tree property which allows to specify the minimum sample
time which can be used to calculate the actual ADC cycles required
depending on the hardware.
Signed-off-by: Sanchayan
So, like, Thierry Reding said:
From: Thierry Reding tred...@nvidia.com
These three patches add a couple of string functions that have proven
useful in U-Boot's copy of libfdt, so they are likely to be useful for
other users as well.
Patch 1 adds a function to count the number of strings
On Wed, Jul 15, 2015 at 2:23 AM, Shawn Guo shawn...@kernel.org wrote:
On Tue, Jul 07, 2015 at 02:02:05PM -0500, Adrian Alonso wrote:
* Extend pinctrl-imx driver to support iomux lpsr conntroller,
* iMX7D has two iomuxc controllers, iomuxc controller similar as
previous iMX SoC generation and
On Mon, 2015-07-13 at 18:20 +0800, Daniel Kurtz wrote:
On Mon, Jul 13, 2015 at 5:04 PM, YH Huang yh.hu...@mediatek.com wrote:
Document the device-tree binding of MediatTek display PWM.
The PWM has one channel to control the backlight brightness for display.
It supports MT8173 and MT6595.
On Tue, 2015-07-14 at 12:13 +0100, Sudeep Holla wrote:
On 14/07/15 09:37, Ian Campbell wrote:
On Wed, 2015-07-01 at 13:36 +0100, Sudeep Holla wrote:
diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
new file mode
Define Vybrid's UART0, connected to the Colibri pinout UART_A, as
standard output.
Signed-off-by: Stefan Agner ste...@agner.ch
---
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
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