On 31-07-15, 09:37, Stephen Boyd wrote:
For qcom platforms, the frequency is almost always constant.
There may be some tables where we have a couple higher
frequencies than others because the speed bin is different.
Otherwise the voltage/current is changing based on the silicon
Hi Chen-Yu,
On Mon, Aug 3, 2015 at 12:37 PM, Chen-Yu Tsai w...@csie.org wrote:
Hi,
On Mon, Aug 3, 2015 at 7:35 AM, Julian Calaby julian.cal...@gmail.com wrote:
Hi Timo,
On Mon, Aug 3, 2015 at 5:23 AM, Timo Sigurdsson
public_tim...@silentcreek.de wrote:
sun7i-a20.dtsi contains an cpufreq
Signed-off-by: Matt Ranostay mranos...@gmail.com
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 6284568..0f318c3
Hi,
On 7/31/2015 11:47 PM, Mark Brown wrote:
On Tue, Jul 28, 2015 at 02:11:12PM +0530, Vignesh R wrote:
Introduce use_mmap_read field in spi_message struct. This can be set by
mtd devices (m25p80) to indicate to spi-master (ti-qspi) to perform
memory mapped read. This helps to distinguish
On 07/31/2015 11:49 PM, Mark Brown wrote:
On Tue, Jul 28, 2015 at 02:11:15PM +0530, Vignesh R wrote:
Add qspi memory mapped region entries for DRA7xx based SoCs.
Signed-off-by: Vignesh R vigne...@ti.com
qspi: qspi@4790 {
compatible = ti,am4372-qspi;
Add support for the PulsedLight LIDAR rangefinder sensor which allows
high speed (over 300Hz) distance measurements using Barker Coding within
40 meter range.
Support only tested on the blue label rev 2, but may work using low
sample frequencies on the original version.
Signed-off-by: Matt
PulsedLight blue label v2 LIDAR sensor can be polled over 100HZ with
the sysfs + hrtimer iio trigger, or using single raw measurment.
This patchset adds support for this range finding LIDAR module, and reports
distance back in meters to centimeter resolution with +/- 2.5 CM of accuracy
at ~40
On Mon, Aug 3, 2015 at 12:22 PM, Julian Calaby julian.cal...@gmail.com wrote:
Hi Chen-Yu,
On Mon, Aug 3, 2015 at 12:37 PM, Chen-Yu Tsai w...@csie.org wrote:
Hi,
On Mon, Aug 3, 2015 at 7:35 AM, Julian Calaby julian.cal...@gmail.com
wrote:
Hi Timo,
On Mon, Aug 3, 2015 at 5:23 AM, Timo
On 02.08.2015 01:22, Matt Ranostay wrote:
On Sat, Aug 1, 2015 at 2:17 PM, Jonathan Cameron
ji...@jic23.retrosnub.co.uk wrote:
On 1 August 2015 09:39:11 BST, Vladimir Barinov
vladimir.bari...@cogentembedded.com wrote:
Hi Matt,
Find minor comments.
On 01.08.2015 06:58, Matt Ranostay wrote:
On 9 July 2015 at 15:57, Pi-Cheng Chen pi-cheng.c...@linaro.org wrote:
MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single cluster
share the same power and clock domain. This series tries to add cpufreq
support
for MT8173 SoC.
changes in v6:
- Move clock and regulator
On 08/01/2015 05:58 AM, Matt Ranostay wrote:
[...]
+
+struct lidar_data {
+ struct mutex lock;
+ struct iio_dev *indio_dev;
+ struct i2c_client *client;
+
+ /* config */
+ int calib_bias;
+
+ u16 buffer[5]; /* 2 byte distance + 8 byte timestamp */
Needs to be in
Regards,
Igal Liberman.
-Original Message-
From: Wood Scott-B07421
Sent: Thursday, July 30, 2015 11:16 PM
To: Liberman Igal-B31950
Cc: devicetree@vger.kernel.org; linuxppc-...@lists.ozlabs.org; Bucur
Madalin-Cristian-B32716; Xie Shaohui-B21989; linux-ker...@vger.kernel.org
On 08/01/2015 05:58 AM, Matt Ranostay wrote:
+static int lidar_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan,
+ int *val, int *val2, long mask)
+{
+ struct lidar_data *data = iio_priv(indio_dev);
+ int ret =
On 29/07/15 05:28, Matt Ranostay wrote:
Jonathan,
Does this solve the issues in v3 minus the apds9960_regfield_init() cleanup?
Thanks,
Matt
Sorry, was on holiday last week. Catching up now.
On Sun, Jul 19, 2015 at 8:57 PM, Matt Ranostay mranos...@gmail.com wrote:
This patchset
sun7i-a20-bananapi.dts doesn't contain regulator nodes for the AXP209 PMU
driver, so add them to allow for voltage-scaling with cpufreq-dt.
Signed-off-by: Timo Sigurdsson public_tim...@silentcreek.de
---
Changes since v1 (RFC):
- Dropped the changes to the cpufreq operating points and renamed
On 22/07/15 17:04, Denis Carikli wrote:
Signed-off-by: Denis Carikli de...@eukrea.com
Part of the same job as patch 2. Please roll them into a single patch.
---
Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
On 22/07/15 17:04, Denis Carikli wrote:
Signed-off-by: Denis Carikli de...@eukrea.com
Given this is a 10 bit convertor and the one you are effectively
claiming it is compatible with is a 12 bit convertor, you have
more to do in the driver than this (slightly!).
The issue is in adc128_read_raw
On 22/07/15 17:04, Denis Carikli wrote:
Signed-off-by: Denis Carikli de...@eukrea.com
---
drivers/iio/adc/ti-adc128s052.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c
index
When a default bus like the simple-bus should be used someone had to
call of_platform_populate() with the default match table. This match
table was not exported, so it is impossible for code build as a module
to use this. Instead of exporting of_default_bus_match_table, add a new
function which
On 02/08/15 10:42, Lars-Peter Clausen wrote:
On 08/01/2015 05:58 AM, Matt Ranostay wrote:
[...]
+
+struct lidar_data {
+struct mutex lock;
+struct iio_dev *indio_dev;
+struct i2c_client *client;
+
+/* config */
+int calib_bias;
+
+u16 buffer[5]; /* 2 byte
On 08/02/2015 08:23 PM, Jonathan Cameron wrote:
On 02/08/15 10:42, Lars-Peter Clausen wrote:
On 08/01/2015 05:58 AM, Matt Ranostay wrote:
[...]
+
+struct lidar_data {
+ struct mutex lock;
+ struct iio_dev *indio_dev;
+ struct i2c_client *client;
+
+ /* config */
+ int
On 20/07/15 05:00, Matt Ranostay wrote:
APDS9960 is a combination of ALS, proximity, and gesture sensors.
This patch adds support for these functions along with gain control,
integration time, and event thresholds.
Signed-off-by: Matt Ranostay mranos...@gmail.com
Hi Matt,
I'm afraid with
On 01/08/15 23:22, Matt Ranostay wrote:
On Sat, Aug 1, 2015 at 2:17 PM, Jonathan Cameron
ji...@jic23.retrosnub.co.uk wrote:
On 1 August 2015 09:39:11 BST, Vladimir Barinov
vladimir.bari...@cogentembedded.com wrote:
Hi Matt,
Find minor comments.
On 01.08.2015 06:58, Matt Ranostay
On 29/07/15 00:12, Martin Kepplinger wrote:
Am 2015-07-28 um 11:28 schrieb Mark Rutland:
On Tue, Jul 28, 2015 at 10:11:29AM +0100, Martin Kepplinger wrote:
On 2015-07-27 19:33, Mark Rutland wrote:
On Mon, Jul 27, 2015 at 03:37:48PM +0100, Martin Kepplinger wrote:
Am 2015-07-27 um 16:23
On Mon, 27 Jul 2015, Eric Anholt wrote:
+/* Unmasks the IPI on the CPU wen it's first brought online. */
when
+static int bcm2836_arm_irqchip_cpu_notify(struct notifier_block *nfb,
+ unsigned long action, void *hcpu)
+{
+ unsigned int cpu =
Hi,
On 01-08-15 11:30, Maxime Ripard wrote:
On Fri, Jul 31, 2015 at 06:13:06PM +0200, Hans de Goede wrote:
mmc-pwrseq-simple supports multiple reset/enable gpios (by listing
them all as reset-gpios and setting GPIO_ACTIVE_LOW/HIGH depending
on which value they need to be to activate things).
sun7i-a20.dtsi contains an cpufreq operating point at 0.9 volts. Most A20 boards
(or all?), however, do not allow the voltage to go below 1.0V. Thus, raise the
voltage for the lowest operating point to 1.0V so all boards can actually use
it.
Signed-off-by: Timo Sigurdsson
On 02/08/15 19:39, Lars-Peter Clausen wrote:
On 08/02/2015 08:23 PM, Jonathan Cameron wrote:
On 02/08/15 10:42, Lars-Peter Clausen wrote:
On 08/01/2015 05:58 AM, Matt Ranostay wrote:
[...]
+
+struct lidar_data {
+ struct mutex lock;
+ struct iio_dev *indio_dev;
+ struct i2c_client
On Sun, Aug 2, 2015 at 2:42 AM, Lars-Peter Clausen l...@metafoo.de wrote:
On 08/01/2015 05:58 AM, Matt Ranostay wrote:
[...]
+
+struct lidar_data {
+ struct mutex lock;
+ struct iio_dev *indio_dev;
+ struct i2c_client *client;
+
+ /* config */
+ int calib_bias;
+
+
Hi Stefan,
you didn't include me in your answer, hence the late reply...
Stefan Monnier schrieb am 29.07.2015 02:02:
IMHO for a common maximum opp that's a good approach. But for the lowest
frequency setting, it would seem more logical to me, to raise the voltage
to a point where all boards
On 08/01/2015 02:58 AM, Brian Norris wrote:
On Tue, Jul 28, 2015 at 02:11:15PM +0530, Vignesh R wrote:
Add qspi memory mapped region entries for DRA7xx based SoCs.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1
Enable the NAND controller node on the AP148 platform. Provide pinmux
information.
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36
1 file changed, 36 insertions(+)
diff --git
The nand controller in IPQ806x is of the 'EBI2 type'. Use the corresponding
compatible string.
Cc: devicetree@vger.kernel.org
Reviewed-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Archit Taneja arch...@codeaurora.org
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 15 +++
1 file
Add DT bindings document for the Qualcomm NAND controller driver.
Cc: devicetree@vger.kernel.org
v3:
- Don't use '0x' when specifying nand controller address space
- Add optional property for on-flash bbt usage
Acked-by: Andy Gross agr...@codeaurora.org
Signed-off-by: Archit Taneja
On 07/31/2015 07:18 PM, Sekhar Nori wrote:
On Tuesday 28 July 2015 02:11 PM, Vignesh R wrote:
Add qspi memory mapped region entries for DRA7xx based SoCs.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
The system bus and chipidea IP have different limitations for
both host and device mode.
For example, with below errata, we need to enable SDIS(Stream Disable
Mode) at host mode. But we don't want it for device mode at the
same system.
TAR 9000378958
Title: Non-Double Word Aligned Buffer Address
The zero-length packet is the sendor tells the receiver that there
is no more data, so it is only needed at the TX side.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/chipidea/udc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
It is used to change ahb burst configuration for platforms, it is
vendor specific.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt | 4
1 file changed, 4 insertions(+)
diff --git
After setting ahb burst configuration as 0, we can increase tx/rx
burst size, it will improve the USB performance
Signed-off-by: Peter Chen peter.c...@freescale.com
---
arch/arm/boot/dts/imx6qdl.dtsi | 4
arch/arm/boot/dts/imx6sl.dtsi | 3 +++
arch/arm/boot/dts/imx6sx.dtsi | 3 +++
3
Stream mode enable is known for better performance, this stream mode
enable patch has been passed with stress tests at device mode for
imx6sl and imx6sx, and no issue is found.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/chipidea/ci_hdrc_imx.c | 16 ++--
1 file
It is used to override the default setting for burst size, changing
burst size takes effect only when the SBUSCFG.AHBBRST = 0.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git
It can improve the USB performance when choosing larger
burst size at some systems (bus size is larger), there is
no side effect if this burst size is larger than bus size.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
arch/arm/boot/dts/imx6qdl.dtsi | 8
The user can adjust it through dts or platform data
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/chipidea/bits.h | 4
drivers/usb/chipidea/ci.h| 1 +
drivers/usb/chipidea/core.c | 35 +++
include/linux/usb/chipidea.h | 4
4
With this setting and AHBBRST at SBUSCFG as Incremental burst of
unspecified length, each non-burst size can be taken as single
transfer. It is benefit for non-burst size transfer.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/chipidea/usbmisc_imx.c | 12 ++--
1 file
Hi all,
In this series, I add several new interfaces for chipidea driver,
they are mainly for system configuration adjustment. The USB
performance may be improved with these configuration changing,
but each vendor driver owner needs to consult with your IC
owner which configuration parameters are
The users can change it through dts or platform data if they
want to change the default value.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/chipidea/bits.h | 3 +++
drivers/usb/chipidea/core.c | 14 ++
include/linux/usb/chipidea.h | 2 ++
3 files changed, 19
Hi Timo,
On Mon, Aug 3, 2015 at 5:23 AM, Timo Sigurdsson
public_tim...@silentcreek.de wrote:
sun7i-a20.dtsi contains an cpufreq operating point at 0.9 volts. Most A20
boards
(or all?), however, do not allow the voltage to go below 1.0V. Thus, raise the
voltage for the lowest operating point
Hi Sergei,
On Fri, Jul 31, 2015 at 6:50 PM, Sergei Shtylyov
sergei.shtyl...@cogentembedded.com wrote:
Hello.
On 7/31/2015 5:23 AM, Magnus Damm wrote:
The compatible property text contradicts even the example given in the
MMCIF
binding document itself; moreover, the Renesas MMCIF driver
Hi,
On Mon, Aug 3, 2015 at 7:35 AM, Julian Calaby julian.cal...@gmail.com wrote:
Hi Timo,
On Mon, Aug 3, 2015 at 5:23 AM, Timo Sigurdsson
public_tim...@silentcreek.de wrote:
sun7i-a20.dtsi contains an cpufreq operating point at 0.9 volts. Most A20
boards
(or all?), however, do not allow
On Hi6220, below memory regions in DDR have specific purpose:
- 0x05e0, - 0x05ef,: For MCU firmware using at runtime;
- 0x0740,f000 - 0x0740,: For MCU firmware's section;
- 0x06df,f000 - 0x06df,: For mailbox message data.
This patch reserves these memory regions and add device
Add Hisilicon mailbox's common driver, it registers mailbox channels
into framework; it also invokes low level callback functions for
register's related operations. Enhance rx channel's message queue,
which is based on the code in drivers/mailbox/omap-mailbox.c.
Enable Hi6220 mailbox driver as
Document the new compatible for Hisilicon mailbox driver.
Signed-off-by: Leo Yan leo@linaro.org
---
.../devicetree/bindings/mailbox/hisi-mailbox.txt | 57 ++
1 file changed, 57 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/hisi-mailbox.txt
This patch series is to implement Hisilicon's mailbox driver and enable
the mailbox controller on Hi6220.
The Hisilicon mailbox supports up to 32 channels. Each channel is
unidirectional with a maximum message size of 8 words. I/O is performed
using register access (there is no DMA) and the cell
On Fri, Jul 31, 2015 at 12:54:05AM +0300, Sergei Shtylyov wrote:
Define the generic R8A7794 part of the MMCIF0 device node.
Based on the orginal patch by Shinobu Uehara shinobu.uehara...@renesas.com.
Signed-off-by: Sergei Shtylyov sergei.shtyl...@cogentembedded.com
---
Changes in
Enable SRAM node and stub clock node for Hi6220; furthermore
add the CPU's clock so it will be used by cpufreq-dt driver.
Signed-off-by: Leo Yan leo@linaro.org
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git
On Hi6220, there have some clocks which can use mailbox channel to send
messages to power controller to change frequency; this includes CPU, GPU
and DDR clocks.
For dynamic frequency scaling, firstly need write the frequency value to
SRAM region, and then send message to mailbox to trigger power
Document hisilicon,hi6220-sramctrl for SRAM controller.
Signed-off-by: Leo Yan leo@linaro.org
---
.../devicetree/bindings/arm/hisilicon/hisilicon.txt| 18 ++
1 file changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
This series adds support for hisilicon stub clock driver. On hi6220,
the bootloader needs load the firmware image and set info for OPPs;
after run into kernel, the stub clock driver is used to communicate
w/t firmware for cpu dynamic frequency scaling.
In patch series v1/v2, the stub clock driver
Document the new compatible for stub clock driver which is used for CPU
and DDR's dynamic frequency scaling.
Signed-off-by: Leo Yan leo@linaro.org
---
.../devicetree/bindings/clock/hi6220-clock.txt| 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git
*of_iomap()* will check the device node pointer, and if the pointer is
NULL it will return error code. So refine clock's init flow by checking
the device node with this simple way; and polish a little for the print
out message.
Signed-off-by: Leo Yan leo@linaro.org
---
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