On Fri, Aug 21, 2015 at 02:50:35PM +0530, Varadarajan Narayanan wrote:
Add initial dts files and SoC support for IPQ40XX
Please ignore this. Missed the Devicetree bindings documentation.
Will post a revised patch.
Thanks
Varada
Signed-off-by: Varadarajan Narayanan var...@codeaurora.org
Add initial dts files and SoC support for IPQ40XX
Signed-off-by: Varadarajan Narayanan var...@codeaurora.org
---
Changes in v2:
- Added devicetree bindings documentation
.../devicetree/bindings/clock/qca,gcnt.txt | 14
Documentation/devicetree/bindings/ipq.txt | 16
On Thu, 2015-08-20 at 16:28 +0200, Daniel Lezcano wrote:
On 08/17/2015 04:10 PM, Yingjoe Chen wrote:
On Thu, 2015-08-13 at 10:35 +0200, Daniel Lezcano wrote:
On 07/22/2015 10:14 AM, Yingjoe Chen wrote:
Spurious mtk timer interrupt is noticed at boot and cause kernel
crash. It seems if GPT
On Fri, Aug 21, 2015 at 08:24:16PM +0900, Jingoo Han wrote:
On 2015. 8. 21., at PM 7:01, Yakir Yang y...@rock-chips.com wrote:
Hi Jingoo,
在 2015/8/21 16:20, Jingoo Han 写道:
On 2015. 8. 19., at PM 11:48, Yakir Yang y...@rock-chips.com wrote:
.
On Thu, Aug 20, 2015 at 12:10:24PM +0100, Gabriele Paoloni wrote:
Hi Lucas
Again many thanks for explaining and for your time.
I got your point now and I have dug a bit better in the PCI_DOMAINS code.
However I have a question...see inline below
-Original Message-
From:
On Monday 17 August 2015 01:28:07 Liguozhu wrote:
Thanks, Arnd.
Regarding the ae-name: it is the name of the Acceleration Engine. It is
provided
by the BIOS according to the position and the feature enabled of the IP.
So soc0 means it is on SoC No. 0, while n4 means it is running on
On 08/21/2015 03:47 AM, Michael Welling wrote:
On Thu, Aug 20, 2015 at 05:41:30PM +0530, Vignesh R wrote:
On 08/19/2015 11:38 PM, Michael Welling wrote:
On Wed, Aug 12, 2015 at 01:44:22PM -0500, Michael Welling wrote:
On Wed, Aug 12, 2015 at 11:56:36AM +0530, Vignesh R wrote:
Hi Michael,
Ping?
- Sanchayan.
On 15-08-06 21:28:22, Sanchayan Maity wrote:
Add iio_hwmon node to expose the temperature channel on Vybrid
as hardware monitor device using the iio_hwmon driver.
Signed-off-by: Sanchayan Maity maitysancha...@gmail.com
---
arch/arm/boot/dts/vfxxx.dtsi | 5 +
1
Hi Tony,
On Friday 21 August 2015 01:11 PM, Tony Lindgren wrote:
* Kishon Vijay Abraham I kis...@ti.com [150820 05:39]:
Hi,
On Monday 03 August 2015 05:56 PM, Kishon Vijay Abraham I wrote:
Changes from v1:
*) return on -EPROBE_DEFER and other fatal errors. (Don't return only
if the
Hi Liviu
Many Thanks for reviewing
-Original Message-
From: linux-pci-ow...@vger.kernel.org [mailto:linux-pci-
ow...@vger.kernel.org] On Behalf Of Liviu Dudau
Sent: Friday, August 21, 2015 2:43 PM
To: Gabriele Paoloni
Cc: Lucas Stach; Wangzhou (B); Bjorn Helgaas;
Hello,
The patchset adds support for 4 wire touchscreen on Toradex Colibri
VF50 modules.
Thanks Dmitry for your feedback.
Changes since v3:
1. Add a #define for the average readings measurement.
2. Instead of configuring gpios every open, configure them on request.
3. Use a memory barrier and
This adds device tree binding documentation for the Colibri VF50
touchscreen driver.
Signed-off-by: Sanchayan Maity maitysancha...@gmail.com
---
.../bindings/input/touchscreen/colibri-vf50-ts.txt | 36 ++
1 file changed, 36 insertions(+)
create mode 100644
The Colibri Vybrid VF50 module supports 4-wire touchscreens using
FETs and ADC inputs. This driver uses the IIO consumer interface
and relies on the vf610_adc driver based on the IIO framework.
Signed-off-by: Sanchayan Maity maitysancha...@gmail.com
---
drivers/input/touchscreen/Kconfig
Add device tree node for touchscreen support on Colibri VF50. The
touchscreen functionality on VF50 uses the ADC channels of Vybrid
and some GPIOs. Also add pinctrl nodes for proper pinmux.
Signed-off-by: Sanchayan Maity maitysancha...@gmail.com
---
arch/arm/boot/dts/vf500-colibri-eval-v3.dts |
On Monday 17 August 2015 17:17:50 Kenneth Lee wrote:
Thanks, Arnd,
You are right. This is the same IP as hip04_mdio.c. We just mis-understand the
hardware design. We will merge them and re-submit the patches.
Ok, great!
Arnd
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Hi all,
sorry for HTML mail spam last night ... couple of nits below
On Wed, Aug 5, 2015 at 8:19 PM, Punnaiah Choudary Kalluri
punnaiah.choudary.kall...@xilinx.com wrote:
Device-tree binding documentation for Xilinx zynqmp dma engine used in
Zynq UltraScale+ MPSoC.
Signed-off-by: Punnaiah
On Fri 21 Aug 03:32 PDT 2015, Varadarajan Narayanan wrote:
Add initial dts files and SoC support for IPQ40XX
Signed-off-by: Varadarajan Narayanan var...@codeaurora.org
---
Changes in v2:
- Added devicetree bindings documentation
.../devicetree/bindings/clock/qca,gcnt.txt | 14
From: Dinh Nguyen dingu...@opensource.altera.com
Add the base DTS for Altera's SoCFPGA Stratix 10 platform.
Signed-off-by: Dinh Nguyen dingu...@opensource.altera.com
---
v3: change #address-cells and #size-cells to 2
change the GIC address to 0xfffc1000
update the GIC virtual CPU reg
This patch adds 'interrupt-parent' properties to the instantation example in
the docs for the devicetree bindings of the Xilinx AXI DMA driver.
Signed-off-by: Moritz Fischer moritz.fisc...@ettus.com
---
Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 3 +++
1 file changed, 3
On 08/12/2015 04:26 AM, Simon Horman wrote:
Define the SILK board dependent part of the SDHI1 (connected to micro-SD slot)
device nodes along with the necessary voltage regulators.
Based on the original patch by Vladimir Barinov
vladimir.bari...@cogentembedded.com.
Signed-off-by: Sergei
On Fri, Aug 21, 2015 at 1:20 AM, Yinghai Lu ying...@kernel.org wrote:
For device resource PREF bit setting under bridge 64-bit pref resource,
we need to make sure only set PREF for 64bit resource, so set
IORESOUCE_MEM_64 for 64bit resource during OF device resource flags
parsing.
Link:
On Fri, Aug 21, 2015 at 11:18 AM, Rob Herring robherri...@gmail.com wrote:
On Fri, Aug 21, 2015 at 1:20 AM, Yinghai Lu ying...@kernel.org wrote:
For device resource PREF bit setting under bridge 64-bit pref resource,
we need to make sure only set PREF for 64bit resource, so set
The current/old gpio framework used doesn't properly listen to
ACTIVE_LOW and ACTIVE_HIGH flags. The newer gpio framework takes into
account these flags when setting gpio values.
Also use gpiod_set_value_cansleep since wake and reset pins can be
provided by bus based io expanders.
Signed-off-by:
On Fri, Aug 21, 2015 at 10:47:06AM +0100, Alexander Sverdlin wrote:
Now as i2c-davinci driver has special handling for Keystone it's time to
switch
the device tree to use new compatible property.
Signed-off-by: Alexander Sverdlin alexander.sverd...@nokia.com
---
On Wed, Aug 19, 2015 at 10:37:35AM +0100, Leo Yan wrote:
On Hi6220, below memory regions in DDR have specific purpose:
0x05e0, - 0x05ef,: For MCU firmware using at runtime;
0x0740,f000 - 0x0740,: For MCU firmware's section;
0x06df,f000 - 0x06df,: For mailbox message
On 08/21/2015 11:57 PM, Sergei Shtylyov wrote:
Define the SILK board dependent part of the SDHI1 (connected to micro-SD slot)
device nodes along with the necessary voltage regulators.
Based on the original patch by Vladimir Barinov
vladimir.bari...@cogentembedded.com.
Signed-off-by: Sergei
On Fri, Aug 21, 2015 at 10:24:30AM +0100, Will Deacon wrote:
On Thu, Aug 20, 2015 at 12:37:29PM +0100, Jens Wiklander wrote:
On Wed, Aug 19, 2015 at 05:50:09PM +0100, Will Deacon wrote:
On Wed, Aug 19, 2015 at 09:40:25AM +0100, Jens Wiklander wrote:
Adds helpers to do SMC based on ARM
add xHCI and phy drivers for MT8173-EVB
Signed-off-by: Chunfeng Yun chunfeng@mediatek.com
---
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 16 +++
arch/arm64/boot/dts/mediatek/mt8173.dtsi| 44 +
2 files changed, 60 insertions(+)
diff --git
support usb3.0 phy of mt65xx SoCs
Signed-off-by: Chunfeng Yun chunfeng@mediatek.com
---
drivers/phy/Kconfig | 9 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-mt65xx-usb3.c | 456 ++
3 files changed, 466 insertions(+)
create
MTK xhci host controller defines some extra SW scheduling
parameters for HW to minimize the scheduling effort for
synchronous and interrupt endpoints. The parameters are
put into reseved DWs of slot context and endpoint context
Signed-off-by: Chunfeng Yun chunfeng@mediatek.com
---
add a DT binding documentation of usb3.0 phy for MT65xx
SoCs from Mediatek.
Signed-off-by: Chunfeng Yun chunfeng@mediatek.com
---
.../devicetree/bindings/phy/phy-mt65xx-usb.txt | 69 ++
1 file changed, 69 insertions(+)
create mode 100644
add a DT binding documentation of xHCI host controller for the
MT8173 SoC from Mediatek.
Signed-off-by: Chunfeng Yun chunfeng@mediatek.com
---
.../devicetree/bindings/usb/mt8173-xhci.txt| 52 ++
1 file changed, 52 insertions(+)
create mode 100644
From 4cab60015fd73f37b7c970ba56c2625fe346fcf3 Mon Sep 17 00:00:00 2001
From: Chunfeng Yun chunfeng@mediatek.com
Date: Sat, 22 Aug 2015 09:35:14 +0800
Subject: [PATCH v6 0/5] Mediatek xHCI support
The patch supports MediaTek's xHCI controller.
There are some differences from xHCI spec:
1. The
* Kishon Vijay Abraham I kis...@ti.com [150819 23:38]:
Hi,
On Thursday 06 August 2015 02:17 PM, Tony Lindgren wrote:
* Kishon Vijay Abraham I kis...@ti.com [150805 07:10]:
On Wednesday 05 August 2015 01:31 PM, Tony Lindgren wrote:
We don't have syscon-otghs and to me it seems we need a
Hi,
On Aug 20, 2015, at 10:20 PM, Marek Vasut ma...@denx.de wrote:
On Thursday, August 20, 2015 at 06:06:49 PM, vikas wrote:
Hi,
Hi!
[...]
It's the location of the SRAM fifo. Also direct mode location I think,
if that were ever used.
Hmm...It is the base address of NOR flash.
On 08/20/2015 05:18 PM, Thierry Reding wrote:
On Thu, Aug 20, 2015 at 09:46:14AM +0530, Archit Taneja wrote:
Hi Thierry, Lucas,
On 08/19/2015 08:32 PM, Thierry Reding wrote:
On Wed, Aug 19, 2015 at 04:52:24PM +0200, Lucas Stach wrote:
Am Mittwoch, den 19.08.2015, 16:34 +0200 schrieb
On 2015/8/21 14:27, Jaehoon Chung wrote:
Hi, Shawn.
Is this based on Ulf's repository?
no, it's based on https://github.com/jh80chung/dw-mmc.git
tags/dw-mmc-for-ulf-v4.2 ：）
On 08/20/2015 05:43 PM, Shawn Lin wrote:
DesignWare MMC Controller can supports two types of DMA
mode: external
Hi,
On Aug 20, 2015, at 10:20 PM, Marek Vasut ma...@denx.de wrote:
On Tuesday, August 18, 2015 at 04:34:53 AM, vikas wrote:
Hi Marek,
Hi,
[...]
+#define CQSPI_POLL_IDLE_RETRY 3
+
+#define CQSPI_REG_SRAM_RESV_WORDS 2
+#define
Hi Maxime,
I just realized that I never answered your question about the need
for a tvencoder simplefb node in sun5i-a13.dtsi, like the one from
the ARM: dts: sun5i: Add simplefb node for tvencoder output
I think the real question is do we want to use sun5i-a13.dtsi for
the r8 ?
I would expect
Hi Markus,
-Original Message-
From: Markus Pargmann [mailto:m...@pengutronix.de]
Sent: Wednesday, August 19, 2015 1:55 PM
To: Chen Haibo-B51421
Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
ijc+devicet...@hellion.org.uk; ga...@codeaurora.org; shawn...@kernel.org;
On Fri, Aug 21, 2015 at 2:21 PM, Vinod Koul vinod.k...@intel.com wrote:
On Fri, Aug 21, 2015 at 02:15:08PM +0530, Rameshwar Sahu wrote:
Hi Vinod,
On Fri, Aug 21, 2015 at 2:09 PM, Vinod Koul vinod.k...@intel.com wrote:
On Thu, Aug 20, 2015 at 04:00:56PM +0530, Rameshwar Prasad Sahu wrote:
This patch provides the fix in the cleanup routing such that client can perform
further submission by releasing the lock before calling client's callback
function.
Signed-off-by: Rameshwar Prasad Sahu rs...@apm.com
---
drivers/dma/xgene-dma.c | 33 ++---
1 file
From: Graham Moore grmo...@opensource.altera.com
Add support for the Cadence QSPI controller. This controller is
present in the Altera SoCFPGA SoCs and this driver has been tested
on the Cyclone V SoC.
Signed-off-by: Graham Moore grmo...@opensource.altera.com
Signed-off-by: Marek Vasut
On Tue, Jul 28, 2015 at 05:58:37PM +0800, Haibo Chen wrote:
Freescale i.MX6UL contains a internal touchscreen controller,
this patch add a driver to support this controller.
Signed-off-by: Haibo Chen haibo.c...@freescale.com
---
drivers/input/touchscreen/Kconfig | 12 +
According to KeyStone Architecture Inter-IC Control Bus User Guide, fixed
additive part of frequency divisors (referred as d in the code and datasheet)
always equals to 6, independent of module clock prescaler.
module clock frequency
master clock frequency =
Now as i2c-davinci driver has special handling for Keystone it's time to
switch
the device tree to use new compatible property.
Signed-off-by: Alexander Sverdlin alexander.sverd...@nokia.com
---
arch/arm/boot/dts/keystone.dtsi |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Add initial dts files and SoC support for IPQ40XX
Signed-off-by: Varadarajan Narayanan var...@codeaurora.org
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 246473a..6b4caee 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -477,7 +477,8 @@
From: Graham Moore grmo...@opensource.altera.com
Add binding document for the Cadence QSPI controller.
Signed-off-by: Graham Moore grmo...@opensource.altera.com
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Alan Tull at...@opensource.altera.com
Cc: Brian Norris computersforpe...@gmail.com
Cc:
On Thu, Aug 20, 2015 at 12:37:29PM +0100, Jens Wiklander wrote:
On Wed, Aug 19, 2015 at 05:50:09PM +0100, Will Deacon wrote:
On Wed, Aug 19, 2015 at 09:40:25AM +0100, Jens Wiklander wrote:
Adds helpers to do SMC based on ARM SMC Calling Convention.
CONFIG_HAVE_SMCCC is enabled for
On Fri, Aug 21, 2015 at 08:30:16AM +, Chen Bough wrote:
Hi Markus,
-Original Message-
From: Markus Pargmann [mailto:m...@pengutronix.de]
Sent: Wednesday, August 19, 2015 1:55 PM
To: Chen Haibo-B51421
Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
On Fri, Aug 21, 2015 at 02:33:34PM +0530, Rameshwar Prasad Sahu wrote:
This patch provides the fix in the cleanup routing such that client can
perform
further submission by releasing the lock before calling client's callback
function.
Applied, thanks
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Hi,
On 21-08-15 09:42, Hans de Goede wrote:
Hi,
On 21-08-15 07:36, Code Kipper wrote:
On 20 August 2015 at 17:45, Maxime Ripard maxime.rip...@free-electrons.com
wrote:
Hi,
On Wed, Aug 19, 2015 at 06:43:16PM +0200, codekip...@gmail.com wrote:
From: Marcus Cooper codekip...@gmail.com
The
On 2015/8/21 15:38, Jaehoon Chung wrote:
On 08/21/2015 04:27 PM, Shawn Lin wrote:
On 2015/8/21 14:35, Jaehoon Chung wrote:
On 08/21/2015 03:30 PM, Shawn Lin wrote:
On 2015/8/21 14:27, Jaehoon Chung wrote:
Hi, Shawn.
Is this based on Ulf's repository?
no, it's based on
On Fri, Aug 21, 2015 at 02:15:08PM +0530, Rameshwar Sahu wrote:
Hi Vinod,
On Fri, Aug 21, 2015 at 2:09 PM, Vinod Koul vinod.k...@intel.com wrote:
On Thu, Aug 20, 2015 at 04:00:56PM +0530, Rameshwar Prasad Sahu wrote:
This patch fixes the an locking issue where client callback performs
On 2015/8/21 14:35, Jaehoon Chung wrote:
On 08/21/2015 03:30 PM, Shawn Lin wrote:
On 2015/8/21 14:27, Jaehoon Chung wrote:
Hi, Shawn.
Is this based on Ulf's repository?
no, it's based on https://github.com/jh80chung/dw-mmc.git
tags/dw-mmc-for-ulf-v4.2 ：）
Oh..I will rebase to Ulf's next
On 08/21/2015 04:27 PM, Shawn Lin wrote:
On 2015/8/21 14:35, Jaehoon Chung wrote:
On 08/21/2015 03:30 PM, Shawn Lin wrote:
On 2015/8/21 14:27, Jaehoon Chung wrote:
Hi, Shawn.
Is this based on Ulf's repository?
no, it's based on https://github.com/jh80chung/dw-mmc.git
Hi Grant,
I guess this patch should go in thru the devicetree subsystem.
(or ARM-SOC?)
It is really trivial, so could you apply it for 4.3-rc1, please?
2015-07-29 18:45 GMT+09:00 Masahiro Yamada yamada.masah...@socionext.com:
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
On 2015. 8. 19., at PM 11:48, Yakir Yang y...@rock-chips.com wrote:
.
.../bindings/video/analogix_dp-rockchip.txt| 83 ++
.../devicetree/bindings/video/exynos_dp.txt| 51 +-
arch/arm/boot/dts/exynos5250-arndale.dts | 10 +-
On Thu, Aug 20, 2015 at 04:00:56PM +0530, Rameshwar Prasad Sahu wrote:
This patch fixes the an locking issue where client callback performs
??
further submission.
Do you men you are preventing that or fixing for this to be allowed?
Signed-off-by: Rameshwar
Hi Vinod,
On Fri, Aug 21, 2015 at 2:09 PM, Vinod Koul vinod.k...@intel.com wrote:
On Thu, Aug 20, 2015 at 04:00:56PM +0530, Rameshwar Prasad Sahu wrote:
This patch fixes the an locking issue where client callback performs
??
further submission.
Do you men you
* Kishon Vijay Abraham I kis...@ti.com [150820 05:39]:
Hi,
On Monday 03 August 2015 05:56 PM, Kishon Vijay Abraham I wrote:
Changes from v1:
*) return on -EPROBE_DEFER and other fatal errors. (Don't return only
if the return value is -ENODEV)
*) Remove the beagle x15 dts patch. It
Hi Dmitry,
Thanks for your patient review, especially for the patch you attached.
I test your patch these days, with below change, touch can work normally.
(also change the xnur to active low in dts)
In probe function:
- tsc-xnur_gpio = of_get_named_gpio(np, xnur-gpio, 0);
- err =
Thanks, Klimov,
You are right. I will fix it in next patches.
On Tue, Aug 18, 2015 at 03:12:02AM +0300, Alexey Klimov wrote:
Date: Tue, 18 Aug 2015 03:12:02 +0300
From: Alexey Klimov klimov.li...@gmail.com
To: Kenneth Lee liguo...@hisilicon.com
CC: robh...@kernel.org, pawel.m...@arm.com,
For device resource PREF bit setting under bridge 64-bit pref resource,
we need to make sure only set PREF for 64bit resource, so set
IORESOUCE_MEM_64 for 64bit resource during OF device resource flags
parsing.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96261
Link:
Hi, Shawn.
Is this based on Ulf's repository?
On 08/20/2015 05:43 PM, Shawn Lin wrote:
DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch add
edmac ops to support
On 08/21/2015 03:30 PM, Shawn Lin wrote:
On 2015/8/21 14:27, Jaehoon Chung wrote:
Hi, Shawn.
Is this based on Ulf's repository?
no, it's based on https://github.com/jh80chung/dw-mmc.git
tags/dw-mmc-for-ulf-v4.2 ：）
Oh..I will rebase to Ulf's next branch on this weekend.
Then could you
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