On 15-08-22 18:36:54, Stefan Agner wrote:
On 2015-08-21 06:26, Sanchayan Maity wrote:
This adds device tree binding documentation for the Colibri VF50
touchscreen driver.
Signed-off-by: Sanchayan Maity maitysancha...@gmail.com
---
.../bindings/input/touchscreen/colibri-vf50-ts.txt |
For MT6580 SoC platform, the secondary cores are in powered off state
as default, so compared with MT6589, one new enable method is needed.
This method using the SPM (System Power Manager) inside the SCPSYS to
control the CPU power.
Signed-off-by: Scott Shu scott@mediatek.com
---
We enable GTP6 which ungates the arch timer clock.
Signed-off-by: Scott Shu scott@mediatek.com
---
arch/arm/mach-mediatek/mediatek.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-mediatek/mediatek.c
b/arch/arm/mach-mediatek/mediatek.c
index
Add support for cpu enable-method mediatek,mt6580-smp for booting
secondary CPUs on MT6580.
Signed-off-by: Scott Shu scott@mediatek.com
---
arch/arm/mach-mediatek/platsmp.c | 67
1 file changed, 67 insertions(+)
diff --git
This adds a CPU power domain driver for the Mediatek SCPSYS unit on
MT6580.
Signed-off-by: Scott Shu scott@mediatek.com
---
drivers/soc/mediatek/mtk-scpsys.c | 250
include/linux/soc/mediatek/scpsys.h | 9 ++
2 files changed, 259 insertions(+)
create
This adds the SCPSYS device node to the MT6580 dtsi file.
Signed-off-by: Scott Shu scott@mediatek.com
---
arch/arm/boot/dts/mt6580.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/mt6580.dtsi b/arch/arm/boot/dts/mt6580.dtsi
index 06fdf6c..40957d3 100644
---
On 15-08-22 18:54:28, Stefan Agner wrote:
On 2015-08-21 06:26, Sanchayan Maity wrote:
Add device tree node for touchscreen support on Colibri VF50. The
touchscreen functionality on VF50 uses the ADC channels of Vybrid
and some GPIOs. Also add pinctrl nodes for proper pinmux.
ARM: shmobile: APMU DT support via SMP Enable method V2
[PATCH v2 01/07] devicetree: bindings: Renesas APMU and SMP Enable method
[PATCH v2 02/07] ARM: shmobile: Add APMU DT support via Enable method
[PATCH v2 03/07] ARM: shmobile: Add APMU nodes to r8a7790 DTSI
[PATCH v2 04/07] ARM: shmobile:
From: Magnus Damm damm+rene...@opensource.se
Allow DT configuration of the APMU hardware in the case when the APMU is
pointed out in the DTB via the enable-method. The ability to configure
the APMU via C code is still kept intact to prevent DTB breakage for older
SoCs that do not rely on the
From: Magnus Damm damm+rene...@opensource.se
Add DT binding documentation for the APMU hardware and add renesas,apmu
to the list of enable methods for the ARM cpus.
Signed-off-by: Magnus Damm damm+rene...@opensource.se
---
Changes since V1:
- None
From: Magnus Damm damm+rene...@opensource.se
Add an APMU DT node for the r8a7790 SoC and use the enable-method to
point out that the APMU should be used for SMP support.
Signed-off-by: Magnus Damm damm+rene...@opensource.se
---
Changes from V1:
- New patch
arch/arm/boot/dts/r8a7790.dtsi |
On Tue, Aug 18, 2015 at 02:49:09PM +0100, Jon Hunter wrote:
@@ -1543,7 +1531,7 @@ static int tegra_dma_pm_suspend(struct device *dev)
int ret;
/* Enable clock before accessing register */
- ret = tegra_dma_runtime_resume(dev);
+ ret = pm_runtime_get_sync(dev);
why is
On Thu, Aug 20, 2015 at 12:01:27PM +0530, punnaiah choudary kalluri wrote:
On Thu, Aug 20, 2015 at 11:43 AM, Vinod Koul vinod.k...@intel.com wrote:
On Thu, Aug 06, 2015 at 08:49:33AM +0530, Punnaiah Choudary Kalluri wrote:
+ list_for_each_entry_safe(desc, next, chan-done_list, node) {
This change turns the UFS variant (SCSI_UFS_QCOM) into a UFS
a platform device.
In order to do so a few additional changes are required:
1. The ufshcd-pltfrm is no longer serves as a platform device.
Now it only serves as a group of platform APIs such as PM APIs
(runtime suspend/resume,
On Sun, Aug 23, 2015 at 7:38 PM, Vinod Koul vinod.k...@intel.com wrote:
On Thu, Aug 20, 2015 at 12:01:27PM +0530, punnaiah choudary kalluri wrote:
On Thu, Aug 20, 2015 at 11:43 AM, Vinod Koul vinod.k...@intel.com wrote:
On Thu, Aug 06, 2015 at 08:49:33AM +0530, Punnaiah Choudary Kalluri wrote:
On 15-08-22 18:52:28, Stefan Agner wrote:
Hi Sanchayan,
On 2015-08-21 06:26, Sanchayan Maity wrote:
+static int vf50_ts_probe(struct platform_device *pdev)
+{
+ struct input_dev *input;
+ struct iio_channel *channels;
+ struct device *dev = pdev-dev;
+ struct
On Tue, Aug 18, 2015 at 02:49:15PM +0100, Jon Hunter wrote:
+#define AHUB_TO_MEMORY 2
+#define MEMORY_TO_AHUB 4
namespace this aptly as well
+static void tegra_adma_stop(struct tegra_dma_channel *tdc)
From: Magnus Damm damm+rene...@opensource.se
Add a function to check if other DT based method is available, and
if so return false to not hook up smp_ops from the machine vector.
This results in that DT-based SMP support has priority over older
C-based smp_ops code, and in case DT-based SMP
From: Magnus Damm damm+rene...@opensource.se
Adjust the r8a7791 SoC support code to not configure any non-DT SMP code
in case the DT-based enable-method has been installed already.
Signed-off-by: Magnus Damm damm+rene...@opensource.se
---
Changes since V1:
- Broke out bits from former
Hi Geert,
On Thu, May 21, 2015 at 5:13 PM, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
On Thu, May 21, 2015 at 3:22 AM, Magnus Damm magnus.d...@gmail.com wrote:
--- 0001/arch/arm/mach-shmobile/platsmp-apmu.c
+++ work/arch/arm/mach-shmobile/platsmp-apmu.c 2015-05-20
22:26:43.152366518
From: Magnus Damm damm+rene...@opensource.se
Adjust the r8a7790 SoC support code to not configure any non-DT SMP code
in case the DT-based enable-method has been installed already.
Signed-off-by: Magnus Damm damm+rene...@opensource.se
---
Changes since V1:
- New patch.
From: Magnus Damm damm+rene...@opensource.se
Add an APMU DT node for the r8a7791 SoC and use the enable-method to
point out that the APMU should be used for SMP support.
Signed-off-by: Magnus Damm damm+rene...@opensource.se
---
Changes from V1:
- None
arch/arm/boot/dts/r8a7791.dtsi |7
This adds mediatek,mt6580-scpsys in the compatible properties of
SCPSYS node for MT6580 SoC.
Signed-off-by: Scott Shu scott@mediatek.com
---
Documentation/devicetree/bindings/soc/mediatek/scpsys.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Add arch timer node to enable arch-timer support. MT6580 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This set cpu enable-method to enable SMP.
Signed-off-by: Scott Shu scott@mediatek.com
---
arch/arm/boot/dts/mt6580.dtsi | 20
This patchset adds support SMP on MediaTek MT6580 Cortex-A7 quad-core SoC.
This is based on v4.2-rc1 and following patch series:
(1) Yingjoe Chen's Add SMP bringup support for mt65xx socs [1]
(2) Mars Cheng's Add mt6580 basic chip support [2]
(3) Sascha Hauer's Mediatek SCPSYS power domain
The INFRACFG contains various infrastructure registers and the SCPSYS handles
several power management related tasks. Both are needed for SMP and CPU
hotplug on MT6580.
Signed-off-by: Scott Shu scott@mediatek.com
---
arch/arm/configs/multi_v7_defconfig | 2 ++
1 file changed, 2 insertions(+)
On Thu, Aug 20, 2015 at 05:39:12PM +0200, Lars-Peter Clausen wrote:
Add the devicetree descriptor for the Analog Devices AXI-DMAC DMA
controller. This is a soft peripheral used in FPGAs and the bindings
describe how it is connected to the system (clock, interrupt, memory map)
as well as the
Frank has agreed to step up and help with DT core code maintainership.
At the same time, Grant is taking a step back from active maintainership
responsibilities. Add Frank to the device tree core code entry and
shuffle Grant to the end of the list. In a few releases time Grant will
be removed
Hi Sanchayan,
On Fri, Aug 21, 2015 at 06:56:32PM +0530, Sanchayan Maity wrote:
The Colibri Vybrid VF50 module supports 4-wire touchscreens using
FETs and ADC inputs. This driver uses the IIO consumer interface
and relies on the vf610_adc driver based on the IIO framework.
Thank you for
Enable the otg controller on the inet97fv2 tablet.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun4i-a10-inet97fv2.dts | 34 +++
1 file changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts
Enable i2c1 and i2c2 controllers, these are used for the touchscreen resp.
the accelerometer.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun4i-a10-inet97fv2.dts | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts
Enable support for the tablet keys which are connected via the lradc.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun4i-a10-inet97fv2.dts | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts
The inet97fv2 tablet only has a usb-2 wifi device connected to the second
ehci controller, disable the first ehci controller and both ohci
controllers.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun4i-a10-inet97fv2.dts | 17 -
1 file changed, 17
On Wed, Aug 19, 2015 at 9:50 AM, Yakir Yang y...@rock-chips.com wrote:
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the latest change
according to the devicetree binding
On Sun, Aug 23, 2015 at 6:13 PM, Olof Johansson o...@lixom.net wrote:
On Fri, Aug 14, 2015 at 2:21 PM, Rob Herring robherri...@gmail.com wrote:
+arm-soc
On Tue, Aug 11, 2015 at 5:07 AM, Ian Campbell ian.campb...@citrix.com
wrote:
On Mon, 2015-08-03 at 17:06 +0100, Ian Campbell wrote:
thanks!
Please, remember that we need to push it also to stable :)
On Sun, Aug 23, 2015 at 11:52 PM, Rob Herring r...@kernel.org wrote:
On Thu, Jul 16, 2015 at 3:33 PM, Ricardo Ribalda Delgado
ricardo.riba...@gmail.com wrote:
ping?
Hello Grant, Hello Greg
Is there any planned timeframe
On Sun, Aug 23, 2015 at 4:42 PM, Rob Herring robherri...@gmail.com wrote:
On Sun, Aug 23, 2015 at 6:13 PM, Olof Johansson o...@lixom.net wrote:
On Fri, Aug 14, 2015 at 2:21 PM, Rob Herring robherri...@gmail.com wrote:
+arm-soc
On Tue, Aug 11, 2015 at 5:07 AM, Ian Campbell
DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch add
edmac ops to support these platforms. I've tested it on RK31xx
platform with edmac mode and RK3288 platform with
Synopsys DesignWare mobile storage host controller supports three
types of transfer mode: pio, internal dma and external dma. However,
dw_mmc can only supports pio and internal dma now. Thus some platforms
using dw-mshc integrated with generic dma can't work in dma mode. So we
submit this patch
This patch add some macros for HCON register operations
to make code more readable.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/mmc/host/dw_mmc.c | 6 +++---
On Sat, Aug 22, 2015 at 12:48 PM, Jonathan Cameron ji...@kernel.org wrote:
On 20/08/15 23:48, Javier Martinez Canillas wrote:
Hello Michael,
On 08/21/2015 12:29 AM, Michael Welling wrote:
On Fri, Aug 21, 2015 at 12:02:40AM +0200, Javier Martinez Canillas wrote:
Hello Michael,
On 08/20/2015
On Tue, Aug 18, 2015 at 11:20 PM, Chen-Yu Tsai w...@csie.org wrote:
Reduced Serial Bus is a proprietary 2-line push-pull serial bus
supporting multiple slave devices.
It was developed by Allwinner, Inc. and used by Allwinner and X-Powers,
Inc. for their line of PMICs and other peripheral ICs.
On Fri, Aug 14, 2015 at 2:21 PM, Rob Herring robherri...@gmail.com wrote:
+arm-soc
On Tue, Aug 11, 2015 at 5:07 AM, Ian Campbell ian.campb...@citrix.com wrote:
On Mon, 2015-08-03 at 17:06 +0100, Ian Campbell wrote:
Commit 9ccd608070b6 (arm64: dts: add device tree for ARM SMM-A53x2 on
2015-08-24 8:23 GMT+09:00 Rob Herring robherri...@gmail.com:
On Wed, Aug 19, 2015 at 9:50 AM, Yakir Yang y...@rock-chips.com wrote:
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Wei Xu xuw...@hisilicon.com
---
Changes in v7: None
Changes
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Vineet Gupta vgu...@synopsys.com
---
Changes in v7: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Krzysztof Kozlowski k.kozlow...@samsung.com
---
Changes in
On Thu, Jul 16, 2015 at 3:33 PM, Ricardo Ribalda Delgado
ricardo.riba...@gmail.com wrote:
ping?
Hello Grant, Hello Greg
Is there any planned timeframe for applying this patch into someones tree?
Greg is out ATM. I'll pick this up for 4.3.
Rob
Thanks!
On Tue, Jun 23, 2015 at 7:12 PM,
On Thu, Aug 20, 2015 at 2:38 PM, Vladimir Barinov
vladimir.bari...@cogentembedded.com wrote:
Add Holt Integrated Circuits, Inc. to the list of device tree vendor
prefixes
Signed-off-by: Vladimir Barinov vladimir.bari...@cogentembedded.com
Acked-by: Rob Herring r...@kernel.org
---
Changes
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
DesignWare MMC Controller's transfer mode should be decided
at runtime instead of compile-time. So we remove this config
option and read dw_mmc's register to select DMA master.
Signed-off-by: Shawn Lin shawn@rock-chips.com
Acked-by: Govindraj Raja govindraj.r...@imgtec.com
Acked-by: Ralf
synopsys-dw-mshc supports three types of transfer mode. We add
bindings and description for how to use them at runtime.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
On Fri, Aug 14, 2015 at 11:39 AM, Ganapatrao Kulkarni
gkulka...@caviumnetworks.com wrote:
DT bindings for numa map for memory, cores and IOs using
arm,associativity device node property.
Signed-off-by: Ganapatrao Kulkarni gkulka...@caviumnetworks.com
Given this matches PPC, looks fine to me.
Add L2 cache controller nodes for all the UniPhier SoC DTSI.
Also, add an L3 cache controller node for PH1-Pro5 DTSI.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
arch/arm/boot/dts/uniphier-ph1-ld4.dtsi | 7 +++
arch/arm/boot/dts/uniphier-ph1-pro4.dtsi| 7
Hi Mark,
On Sat, Aug 22, 2015 at 09:30:50PM +0800, Leo Yan wrote:
On Fri, Aug 21, 2015 at 07:40:59PM +0100, Mark Rutland wrote:
On Wed, Aug 19, 2015 at 10:37:35AM +0100, Leo Yan wrote:
On Hi6220, below memory regions in DDR have specific purpose:
0x05e0, - 0x05ef,: For MCU
On Mon, 2015-08-24 at 11:18 +0900, Masahiro Yamada wrote:
This commit adds support for UniPhier outer cache controller.
All the UniPhier SoCs are equipped with the L2 cache, while the L3
cache is currently only integrated on PH1-Pro5 SoC.
style trivia:
You might add and use
#define
Hi Justin,
On 08/20/2015 10:41 AM, Justin Chen wrote:
Watchdog driver for Broadcom 7038 and newer chips.
Signed-off-by: Justin Chen justinpo...@gmail.com
Looks pretty good. Couple of comments below.
Thanks,
Guenter
---
drivers/watchdog/Kconfig | 8 ++
drivers/watchdog/Makefile
From: Leilk Liu leilk@mediatek.com
This series are based on 4.2-rc1 and provide four patches to fix mediatek spi
driver.
Change in v3:
1. The follow patches are applied, so remove them from series:
- spi: mediatek: fix spi incorrect endian usage
- spi: medaitek: revise quirks
Hello Dmitry,
On 15-08-21 18:30:57, Dmitry Torokhov wrote:
Hi Sanchayan,
On Fri, Aug 21, 2015 at 06:56:32PM +0530, Sanchayan Maity wrote:
The Colibri Vybrid VF50 module supports 4-wire touchscreens using
FETs and ADC inputs. This driver uses the IIO consumer interface
and relies on the
1/3: add outer cache support
2/3: rework SMP operations
3/3: add device tree nodes
Because 2/3 highly depends on 1/3, I hope whole of this series
is applied to ARM-SOC tree.
Olof,
From this series, I am using ARM: uniphier: rather than ARM: UniPhier:
for the subject prefixes because I noticed
Hi Krzysztof,
在 08/23/2015 07:43 PM, Krzysztof Kozlowski 写道:
2015-08-24 8:23 GMT+09:00 Rob Herring robherri...@gmail.com:
On Wed, Aug 19, 2015 at 9:50 AM, Yakir Yang y...@rock-chips.com wrote:
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and
mediatek spi driver uses readl/writel, so add linux/io.h,
even so it's implicitly imported by spi/spi.h
Signed-off-by: Leilk Liu leilk@mediatek.com
---
drivers/spi/spi-mt65xx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index
This patch adds PM clk_prepare_enable fail flow.
Signed-off-by: Leilk Liu leilk@mediatek.com
---
drivers/spi/spi-mt65xx.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index f81618c..e14f583 100644
---
This patch replaces *_time name in mtk_spi_prepare_transfer().
Signed-off-by: Leilk Liu leilk@mediatek.com
---
drivers/spi/spi-mt65xx.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index
this patch replaces int with u32, deletes TAB, and defines
MTK_SPI_PAUSE_INT_STATUS marco.
Signed-off-by: Leilk Liu leilk@mediatek.com
---
drivers/spi/spi-mt65xx.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c
Hi Rob,
在 08/23/2015 06:23 PM, Rob Herring 写道:
On Wed, Aug 19, 2015 at 9:50 AM, Yakir Yang y...@rock-chips.com wrote:
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the
This commit adds support for UniPhier outer cache controller.
All the UniPhier SoCs are equipped with the L2 cache, while the L3
cache is currently only integrated on PH1-Pro5 SoC.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
.../bindings/arm/uniphier/cache-uniphier.txt
Hi Joe,
2015-08-24 11:29 GMT+09:00 Joe Perches j...@perches.com:
On Mon, 2015-08-24 at 11:18 +0900, Masahiro Yamada wrote:
This commit adds support for UniPhier outer cache controller.
All the UniPhier SoCs are equipped with the L2 cache, while the L3
cache is currently only integrated on
On 24.08.2015 11:42, Yakir Yang wrote:
Hi Krzysztof,
在 08/23/2015 07:43 PM, Krzysztof Kozlowski 写道:
2015-08-24 8:23 GMT+09:00 Rob Herring robherri...@gmail.com:
On Wed, Aug 19, 2015 at 9:50 AM, Yakir Yang y...@rock-chips.com wrote:
Analogix dp driver is split from exynos dp driver, so we
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