This patch adds the support for Device tree bindings of extcon-gpio driver.
The extcon-gpio device tree node must include the both 'extcon-id' and
'extcon-gpio' property.
For exmaple:
usb_cable: extcon-gpio-0 {
compatible = "extcon-gpio";
extcon-id = <1>;
Hi Paul,
[auto build test results on v4.3-rc3 -- if it's inappropriate base, please
ignore]
config: cris-allyesconfig (attached as .config)
reproduce:
wget
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
-O ~/bin/make.cross
chmod +x
On Fri, Oct 2, 2015 at 4:51 PM, Linus Walleij wrote:
> On Fri, Sep 11, 2015 at 2:22 AM, Y Vo wrote:
>
>> Add support to configure GPIO line as input, output or external IRQ pin.
>>
>> Signed-off-by: Y Vo
>
> Mostly OK but...
>
>> #define
Hi Daniel,
Am Freitag, den 02.10.2015, 21:47 +0800 schrieb Daniel Kurtz:
> On Fri, Oct 2, 2015 at 3:40 PM, Philipp Zabel wrote:
> > Am Donnerstag, den 01.10.2015, 22:29 +0800 schrieb Daniel Kurtz:
> >> On Thu, Oct 1, 2015 at 8:58 PM, Rob Herring wrote:
>
Hi Paul,
[auto build test results on v4.3-rc3 -- if it's inappropriate base, please
ignore]
reproduce:
# apt-get install sparse
make ARCH=x86_64 allmodconfig
make C=1 CF=-D__CHECK_ENDIAN__
sparse warnings: (new ones prefixed by >>)
>> drivers/iio/dac/ad5592r.c:20:19:
On Tue, Sep 22, 2015 at 8:38 AM, Vishnu Patekar
wrote:
> Allwinner A83T soc port controller has 8 ports.
> It has 3 IRQ banks namely PB, PG, PH.
> Pinmuxing are different for some pins as compared to
> sun8i A23 and A33.
>
> Signed-off-by: Vishnu Patekar
Hi Magnus,
On Thu, Sep 17, 2015 at 8:33 AM, Magnus Damm wrote:
> --- 0001/arch/arm/mach-shmobile/platsmp-apmu.c
> +++ work/arch/arm/mach-shmobile/platsmp-apmu.c 2015-09-16 20:46:23.400513000
> +0900
> +static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int
On Thu, Sep 24, 2015 at 11:49 PM, H. Nikolaus Schaller
wrote:
> [Me]
>> I understand the approach, but this is the wrong way to do it.
>> Instead of indicating that a pin on the pin controller should be
>> open drain, the *consumer* specifying its gpios = <> should
>> do
Previously the driver would revert to internal supply if the
external supply couldn't be found. This had multiple problems:
- it caused silently ignored errors when a regulator was intended
to be supplied, but was not specified correctly.
- if CONFIG_REGULATOR is disabled, regulator_get() will
Hi Jisheng,
Sorry for the delay, I was quite busy these days...
Thanks for the nice comments!
I saw your using pin names in the BERLIN_PINCTRL_GROUP macro, like
"EMMC_RSTn". In other berlin pinctrl drivers we use the group name (such
as "G11" or GSM1"). If there is such a thing in the BG4CT,
On Fri, Oct 2, 2015 at 3:40 PM, Philipp Zabel wrote:
> Am Donnerstag, den 01.10.2015, 22:29 +0800 schrieb Daniel Kurtz:
>> On Thu, Oct 1, 2015 at 8:58 PM, Rob Herring wrote:
>> > I was thinking one of the display related blocks like
>> > whatever block
On Fri, Oct 2, 2015 at 4:41 AM, Ingi Kim wrote:
> This patch adds the device tree bindings for RT5033 flash LEDs.
>
> Signed-off-by: Ingi Kim
Acked-by: Rob Herring
> ---
> .../devicetree/bindings/leds/leds-rt5033.txt | 38
Jisheng,
On Mon, Sep 21, 2015 at 06:04:19PM +0800, Jisheng Zhang wrote:
> Add the avio, soc, sm pinctrl nodes for Marvell berlin4ct SoC.
>
> Signed-off-by: Jisheng Zhang
> ---
> arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 15 +++
> 1 file changed, 15
This patch adds support for the AD5592R (spi) and AD5593R (i2c)
ADC/DAC devices.
Signed-off-by: Paul Cercueil
---
drivers/iio/dac/Kconfig | 22 +++
drivers/iio/dac/Makefile | 2 +
drivers/iio/dac/ad5592r-base.c| 290
Signed-off-by: Paul Cercueil
---
.../devicetree/bindings/iio/dac/ad5592r.txt| 42 ++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/dac/ad5592r.txt
diff --git
Jisheng,
Please s/urt/uart/ in this patch.
Thanks!
Antoine
On Mon, Sep 21, 2015 at 06:04:20PM +0800, Jisheng Zhang wrote:
> Add urt0 txd and rxd muxing setup in the dtsi because uart0 always uses
> them to work, no other possibilities.
>
> Signed-off-by: Jisheng Zhang
>
Hi Jisheng,
Thanks for providing this!
On Mon, Sep 21, 2015 at 06:04:15PM +0800, Jisheng Zhang wrote:
> Let berlin_pinctrl_probe() accepts an extra argument: regmap, this is to
> prepare for the next berlin4ct support, where we won't use simple-mfd
> any more.
Just a question here: why don't we
On Thu, 2015-10-01 at 16:32 +0100, Sudeep Holla wrote:
>
> On 01/10/15 15:33, Yingjoe Chen wrote:
> > On Thu, 2015-09-17 at 17:13 +0100, Sudeep Holla wrote:
> >>
>
> [...]
>
> >>
> >> I think your are confusing the system counter with arch timers. System
> >> counter is always-on, but the arch
On Fri, Oct 2, 2015 at 2:18 AM, Philipp Zabel wrote:
> Am Donnerstag, den 01.10.2015, 07:58 -0500 schrieb Rob Herring:
>> On Thu, Oct 1, 2015 at 3:59 AM, Philipp Zabel wrote:
>> > Am Mittwoch, den 30.09.2015, 12:13 -0500 schrieb Rob Herring:
>> >>
Signed-off-by: Paul Cercueil
---
.../devicetree/bindings/iio/dac/ad5064.txt | 48 ++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/dac/ad5064.txt
diff --git
If the device does not have an internal reference, there is no
other choice but to use the external reference. In that case,
it does not make much sense to have to specify it.
This patch ensures that the external reference is used if the
device does not feature an internal reference.
On Thu, Oct 01, 2015 at 11:21:36AM +0100, Mark Brown wrote:
> On Thu, Oct 01, 2015 at 11:15:52AM +0800, Leo Yan wrote:
> > On Wed, Sep 30, 2015 at 04:54:51PM -0700, Tyler Baker wrote:
> > > On 30 September 2015 at 12:18, Mark Brown wrote:
>
> > > > My understanding is that it
On Fri, Sep 11, 2015 at 2:22 AM, Y Vo wrote:
> Add support to configure GPIO line as input, output or external IRQ pin.
>
> Signed-off-by: Y Vo
Mostly OK but...
> #define XGENE_MAX_GPIO_DS 22
> #define XGENE_MAX_GPIO_DS_IRQ 6
> +#define
Hi Ingi,
[auto build test results on v4.3-rc3 -- if it's inappropriate base, please
ignore]
config: i386-allmodconfig (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All error/warnings (new ones prefixed by >>):
In file
On Tue, Sep 15, 2015 at 10:57 AM, Andrew F. Davis wrote:
> The TPS65912 subdevices depend on the mfd core and not any particular
> interface. The core is only enabled by enabling an interface so this
> is safe.
>
> Signed-off-by: Andrew F. Davis
Acked-by: Linus
On 02/10/15 11:53, Maxime Ripard wrote:
>> If no, that's very unfortunate because it means that you can't
>> re-use the same DT across multiple OS and the DT provided by the
>> firmware (if it's built-in).
>
> Is there such OS yet (and by that, I mean one that actually shares our
> DT, instead of
The WRSTBI bit (disabled by default but enabled by bootloader), when
set, is responsible for resetting voltages to default values of
certain bucks on falling edge of Warm Reset Input pin from AP.
However on some boards (with S2MPS13) the pin is pulled down so any
suspend will effectively trigger
There are different revisions of the same chipset. For example S2MPS13 has
more than 2 revisions. They differ slightly in regulator constraints.
Print the revision number to easily find which PMIC is used on the board.
Signed-off-by: Krzysztof Kozlowski
---
On Thu, Sep 24, 2015 at 7:52 AM, Andrew F. Davis wrote:
> The TPS65912 PMIC contains several regulators and a GPIO controller.
> Add bindings for the TPS65912 PMIC.
>
> Signed-off-by: Andrew F. Davis
Reviewed-by: Linus Walleij
For GPIO
On 02-10-15 01:34, Stephen Boyd wrote:
On 09/17, Mike Looijmans wrote:
This patch adds the driver and devicetree documentation for the
Silicon Labs SI514 clock generator chip. This is an I2C controlled
oscilator capable of generating clock signals ranging from 100kHz
s/oscilator/oscillator/
On Fri, 02 Oct 2015, Jassi Brar wrote:
> On Wed, Aug 19, 2015 at 7:52 PM, Lee Jones wrote:
>
>
>
> > +
> > +#define MBOX_BASE(mdev, inst) ((mdev)->base + (inst * 4))
> >
> It should be(inst) * 4
I'm guessing you mean:
((mdev)->base + ((inst) * 4))
?
> >
On Thu, Sep 24, 2015 at 7:52 AM, Andrew F. Davis wrote:
> The old tps65912 driver is being replaced, delete old driver.
>
> Signed-off-by: Andrew F. Davis
Acked-by: Linus Walleij
The merge collisions are unpredictable. Will this be merged
Document a new Device Tree property 'samsung,s2mps11-wrstbi-ground'
indicating that WRSTBI pin of S2MPS13 PMIC is pulled down so
corresponding buck warm reset function should be disabled.
Signed-off-by: Krzysztof Kozlowski
---
On Fri, Oct 2, 2015 at 11:00 AM, James Liao wrote:
> Hi Daniel,
>
> On Thu, 2015-10-01 at 18:08 +0800, Daniel Kurtz wrote:
>> I see two cases where "a power domain is a consumer of a clock":
>> (a) the clock is needed to access the power domain control
>> registers.
HI Daniel,
On Fri, 2015-10-02 at 17:25 +0800, Daniel Kurtz wrote:
> Actually, I should have proposed adding prepare / unprepare callbacks
> to mtk_clk_gate_ops in which we prepare_enable/disable_unprepare
> venc_sel (& mm_sel).
> This should correctly track all of the clk reference counting
On Mon, Sep 21, 2015 at 3:04 AM, Jisheng Zhang wrote:
> Let berlin_pinctrl_probe() accepts an extra argument: regmap, this is to
> prepare for the next berlin4ct support, where we won't use simple-mfd
> any more.
>
> Signed-off-by: Jisheng Zhang
Hi Magnus,
On Thu, Sep 17, 2015 at 8:32 AM, Magnus Damm wrote:
> ARM: shmobile: APMU DT support via SMP Enable method V3
>
> [PATCH v3 01/09] devicetree: bindings: Renesas APMU and SMP Enable method
> [PATCH v3 02/09] ARM: shmobile: Add APMU DT support via Enable method
>
Hi Magnus,
On Thu, Sep 17, 2015 at 8:33 AM, Magnus Damm wrote:
> --- 0001/arch/arm/mach-shmobile/platsmp-apmu.c
> +++ work/arch/arm/mach-shmobile/platsmp-apmu.c 2015-09-16 20:46:23.400513000
> +0900
> @@ -24,6 +24,7 @@
> #include
> #include "common.h"
> #include
On Thu, Sep 24, 2015 at 1:53 PM, Adrian Alonso wrote:
> From: Robin Gong
>
> Fix system chrash caused by groups whose number is smaller than the number
> of groups of the last pinctl instance which is not initialized.
>
> iMX7D supports two iomux
Hi Maxime,
On 01/10/15 21:45, Maxime Ripard wrote:
> On Thu, Oct 01, 2015 at 09:47:11AM +0100, Ian Campbell wrote:
>> Booting a recent kernel with the DTB supplied with Debian Jessie (3.16
>> based) breaks on Cubietruck because that DTB lacks the clock-indices nodes
>> which the new driver from
Hi,
On Fri, Oct 02, 2015 at 11:07:35AM +0100, Julien Grall wrote:
> Hi Maxime,
>
> On 01/10/15 21:45, Maxime Ripard wrote:
> > On Thu, Oct 01, 2015 at 09:47:11AM +0100, Ian Campbell wrote:
> >> Booting a recent kernel with the DTB supplied with Debian Jessie (3.16
> >> based) breaks on
On 2 October 2015 at 15:02, Lee Jones wrote:
> On Fri, 02 Oct 2015, Jassi Brar wrote:
>
>> On Wed, Aug 19, 2015 at 7:52 PM, Lee Jones wrote:
>>
>>
>>
>> > +
>> > +#define MBOX_BASE(mdev, inst) ((mdev)->base + (inst * 4))
>> >
>> It should be
This patch adds device driver of Richtek RT5033 PMIC.
The driver supports a current regulated output to drive
white LEDs for camera flash.
Signed-off-by: Ingi Kim
---
drivers/leds/Kconfig | 8 ++
drivers/leds/Makefile | 1 +
This patch adds ktd2692 Flash LED driver with LED Flash class
Ingi Kim (2):
leds: rt5033: add DT binding for RT5033
leds: rt5033: Add RT5033 Flash led device driver
.../devicetree/bindings/leds/leds-rt5033.txt | 38
drivers/leds/Kconfig | 8 +
This patch adds the device tree bindings for RT5033 flash LEDs.
Signed-off-by: Ingi Kim
---
.../devicetree/bindings/leds/leds-rt5033.txt | 38 ++
1 file changed, 38 insertions(+)
create mode 100644
On 2015/10/1 17:14, Jaehoon Chung wrote:
Dear, All.
I will apply patch 01-03 at my repository on today.
But i don't know better how i do about other patches relevant to config file.
Thanks, Jaehoon. :)
I guess it would be acceptable to pick the config changes, already they
were acked by
Hi Rob,
Am Freitag, den 02.10.2015, 09:24 -0500 schrieb Rob Herring:
[...]
> >> > I'll try to bind to this node and have the driver find sibling nodes
> >> > using their compatible strings.
> >>
> >> That doesn't seem like a good choice since there are other functions
> >> in the block. I was
Hi Ingi,
Thanks for the patches. Please fix build errors
and resubmit.
On 10/02/2015 11:41 AM, Ingi Kim wrote:
This patch adds ktd2692 Flash LED driver with LED Flash class
Ingi Kim (2):
leds: rt5033: add DT binding for RT5033
leds: rt5033: Add RT5033 Flash led device driver
This is based on v4.3-rc1 + clockevents-4.4[1] and James's mediatek-clk
tree[2].
Changes compare to previous version[3]:
- Add more MediaTek SoC to mtk-timer binding
- Update commit message to better describe the purpose.
Changes compare to v2[4]:
- the first two mtk_timer related changes are
From: Matthias Brugger
We enable GTP6 which ungates the arch timer clock.
In the future this should be done in the bootloader.
Signed-off-by: Matthias Brugger
Signed-off-by: Yingjoe Chen
---
Add arch timer node to enable arch-timer support. MT8135 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen
---
arch/arm/boot/dts/mt8135.dtsi
This series add SMP brinup support for MediaTek SoCs. This is v5 and
is based on v4.3-rc1.
There are similar but different SMP bringup up methods on MediaTek
mt65xx and mt81xx. On MT8135 & MT8127, system boots with a trustzone
firmware. Others, like MT6589, doesn't have trustzone, and run kernel
From: Daniel Kurtz
Add device node to enable GPT timer.
Signed-off-by: Daniel Kurtz
Signed-off-by: Eddie Huang
Signed-off-by: Yingjoe Chen
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 9
Add support for booting secondary CPUs on mt6589, mt8127
and mt8135.
Signed-off-by: Yingjoe Chen
---
arch/arm/mach-mediatek/Makefile | 3 +
arch/arm/mach-mediatek/platsmp.c | 141 +++
2 files changed, 144 insertions(+)
create
On 02/10/15 01:50, David Daney wrote:
> From: David Daney
>
> Replace open coded generation PCI/MSI requester id with call to the
> new function pci_msi_domain_get_msi_rid() which applies the "msi-map"
> to the id value.
>
> Signed-off-by: David Daney
This commit add new cpu enable method "mediatek,mt65xx-smp" and
"mediatek,mt81xx-tz-smp".
Acked-by: Rob Herring
Signed-off-by: Yingjoe Chen
---
Documentation/devicetree/bindings/arm/cpus.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git
Enable MTK_TIMER for MediaTek plaform, which will be used as
tick broadcast device and schedule clock.
Signed-off-by: Yingjoe Chen
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms
Add compatible string for mt8127, mt8135 and mt8173 and sort
the list.
Signed-off-by: Yingjoe Chen
---
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git
Nishant,
On 9/25/2015 10:38 AM, Nishanth Menon wrote:
On 09/25/2015 11:15 AM, santosh shilimkar wrote:
9/25/2015 9:01 AM, Nishanth Menon wrote:
[..]
Please refresh the series commit messages based on the
discussion so far and repost. Will pick it up then.
Thanks. I will do so (probably
On 02/10/15 01:50, David Daney wrote:
> From: David Daney
>
> Add pci_msi_domain_get_msi_rid() to return the MSI requester id (RID).
> Initially needed by gic-v3 based systems. It will be used by follow on
> patch to drivers/irqchip/irq-gic-v3-its-pci-msi.c
>
> Initially
On Fri, 2015-10-02 at 23:05 +0800, Yingjoe Chen wrote:
> This is based on v4.3-rc1 + clockevents-4.4[1] and James's mediatek-clk
> tree[2].
>
> Changes compare to previous version[3]:
> - Add more MediaTek SoC to mtk-timer binding
> - Update commit message to better describe the purpose.
>
>
Add arch timer node to enable arch-timer support. MT8127 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen
---
arch/arm/boot/dts/mt8127.dtsi
On Wed, Sep 30, 2015 at 03:25:48PM +0800, Wenyou Yang wrote:
> The patch is to add support to make the output voltage of ACT8865
> DC/DC regulator determined by VSET2[] bits. The DT property
> "active-semi,vsel-high" is used to specify the VSEL pin at high
> on the board. When the VSEL pin is
The NAND controller on NS2 SoC is compatible with existing
BRCM IPROC NAND driver so let's enable it in NS2 DT and
NS2 SVK DT.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
From: David Daney
While using the pci-host-generic driver to add PCI support for the
Cavium ThunderX processors, several bugs were discovered. This patch
set fixes the bugs, a follow-on set will add the ThunderX support.
Changes from v3:
- Drop "PCI: generic: Claim
On Fri, Oct 02, 2015 at 10:28:09PM +0800, Leo Yan wrote:
> On Thu, Oct 01, 2015 at 11:21:36AM +0100, Mark Brown wrote:
> > It seems sensible to get the DT bits for functionality that is already
> > supported on the driver side upstream, that way we get the maximum
> > functionality available as
Add the "sigma" vendor prefix for Sigma Designs, Inc.
Signed-off-by: Mans Rullgard
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
From: Ray Jui
This patch adds iProc I2C DT nodes for NS2 and enable them for the NS2
SVK board
Signed-off-by: Ray Jui
Reviewed-by: Vikram Prakash
Reviewed-by: Scott Branden
---
Recent kernels requires cache hierrachy to be defined via DT hence
this patch updates NS2 DT accordingly.
Signed-off-by: Anup Patel
Reviewed-by: Sandeep Tripathy
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
Hi Daniel,
[auto build test results on v4.3-rc3 -- if it's inappropriate base, please
ignore]
config: arm64-allyesconfig (attached as .config)
reproduce:
wget
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
-O ~/bin/make.cross
chmod +x
Add a simple boolean binding to turn on and off the use of ADC
microphone detection mode to determine 3/4 pole jack.
Signed-off-by: Charles Keepax
Acked-by: Chanwoo Choi
---
drivers/extcon/extcon-arizona.c |3 +++
1 files changed,
On 10/02, Mike Looijmans wrote:
> On 02-10-15 01:34, Stephen Boyd wrote:
> >>+ - clock-output-names: From common clock bindings. Recommended to be
> >>"si514".
> >>+ - clock-frequency: Output frequency to generate. This defines the output
> >>+ frequency set during boot. It can be
The mmc host controller fails to check for the presence
of an aliases entry in the device tree when creating a
new mmc host. This means that mmc bus numbers are not
as specified in the aliases node.
For example, the following on an imx6 would make mmc0
the second sdhci, and mmc2 the first sdhci:
On 15/09/15 17:50, Punit Agrawal wrote:
ARM System Control Processor (SCP) provides an API to query and use
the sensors available in the system. Extend the SCPI driver to support
sensor messages.
Signed-off-by: Punit Agrawal
Cc: Sudeep Holla
We have IPROC RNG200 hardware random number generation in
NS2 SoC, lets enable it for NS2 in NS2 DT.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Pramod KUMAR
Reviewed-by: Vikram Prakash
The NS2 SoC has Cortex-A57 CPUs which support ARM PMUv3 so,
lets enable ARM PMUv3 in NS2 DT.
Signed-off-by: Anup Patel
Reviewed-by: Vikram Prakash
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
We add l2-cache, SMMU, reboot, PMUv3, RNG, and I2C DT nodes
for NS2 SVK.
This patchset is based on v4.3-rc3 and available in ns2_dt1_v1
branch of https://github.com/Broadcom/arm64-linux.git.
The patchset is tested on NS2 SVK.
Anup Patel (5):
arm64: dts: Add L2-cache DT node for NS2
arm64:
The SMMU-500 driver is already available in Linux kernel. Let's
enable it for NS2 in DT.
This patch keeps mmu-masters attribute empty so that driver patches
can later extend this attribute when adding device DT nodes.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
To reset NS2, we simply have to write '0' to BIT[1] at offset 0x90
of CRMU space.
The above can be easily achieved by writing 0xfffd at offset 0x90
using syscon-reboot driver. We don't need to have separate driver for
rebooting NS2.
This patch enables syscon-reboot driver for NS2 using DT.
Hi Tyler,
On Wed, 30 Sep 2015, Tyler Baker wrote:
> On 30 September 2015 at 10:31, Mark Brown wrote:
> > On Wed, Sep 30, 2015 at 10:24:56AM +0200, Arnd Bergmann wrote:
> >> On Tuesday 29 September 2015 13:29:12 Tyler Baker wrote:
> >
> >> > aliases {
> >> >
This patch adds a label for uart0 to allow changing of uart0 pins.
Signed-off-by: Stefan Wahren
---
arch/arm/boot/dts/bcm2835.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index
From: David Daney
If we create multiple buses with pci-host-generic, or there are buses
created by other drivers, we don't want to call pci_fixup_irqs() which
operates on all devices, not just the devices on the bus being added.
The consequence is that either the fixups
From: David Daney
If the bus is being configured with a bus-range that does not start at
zero, pass that starting bus number to pci_scan_root_bus(). Passing
the incorrect value of zero causes attempted config accesses outside
of the supported range, which cascades to an
Add additional bindings to allow configuration of the system specific
microphone detection settings.
Signed-off-by: Charles Keepax
---
Documentation/devicetree/bindings/mfd/arizona.txt | 21 +
include/dt-bindings/mfd/arizona.h
By default the driver expects the jackdet pin to be pulled low when a
jack is inserted. This patch adds a device binding that allows the user
to specify that the jackdet pin will be pulled high when a jack is
inserted.
Signed-off-by: Charles Keepax
Acked-by:
Add additional binding for inverting the polarity of the detection on
the jack detection pins.
Signed-off-by: Charles Keepax
---
Documentation/devicetree/bindings/mfd/arizona.txt |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git
This patch chain adds device bindings for the jack and
microphone detection system specific settings.
Mark, I have added you on the chain as getting a DT ack is
proving challenging and Lee said he would appreciate your
opinion on these, hope that is ok. Note that some of the
changes backing the
The switch is generally used in conjunction with the MICDET clamp to
suppress pops and clicks associated with jack insertion. This patch adds
a binding that allows the user to select the mode of operation for this
switch.
Signed-off-by: Charles Keepax
We should always type-cast pointer to "long" or "unsigned long"
because size of pointer is same as machine word size. This will
avoid pointer type-cast issues on both 32bit and 64bit systems.
This patch fixes pointer type-cast issue in brcmnand_write()
as-per above info.
Signed-off-by: Anup
We enable NAND support for Broadcom NS2 SoC by reusing existing
BRCMNAND driver.
This patchset applies on-top of "arm64: Simple additions to
NS2 DT" patchset and is available in ns2_nand_v1 branch of
https://github.com/Broadcom/arm64-linux.git.
The patchset is tested on NS2 SVK.
Anup Patel
The BRCM NAND driver can be re-used for Broadcom ARM64 SoCs hence
this patch updates Kconfig to allow selection of MTD_NAND_BRCMNAND
for ARM64.
Signed-off-by: Anup Patel
Reviewed-by: Vikram Prakash
Reviewed-by: Ray Jui
This patch updates the BRCM NAND controller DT bindings documentation
to add info about newly added optional flag "brcm,nand-iproc-reset".
Signed-off-by: Anup Patel
Reviewed-by: Pramod KUMAR
Reviewed-by: Ray Jui
Reviewed-by:
The BRCM NAND controller on NS2 SoC requires a reset to
cleanup previously configured NAND controller state.
This patch adds optional boolean device tree flag named
"brcm,nand-iproc-reset". If this flag is present in NAND
controller DT node then BRCM IPROC NAND driver will reset
the NAND
From: David Daney
There are two problems with the bus_max calculation:
1) The u8 data type can overflow for large config space windows.
2) The calculation is incorrect for a bus range that doesn't start at
zero.
Since the configuration space is relative to bus zero,
From: David Daney
pci_bus_fixup_irqs() works like pci_fixup_irqs(), except it only does
the fixups for devices on the specified bus.
Follow-on patch will use the new function.
Signed-off-by: David Daney
---
No change from v2.
From: David Daney
The pci-host-generic driver keeps a global struct pci_ops which it
then patches with the .map_bus method appropriate for the bus device.
A problem arises when the driver is used for two different types of
bus devices, the .map_bus method for the last
On 08/24, Gabriel Fernandez wrote:
> The patch adds support for enable/disable of the Clockgen PLLs.
> clkgen_pll_enable/clkgen_pll_disable added as generic function for all PLLs.
>
> Signed-off-by: Pankaj Dev
> Signed-off-by: Gabriel Fernandez
>
This adds support for enabling, disabling, and setting the rate of the
audio domain clocks. It will be necessary for setting the pixel clock
for HDMI in the VC4 driver and let us write a cpufreq driver. It will
also improve compatibility with user changes to the firmware's
config.txt, since our
On 08/24, Gabriel Fernandez wrote:
> Add support for new PLL-type for stih418 A9-PLL.
>
> Signed-off-by: Gabriel Fernandez
> ---
I assume this will go through arm-soc?
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation
On 08/24, Gabriel Fernandez wrote:
> Change A9 PLL rate, as per requirement from the cpufreq framework,
> for DVFS. For rate change, the A9 clock needs to be temporarily sourced
> from PLL external to A9 and then sourced back to A9-PLL
>
> Signed-off-by: Pankaj Dev
>
1 - 100 of 149 matches
Mail list logo