On 12.10.2015 13:29, Yakir Yang wrote:
> Both hsync/vsync polarity and interlace mode can be parsed from
> drm display mode, and dynamic_range and ycbcr_coeff can be judge
> by the video code.
>
> But presumably Exynos still relies on the DT properties, so take
> good use of mode_fixup() in to ach
On Mon, Oct 12, 2015 at 2:04 AM, Simon Horman wrote:
>> + flash@0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "spansion,s25fl512s", "jedec,spi-nor";
>
> spansion,s25fl512s is used in several dt files but it seems to be
> undocument
On 12.10.2015 15:26, Alim Akhtar wrote:
> Since the merge of 2fad972 ("ARM: dts: Add mclk entry for Peach boards"),
Please switch to longer SHA abbreviation:
$ git config core.abbrev 12
> sound card detection is broken on peach boards and gives below errors:
>
> [3.630457] max98090 7-0010: M
Since the merge of 2fad972 ("ARM: dts: Add mclk entry for Peach boards"),
sound card detection is broken on peach boards and gives below errors:
[3.630457] max98090 7-0010: MAX98091 REVID=0x51
[3.634233] max98090 7-0010: use default 2.8v micbias
[3.640985] snow-audio sound: HiFi <-> 38
Since we have added the necessary axi clk properties in dts, we can
remove the "sdio" clk's CLK_IGNORE_UNUSED flag now.
Signed-off-by: Jisheng Zhang
---
drivers/clk/berlin/bg2q.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg
The optional axi clock is CLKID_SDIO.
Signed-off-by: Jisheng Zhang
---
arch/arm/boot/dts/berlin2q.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 4ad585c..2f12048 100644
--- a/arch/arm/boot/dts/berli
Commit 8afdc9cca27f ("mmc: sdhci-pxav3: Get optional core clock") adds
additional optional clock support, but the clock names isn't correct.
The current "io" clock is really the PXAv3 SDHCI IP's "core" clock
which is manadatory. The current "core" clock is really the IP's "axi"
clock which is opti
Add the axi clock for BG2Q's sdhci0 and sdhci1. This would let the axi
clock be disabled during runtime pm, so saves power a bit.
Signed-off-by: Jisheng Zhang
---
arch/arm/boot/dts/berlin2q.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/berlin2q.
The axi clock properties already exists, so there's no need to set this
flag for sdio0 and sdio1 clk any more.
Signed-off-by: Jisheng Zhang
---
drivers/clk/berlin/bg2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/berlin/bg2.c b/drivers/clk/berlin/bg2.c
ind
The sdhci-pxav3's clock name isn't correct. The current "io" clock is really
the PXAv3 SDHCI IP's "core" clock which is manadatory. The current "core"
clock is really the IP's "axi" clock which is optional. We fix this in patch1.
The following patches add the axi clock properties to bg2q dtsi, the
On 12.10.2015 13:42, Krzysztof Kozlowski wrote:
> On 12.10.2015 00:46, Anand Moon wrote:
>> Added support for vmmc/vqmmc-supply for emmc/sd cards.
>> Fixed the min values for regulator ldo13_reg (VDDQ_MMC2).
>
> I can't see the description of a problem which is fixed. If you fix
> something, then
On 12.10.2015 00:46, Anand Moon wrote:
> Added support for UHS-I bus speed 50MB/s (SDR50, DDR50) 104MB/s (SDR104)
This description is not entirely correct. The MMC driver already
supports these UHS speeds (you did not any code) so you rather enabled
it (description of bindings says "is supported")
Hi,
On 10/12/2015 01:29 PM, Krzysztof Kozlowski wrote:
> On 12.10.2015 00:46, Anand Moon wrote:
>> From: Jaehoon Chung
>>
>> To detect sd-card use the cd-gpio method.
>> It can decrease the interrupt for detecting sd-card.
>>
>> Signed-off-by: Jaehoon Chung
>> Signed-off-by: Anand Moon
>>
>> --
On 12.10.2015 00:46, Anand Moon wrote:
> Added support for vmmc/vqmmc-supply for emmc/sd cards.
> Fixed the min values for regulator ldo13_reg (VDDQ_MMC2).
I can't see the description of a problem which is fixed. If you fix
something, then please describe what is wrong.
> Added ramp-delay for LDO
Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code.
But presumably Exynos still relies on the DT properties, so take
good use of mode_fixup() in to achieve the compatibility hacks.
Signed-off-by: Yakir
On 12.10.2015 00:46, Anand Moon wrote:
> From: Jaehoon Chung
>
> To detect sd-card use the cd-gpio method.
> It can decrease the interrupt for detecting sd-card.
>
> Signed-off-by: Jaehoon Chung
> Signed-off-by: Anand Moon
>
> ---
> Changes based on
> git://git.kernel.org/pub/scm/linux/kerne
On 12.10.2015 13:09, Yakir Yang wrote:
>
>
> On 10/12/2015 11:51 AM, Krzysztof Kozlowski wrote:
>> On 12.10.2015 11:43, Yakir Yang wrote:
>>> On 10/12/2015 08:49 AM, Krzysztof Kozlowski wrote:
On 12.10.2015 09:37, Yakir Yang wrote:
> Hi Krzysztof,
>
> On 10/10/2015 11:46 PM, Yaki
On 10/12/2015 11:51 AM, Krzysztof Kozlowski wrote:
On 12.10.2015 11:43, Yakir Yang wrote:
On 10/12/2015 08:49 AM, Krzysztof Kozlowski wrote:
On 12.10.2015 09:37, Yakir Yang wrote:
Hi Krzysztof,
On 10/10/2015 11:46 PM, Yakir Yang wrote:
Both hsync/vsync polarity and interlace mode can be pa
On 12.10.2015 11:43, Yakir Yang wrote:
>
>
> On 10/12/2015 08:49 AM, Krzysztof Kozlowski wrote:
>> On 12.10.2015 09:37, Yakir Yang wrote:
>>> Hi Krzysztof,
>>>
>>> On 10/10/2015 11:46 PM, Yakir Yang wrote:
Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode,
On 10/12/2015 08:49 AM, Krzysztof Kozlowski wrote:
On 12.10.2015 09:37, Yakir Yang wrote:
Hi Krzysztof,
On 10/10/2015 11:46 PM, Yakir Yang wrote:
Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code
On Sun, 11 Oct 2015 00:36:36 +0200
Antoine Tenart wrote:
> Hi Jisheng,
>
> Please keep Acked-by tags when you submit a new version of a series.
Got it. I dunno this before, will take care in the future.
Thanks a lot for your review,
Jisheng
>
> Thanks,
>
> Antoine
>
> On Fri, Oct 09, 2015
Add Mediatek usb3 phy driver to maintainer entry.
Signed-off-by: Chunfeng Yun
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7ba7ab7..be0055c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1291,6 +1291,13 @@ F: arch/arm/mach-media
Hi Alan,
thanks for your feedback!
On Fri, Oct 9, 2015 at 8:09 PM, atull wrote:
> On Thu, 8 Oct 2015, Moritz Fischer wrote:
>
>> --- /dev/null
>> +++ b/drivers/fpga/zynq-fpga.c
>> @@ -0,0 +1,478 @@
>> +/*
>> + * Copyright (c) 2011-2015 Xilinx Inc.
>> + * Copyright (c) 2015, National Instruments
On 12.10.2015 09:37, Yakir Yang wrote:
> Hi Krzysztof,
>
> On 10/10/2015 11:46 PM, Yakir Yang wrote:
>> Both hsync/vsync polarity and interlace mode can be parsed from
>> drm display mode, and dynamic_range and ycbcr_coeff can be judge
>> by the video code.
>>
>> But presumably Exynos still relies
Hi Krzysztof,
On 10/10/2015 11:46 PM, Yakir Yang wrote:
Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code.
But presumably Exynos still relies on the DT properties, so take
good use of mode_fixup() i
On Mon, Oct 12, 2015 at 09:04:53AM +0900, Simon Horman wrote:
> [Cc Geert]
>
> On Fri, Oct 09, 2015 at 11:51:05PM +0300, Sergei Shtylyov wrote:
> > Define the Porter board dependent part of the QSPI device node.
> > Add device nodes for Spansion S25FL512S SPI flash and the MTD partitions
> > on
On Sat, Oct 10, 2015 at 12:41:26AM +0300, Sergei Shtylyov wrote:
> Enable the PCIe controller and clock for the Porter board.
>
> This patch is analogous to the commit 485f3ce67c11 ("ARM: shmobile:
> henninger: Enable PCIe Controller & PCIe bus clock") as there are no
> differences between the boa
[Cc Geert]
On Fri, Oct 09, 2015 at 11:51:05PM +0300, Sergei Shtylyov wrote:
> Define the Porter board dependent part of the QSPI device node.
> Add device nodes for Spansion S25FL512S SPI flash and the MTD partitions
> on it.
>
> This patch is mostly analogous to the commit f59838d44835 (ARM:
On Fri, Oct 09, 2015 at 11:40:52PM +0300, Sergei Shtylyov wrote:
> On 05/07/2014 12:47 AM, Sergei Shtylyov wrote:
>
> >Define the Henninger board dependent part of the MSIOF0 device node.
> >Add device node for Renesas R2A11302FT PMIC for which no bindings exist yet.
>
>I've just realized tha
On Fri, Oct 09, 2015 at 08:53:18PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 10/09/2015 04:13 AM, Simon Horman wrote:
>
> >>Define the Porter board dependent part of the I2C2 device node.
> >>
> >>This patch is analogous to the commit 29a647c396a0 ("ARM: shmobile:
> >>henninger: add I2C2 DT
This driver for Freescale MPC512x LocalPlus Bus FIFO (called SCLPC
in the Reference Manual) allows Direct Memory Access transfers
between RAM and peripheral devices on LocalPlus Bus.
Signed-off-by: Alexander Popov
---
arch/powerpc/configs/mpc512x_defconfig| 1 +
arch/powerpc/include/as
Add a device tree binding for Freescale MPC512x LocalPlus Bus FIFO and
introduce the document describing that binding.
Signed-off-by: Alexander Popov
---
.../bindings/powerpc/fsl/mpc512x_lpbfifo.txt| 21 +
arch/powerpc/boot/dts/mpc5121.dtsi | 11 +
This driver for Freescale MPC512x LocalPlus Bus FIFO (called SCLPC
in the Reference Manual) allows Direct Memory Access transfers
between RAM and peripheral devices on LocalPlus Bus.
Changes in v3:
- resource usage in probe() is fixed;
- driver methods are made safe against remove();
- dma_requ
On Tue, Aug 18, 2015 at 03:34:08PM -, Michal Suchanek wrote:
> The lock flag of ofpart is undocumented. Add to binding doc.
Good catch. There are a lot of small corners of very old code that never
really got reviewed properly, I expect...
(And the flag looks very odd. Why exactly is it in the
Hi DT maintainers,
It's a bit hypocritical of me, since I've been a slow reviewer as well,
but... can we get some review on this one? Usually, I'm comfortable
taking driver DT bindings without your review, but this one is a bit
more generic and is more far-reaching than the average driver.
I'm no
Hi Michal,
Sorry for the very long waits here. Unfortunately, I've been saying that
a lot lately, as I haven't had a lot of time and have generated a lot of
backlog. I really like that you've been working on this though, since
there are definitely problems here.
On Tue, Aug 18, 2015 at 03:34:07PM
On Tue, Aug 18, 2015 at 03:34:07PM -, Michal Suchanek wrote:
> The probe of a mtd device can fail when a partition parser returns
> error. The failure due to partition parsing can be quite mysterious when
> multiple partitioning schemes are comiled in and any of them can fail
> the probe.
>
>
Driven via the Raspberry Pi VideoCore 4 firmware interface.
Signed-off-by: Lubomir Rintel
Cc: Stephen Warren
Cc: Lee Jones
Cc: Eric Anholt
Cc: devicetree@vger.kernel.org
Cc: linux-rpi-ker...@lists.infradead.org
Cc: linux-arm-ker...@lists.infradead.org
---
Needs the RPi firmware patchset from b
This one has an extra P5 header (unpopulated) with I2S.
Signed-off-by: Lubomir Rintel
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 23 +++
2 files changed, 24 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm2835-rpi-b-
Essentially the same as B+.
Signed-off-by: Lubomir Rintel
---
arch/arm/boot/dts/Makefile | 3 ++-
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 30 ++
2 files changed, 32 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/bcm2835-rpi-a-plus
It's the Model B rev2 that had it. Remove it.
Signed-off-by: Lubomir Rintel
---
arch/arm/boot/dts/bcm2835-rpi-b.dts | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts
b/arch/arm/boot/dts/bcm2835-rpi-b.dts
index ee89b79..ff6b2d1 100644
On 5 October 2015 at 10:22, Daniel Thompson wrote:
> On 4 October 2015 at 11:32, Linus Walleij wrote:
>> On Sat, Oct 3, 2015 at 10:35 PM, Daniel Thompson
>> wrote:
>> Then this construct:
>>
>>> +static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool
>>> wait)
>>> +{
>> (...)
On 5 October 2015 at 10:22, Daniel Thompson wrote:
> On 4 October 2015 at 11:32, Linus Walleij wrote:
>> On Sat, Oct 3, 2015 at 10:35 PM, Daniel Thompson
>> 3. I took out the datasheet for Nomadik STn8820 and it seems that
>> the hardware is very similar to what this driver is trying to drive.
>>
On Sat, Oct 10, 2015 at 01:52:52PM +0100, Adam Sampson wrote:
> The LinkSprite pcDuino v3 Nano's two USB host ports are powered by a
> single RT9701GB regulator, which has its enable input tied to the A20's
> PD2 pin, pulled up to 3v3 via a 10k resistor.
>
> However, the script.bin that shipped wi
On Fri, Oct 09, 2015 at 02:09:39PM +0300, Siarhei Siamashka wrote:
> Enable the otg/drc usb controller on the pcDuino1/2 board. Note
> that the pcDuino1 FEX file from the vendor contains the following
> information in the [usbc0] section:
> usb_id_gpio = port:PH04<0><1>
> usb_det_vbus_gpio
On Fri, Oct 09, 2015 at 02:09:38PM +0300, Siarhei Siamashka wrote:
> The LinkSprite pcDuino2 board is almost identical to the older
> LinkSprite pcDuino1 board according to the schematic pdf files.
> So we just include the existing "sun4i-a10-pcduino.dts" file and
> make the necessary adjustments.
On Fri, Oct 09, 2015 at 02:09:37PM +0300, Siarhei Siamashka wrote:
> The pcDuino1 board does not use any power switches at all for its
> two USB host ports and the VBUS pins are always connected to 5V.
>
> The pcDuino2 board uses the RT9701GB power switch for its single
> USB host port, but the US
On Thu, Oct 08, 2015 at 09:37:39AM +0100, Hans de Goede wrote:
> Hi,
>
> On 10/01/2015 09:32 AM, Maxime Ripard wrote:
> >Hi,
> >
> >On Tue, Sep 29, 2015 at 10:26:37AM +0200, Hans de Goede wrote:
> >>Hi,
> >>
> >>On 29-09-15 10:04, Maxime Ripard wrote:
> >>>On Tue, Sep 22, 2015 at 03:36:01PM +0200,
On Tue, Sep 22, 2015 at 03:36:01PM +0200, Hans de Goede wrote:
> Enable the otg/drc usb controller on the Bananapi.
>
> Signed-off-by: Hans de Goede
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
signature.as
On Thu, Oct 08, 2015 at 12:18:36AM +0200, Timo Sigurdsson wrote:
> sun7i-a20-bananapi.dts doesn't contain regulator nodes for the AXP209 PMU
> driver, so add them to allow for voltage-scaling with cpufreq-dt. Also
> add board-specific OPP to use slightly higher voltages at lower
> frequencies since
Added support for UHS-I bus speed 50MB/s (SDR50, DDR50) 104MB/s (SDR104)
Signed-off-by: Anand Moon
---
Changes based on
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
v4.4-next/dt-samsung branch
Changes Fixed the UHS-I bus speed detedtion on cold boot.
[2.439806] m
Added support for vmmc/vqmmc-supply for emmc/sd cards.
Fixed the min values for regulator ldo13_reg (VDDQ_MMC2).
Added ramp-delay for LDO9(VDD33_USB3_0).
Added ramp-delay for LDO13(VDDQ_MMC2).
Added ramp-delay for LDO15(ETH_P3V3).
Signed-off-by: Anand Moon
---
Changes based on
git://git.kernel.
From: Jaehoon Chung
To detect sd-card use the cd-gpio method.
It can decrease the interrupt for detecting sd-card.
Signed-off-by: Jaehoon Chung
Signed-off-by: Anand Moon
---
Changes based on
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
v4.4-next/dt-samsung branch
--
On 06/10/15 09:12, Sean Nyekjaer wrote:
> This patch adds support for the Texas Intruments ADS8688 ADC.
>
> Signed-off-by: Sean Nyekjaer
> Reviewed-by: Martin Hundebøll
only one issue that I can see. You do need locking to protect
your local buffers. A local lock in the same structure would be
Hi,
On Sunday 11 October 2015 04:45 PM, punnaiah choudary kalluri wrote:
> On Wed, Sep 30, 2015 at 9:48 PM, Felipe Balbi wrote:
>> On Thu, Sep 24, 2015 at 11:18:01AM -0500, Rob Herring wrote:
>>> On Thu, Sep 24, 2015 at 4:26 AM, Subbaraya Sundeep Bhatta
>>> wrote:
Hi Peter,
> -
On 04/10/15 17:04, H. Nikolaus Schaller wrote:
>
> Am 27.09.2015 um 17:21 schrieb Jonathan Cameron :
>
>> On 23/09/15 13:48, H. Nikolaus Schaller wrote:
>>> This driver code was found as:
>>>
>>> https://android.googlesource.com/kernel/tegra/+/aaabb2e045f31e5a970109ffdaae900dd403d17e/drivers/stag
On 05/10/15 07:14, H. Nikolaus Schaller wrote:
> This driver code was found as:
>
> https://android.googlesource.com/kernel/tegra/+/aaabb2e045f31e5a970109ffdaae900dd403d17e/drivers/staging/iio/adc
>
> Fixed various compilation issues and test this driver on omap5 evm.
>
> Signed-off-by: Pradeep
Am 09.10.2015 um 23:27 schrieb Eric Anholt:
VC4 is the GPU (display and 3D) present on the 2835.
Signed-off-by: Eric Anholt
---
v2: Sort by register address, mark HDMI as disabled by default in the
SoC file and enable it from -rpi.
v3: Add references to the pixel/HSM clocks for HDMI. Re
Hi Eric,
Am 09.10.2015 um 23:27 schrieb Eric Anholt:
This is enough for fbcon and bringing up X using
xf86-video-modesetting. It doesn't support the 3D accelerator or
power management yet.
Signed-off-by: Eric Anholt
Acked-by: Daniel Vetter
---
v2: Drop FB_HELPER select thanks to Archit's pa
On 08/10/15 11:59, Haibo Chen wrote:
> Freescale i.MX7D soc contains a new ADC IP. This patch add this ADC
> driver support, and the driver only support ADC software trigger.
>
> Signed-off-by: Haibo Chen
Hi Haibo,
A very nice clean driver. I've noted a few minor stylistic things inline that
I w
On 11/10/15 14:31, Jonathan Cameron wrote:
> On 08/10/15 11:59, Haibo Chen wrote:
>> The patch adds the binding file for Freescale imx7d ADC driver.
>>
>> Signed-off-by: Haibo Chen
> Couple of trivial typos.. otherwise fine.
>> ---
>> .../devicetree/bindings/iio/adc/imx7d-adc.txt | 26
>> +
On 08/10/15 11:59, Haibo Chen wrote:
> The patch adds the binding file for Freescale imx7d ADC driver.
>
> Signed-off-by: Haibo Chen
Couple of trivial typos.. otherwise fine.
> ---
> .../devicetree/bindings/iio/adc/imx7d-adc.txt | 26
> ++
> 1 file changed, 26 insertio
Am 09.10.2015 um 23:27 schrieb Eric Anholt:
This is a respin of the Raspberry Pi KMS series. Now that we've got a
real clock driver, I can actually set new video modes. Also in this
version, most of the custom DT stuff from before is gone, thanks to
finding exynos's platform_driver component ma
On Wed, Sep 30, 2015 at 9:48 PM, Felipe Balbi wrote:
> On Thu, Sep 24, 2015 at 11:18:01AM -0500, Rob Herring wrote:
>> On Thu, Sep 24, 2015 at 4:26 AM, Subbaraya Sundeep Bhatta
>> wrote:
>> > Hi Peter,
>> >
>> >> -Original Message-
>> >> From: Peter Chen [mailto:peter.c...@freescale.com]
Hi Sjoerd,
Am Freitag, 9. Oktober 2015, 13:35:55 schrieb Sjoerd Simons:
> On Thu, 2015-10-08 at 17:10 +0200, Heiko Stuebner wrote:
> > Am Donnerstag, 8. Oktober 2015, 15:31:16 schrieb Sjoerd Simons:
> > > The clock branches leading to sclk_spdif and sclk_spdif_8ch on
> > > RK3288
> > > SoCs only f
From: Chen-Yu Tsai
Q8 format tablets use channel 0 of the PWM controller for backlight dimming.
Signed-off-by: Chen-Yu Tsai
Signed-off-by: Hans de Goede
---
Changes in v2:
-Enable the pwm controller in sunxi-q8-common.dtsi rather then in
sun8i-q8-common.dtsi
---
arch/arm/boot/dts/sunxi-q8-co
All A13 based q8 formfactor tablets use the same backlight setup, add
a backlight devicetree node for controlling the backlight on these devices.
Signed-off-by: Hans de Goede
---
Changes in v2:
-Drop the comment about DCDC1SW, the axp209 used on A13 boards does not
have a DCDC1SW
---
arch/arm/b
Add dts nodes for the PWM controller on the A13 / A10s.
Signed-off-by: Hans de Goede
---
Changes in v3:
-Use a separate compatible string for a10s and a13
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 8
arch/arm/boot/dts/sun5i-a13.dtsi | 10 ++
2 files changed, 18 insertions(+)
di
Add a pinmux setting for the first pwm channel. This is often used for
backlight dimming on tablets.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun5i.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 78b993a.
Hi,
On 01-10-15 22:33, Maxime Ripard wrote:
Hi,
On Tue, Sep 29, 2015 at 12:29:47PM +0200, Hans de Goede wrote:
Hi Maxime,
This series seems to have fallen through the cracks, hence this
resend.
No, it didn't fall through the cracks, I asked a question on the first
patch and never got a repl
The pwm controller on sun5i SoCs is identical to the one found on sun7i
SoCs. On the A13 package only one of the 2 pins is routed to the outside,
so only advertise one pwm there.
Signed-off-by: Hans de Goede
---
.../devicetree/bindings/pwm/pwm-sun4i.txt | 2 ++
drivers/pwm/pwm-sun4i.c
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