On Wed, Oct 21, 2015 at 11:10:03AM +0100, Sudeep Holla wrote:
> Though the mmc core driver should/will continue to support the legacy
> "nvidia,wakeup-source" property to enable SDIO as the wakeup source, we
> need to add support for the new standard property "wakeup-source".
>
> This patch adds s
On Fri, Oct 23, 2015 at 1:31 PM, Bjorn Helgaas wrote:
> Hi Ley,
>
> On Thu, Oct 22, 2015 at 05:27:28PM +0800, Ley Foon Tan wrote:
>> This patch adds the Altera PCIe host controller driver.
>
>> +static void altera_pcie_fixups(struct pci_bus *bus)
>> +{
>> + struct pci_dev *dev;
>> +
>> + l
On Fri, Oct 23, 2015 at 10:39:19AM +0900, Krzysztof Kozlowski wrote:
> SRAM bindings for various SoCs, using the mmio-sram genalloc
> API, are spread over different places - per SoC vendor. Since all of
> these are quite similar (they depend on mmio-sram) move them to a common
> place.
>
> Signed-
On Fri, Oct 23, 2015 at 11:50:37AM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
>
> This is v4 of the simplefb regulator support series. This series adds
> regulator claiming and enabling support for simplefb.
>
> Changes since v4:
> - Fixed inverted logic when testing the property name.
> - Fix
On 2015년 10월 21일 03:20, Sergei Shtylyov wrote:
> Hello.
>
> On 12/18/2014 12:58 AM, Sergei Shtylyov wrote:
>
MAX3355E chip integrates a charge pump and comparators to enable a system
with
an integrated USB OTG dual-role transceiver to function as a USB OTG
dual-role
dev
This patch adds the device tree bindings for RT5033 flash LEDs.
Signed-off-by: Ingi Kim
Acked-by: Rob Herring
---
.../devicetree/bindings/leds/leds-rt5033.txt | 38 ++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/leds/leds-rt50
This patch adds device driver of Richtek RT5033 PMIC.
The driver supports a current regulated output to drive
white LEDs for camera flash.
Signed-off-by: Ingi Kim
---
drivers/leds/Kconfig | 8 +
drivers/leds/Makefile | 1 +
drivers/leds/leds-rt5033.c | 314
This patch supports flash led of RT5033 PMIC.
Changes since v3:
- Use mutex and work queue
- Split brightness set func (sync / async)
- Add flash API (flash_brightness_set)
- Move struct(rt5033_led_config_data) to local area
- Code clean
Changes since v2:
- Split MFC code from rt5033 flash
This patch adds rt5033-led sub device to support it.
Signed-off-by: Ingi Kim
Acked-by: Lee Jones
---
drivers/mfd/rt5033.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mfd/rt5033.c b/drivers/mfd/rt5033.c
index d60f916..035421c 100644
--- a/drivers/mfd/rt5033.c
+++ b/drivers/mfd
Hi Ley,
On Thu, Oct 22, 2015 at 05:27:28PM +0800, Ley Foon Tan wrote:
> This patch adds the Altera PCIe host controller driver.
> +static void altera_pcie_fixups(struct pci_bus *bus)
> +{
> + struct pci_dev *dev;
> +
> + list_for_each_entry(dev, &bus->devices, bus_list) {
> +
Just like other NAND controllers, the NAND READID command only works
in 8bit mode for all versions of BRCMNAND controller.
This patch forces 8bit mode for each NAND CS in brcmnand_init_cs()
before doing nand_scan_ident() to ensure that BRCMNAND controller
is in 8bit mode when NAND READID command i
The NAND controller on NS2 SoC is compatible with existing
BRCM IPROC NAND driver so let's enable it in NS2 DT and
NS2 SVK DT.
This patch also fixes use of node labels in ns2-svk.dts.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broadcom/ns
We enable NAND support for Broadcom NS2 SoC by reusing existing
BRCMNAND driver.
This patchset applies on-top of "arm64: Simple additions to
NS2 DT" v1 patchset and is available in ns2_nand_v3 branch of
https://github.com/Broadcom/arm64-linux.git.
The patchset is tested on NS2 SVK.
Changes since
2015-10-22 18:44 GMT-07:00 Jaedon Shin :
> Add offsets for 40nm BMIPS based set-top box platforms.
>
> Signed-off-by: Jaedon Shin
> ---
> drivers/phy/phy-brcmstb-sata.c | 21 ++---
> 1 file changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/phy/phy-brcmstb-sata.c b
2015-10-22 18:44 GMT-07:00 Jaedon Shin :
> Add data of device node for phy offset.
Similar comment to the AHCI portion, we could just omit specifying the
offset in the of_device_id.data member, and just assume the current
offset if not defined.
Acked-by: Florian Fainelli
>
> Signed-off-by: Jaed
2015-10-22 18:44 GMT-07:00 Jaedon Shin :
> Remove unused definitions.
>
> Signed-off-by: Jaedon Shin
Acked-by: Florian Fainelli
> ---
> drivers/phy/phy-brcmstb-sata.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/phy/phy-brcmstb-sata.c b/drivers/phy/phy-brcmstb-sata.c
> ind
2015-10-22 18:44 GMT-07:00 Jaedon Shin :
> The BCM7xxx ARM and MIPS platforms share a similar hardware block for AHCI
> SATA3 PHY.
>
> Signed-off-by: Jaedon Shin
Acked-by: Florian Fainelli
> ---
> drivers/phy/Kconfig | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/
2015-10-22 18:44 GMT-07:00 Jaedon Shin :
> Add offsets for 40nm BMIPS based set-top box platforms.
>
> Signed-off-by: Jaedon Shin
> ---
> drivers/ata/ahci_brcmstb.c | 11 +--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/ata/ahci_brcmstb.c b/drivers/ata/ahci_b
2015-10-22 18:44 GMT-07:00 Jaedon Shin :
> Add data of device node for port offset.
Looks good to me, some minor nits below.
>
> Signed-off-by: Jaedon Shin
> ---
> drivers/ata/ahci_brcmstb.c | 25 +
> 1 file changed, 17 insertions(+), 8 deletions(-)
>
> diff --git a/driv
2015-10-22 18:44 GMT-07:00 Jaedon Shin :
> The BCM7xxx ARM and MIPS platforms share a similar hardware block for AHCI
> SATA3.
>
> Signed-off-by: Jaedon Shin
Acked-by: Florian Fainelli
> ---
> drivers/ata/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/
2015-10-22 20:58 GMT-07:00 Tejun Heo :
> On Fri, Oct 23, 2015 at 10:44:13AM +0900, Jaedon Shin wrote:
>> Hi all,
>>
>> This patch series adds support SATA for BMIPS_GENERIC.
>>
>> Ralf,
>> I request you to drop already submitted patches for NAND device nodes.
>> It is merge conflicts with this patc
On Fri, Oct 23, 2015 at 10:44:13AM +0900, Jaedon Shin wrote:
> Hi all,
>
> This patch series adds support SATA for BMIPS_GENERIC.
>
> Ralf,
> I request you to drop already submitted patches for NAND device nodes.
> It is merge conflicts with this patches.
> http://patchwork.linux-mips.org/patch/1
From: Karsten Merker
The MSI Primo81 is an A31s based tablet, with 1G RAM, 16G NAND,
768x1024 IPS LCD display, mono speaker, 0.3 MP front camera, 2.0 MP
rear camera, 3500 mAh battery, gt911 touchscreen, mma8452 accelerometer
and rtl8188etv usb wifi. Has "power", "volume+" and "volume-" buttons
(b
Hi everyone,
This is v4 of the simplefb regulator support series. This series adds
regulator claiming and enabling support for simplefb.
Changes since v4:
- Fixed inverted logic when testing the property name.
- Fixed regulator supply name string copy length off by 1.
- Added real world use
This claims and enables regulators listed in the simple framebuffer dt
node. This is needed so that regulators powering the display pipeline
and external hardware, described in the device node and known by the
kernel code, will remain properly enabled.
Signed-off-by: Chen-Yu Tsai
Acked-by: Mark B
The physical display tied to the framebuffer may have regulators
providing power to it, such as power for LCDs or interface conversion
chips.
The number of regulators in use may vary, but the regulator supply
binding can not be a list. Instead just support any named regulator
supply properties und
Some boards, such as tablets, have regulators providing power to parts
of the display pipeline, like signal converters and LCD panels.
Add labels to the simplefb device nodes so that we can reference them
in the board dts files to add regulator supply properties.
Signed-off-by: Chen-Yu Tsai
---
On Fri, Oct 23, 2015 at 9:31 AM, Chen-Yu Tsai wrote:
> This claims and enables regulators listed in the simple framebuffer dt
> node. This is needed so that regulators powering the display pipeline
> and external hardware, described in the device node and known by the
> kernel code, will remain pr
Hi Steve,
Thanks for pointing the link, I have not seen that driver before; I was mainly
looking at driver/edac/xgene_edac.c and some other arm edac drivers. My first
attempt was to do AMD specific edac driver to log correctable L1/L2 error but
based on feedback I worked on v2 generic driver w
The "init" pinctrl is defined we'll set
pinctrl to this state before probe and then "default" after probe.
Add the "init" and "sleep" pinctrl as the OTP gpio state, since we need
switch the pin to gpio state before the TSADC controller is reset.
AFAIK, the TSADC controller is reset, the tshut pola
Add the "init" anf "sleep" pinctrl as the OTP gpio state.
We need the OTP pin is gpio state before resetting the TSADC controller,
since the tshut polarity will generate a high signal.
"init" pinctrl property is defined by Doug's Patch[0].
Patch[0]:
https://patchwork.kernel.org/patch/7454311/
Si
Thank you all for providing inputs and comments on previous versions of
this patchset.
Especially thanks to the (Doug, Rob).
We need the OTP pin is gpio state before resetting the TSADC controller,
since the tshut polarity will generate a high signal.
Says:
The TSHUT temperature is setting mo
On Fri, Oct 23, 2015 at 6:13 AM, Bjorn Helgaas wrote:
> On Thu, Oct 22, 2015 at 05:27:27PM +0800, Ley Foon Tan wrote:
>> Signed-off-by: Ley Foon Tan
>> ---
>> include/linux/pci_ids.h | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
>
>>> +++ b/drivers/edac/cortex_arm64_edac.c
>>> @@ -0,0 +1,457 @@
>>> +/*
>>> + * Cortex ARM64 EDAC
>>> + *
>>> + * Copyright (c) 2015, Advanced Micro Devices
>>> + * Author: Brijesh Singh
>>> + *
Hi Brijesh,
Your ARM64 EDAC driver seems rather similar to the existing driver that
is linked belo
Add AHCI and PHY device nodes to BMIPS based BCM7346 platform.
Signed-off-by: Jaedon Shin
---
arch/mips/boot/dts/brcm/bcm7346.dtsi | 40 +++
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 8 +++
2 files changed, 48 insertions(+)
diff --git a/arch/mips/boot/dts
The BCM7xxx ARM and MIPS platforms share a similar hardware block for AHCI
SATA3 PHY.
Signed-off-by: Jaedon Shin
---
drivers/phy/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 47da573d0bab..c83e48661fd7 100644
--- a
Add data of device node for phy offset.
Signed-off-by: Jaedon Shin
---
drivers/phy/phy-brcmstb-sata.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/phy-brcmstb-sata.c b/drivers/phy/phy-brcmstb-sata.c
index 0be55dafe9ea..41c7535d706b 100644
--- a/d
Add offsets for 40nm BMIPS based set-top box platforms.
Signed-off-by: Jaedon Shin
---
drivers/ata/ahci_brcmstb.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/ata/ahci_brcmstb.c b/drivers/ata/ahci_brcmstb.c
index 8cf6f7d4798f..59eb526cf4f6 100644
--- a/
Add AHCI and PHY device nodes to BMIPS based BCM7362 platform.
Signed-off-by: Jaedon Shin
---
arch/mips/boot/dts/brcm/bcm7362.dtsi | 40
arch/mips/boot/dts/brcm/bcm97362svmb.dts | 8 +++
2 files changed, 48 insertions(+)
diff --git a/arch/mips/boot/dts/
Add AHCI and PHY device nodes to BMIPS based BCM7360 platform.
Signed-off-by: Jaedon Shin
---
arch/mips/boot/dts/brcm/bcm7360.dtsi | 40
arch/mips/boot/dts/brcm/bcm97360svmb.dts | 8 +++
2 files changed, 48 insertions(+)
diff --git a/arch/mips/boot/dts/
The BCM7xxx ARM and MIPS platforms share a similar hardware block for AHCI
SATA3.
Signed-off-by: Jaedon Shin
---
drivers/ata/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 15e40ee62a94..8f535a88a0c7 100644
--- a/drivers
Hi all,
This patch series adds support SATA for BMIPS_GENERIC.
Ralf,
I request you to drop already submitted patches for NAND device nodes.
It is merge conflicts with this patches.
http://patchwork.linux-mips.org/patch/10577/
http://patchwork.linux-mips.org/patch/10578/
http://patchwork.linux-mip
Add data of device node for port offset.
Signed-off-by: Jaedon Shin
---
drivers/ata/ahci_brcmstb.c | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/drivers/ata/ahci_brcmstb.c b/drivers/ata/ahci_brcmstb.c
index 14b7305d2ba0..8cf6f7d4798f 100644
--- a/
Remove unused definitions.
Signed-off-by: Jaedon Shin
---
drivers/phy/phy-brcmstb-sata.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/phy/phy-brcmstb-sata.c b/drivers/phy/phy-brcmstb-sata.c
index 8a2cb16a1937..0be55dafe9ea 100644
--- a/drivers/phy/phy-brcmstb-sata.c
+++ b/drivers
Add offsets for 40nm BMIPS based set-top box platforms.
Signed-off-by: Jaedon Shin
---
drivers/phy/phy-brcmstb-sata.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/phy/phy-brcmstb-sata.c b/drivers/phy/phy-brcmstb-sata.c
index 41c7535d706b..1cc
Hi Brijesh,
On 2015/10/22 22:46, Brijesh Singh wrote:
> Hi Andre,
>
> On 10/21/2015 06:52 PM, Andre Przywara wrote:
>> On 21/10/15 21:41, Brijesh Singh wrote:
>>> Add support for Cortex A57 and A53 EDAC driver.
>> Hi Brijesh,
>>
>> thanks for the quick update! Some comments below.
>>
>>> Signed-of
Document compatibles used on other Exynos-based boards (non-Samsung):
FriendlyARM, Google, Hardkernel and Insignal.
Signed-off-by: Krzysztof Kozlowski
Cc: Kukjin Kim
Cc: Javier Martinez Canillas
Cc: Hakjoo Kim
Reviewed-by: Javier Martinez Canillas
---
Changes since v2:
1. None
Changes sinc
Exynos SoC Device Tree bindings are spread over arm/exynos/ and
arm/samsung/ directories. There is no need for that separation and it
actually confuses. Put power domain bindings under power/ and
remaining samsung-boards.txt under arm/samsung/.
Signed-off-by: Krzysztof Kozlowski
Cc: Kukjin Kim
R
On 2015/10/21 17:35, Borislav Petkov wrote:
> On Wed, Oct 21, 2015 at 09:55:43AM +0800, Hanjun Guo wrote:
>> So I think the meaning of those error register is the same, but the way
>> of handle it may different from SoCs, for single bit error:
>>
>> - SoC may trigger a interrupt;
>> - SoC may jus
SRAM bindings for various SoCs, using the mmio-sram genalloc
API, are spread over different places - per SoC vendor. Since all of
these are quite similar (they depend on mmio-sram) move them to a common
place.
Signed-off-by: Krzysztof Kozlowski
Cc: Heiko Stuebner
Cc: Maxime Ripard
Cc: Chen-Yu T
On Fri, Oct 23, 2015 at 7:46 AM, Vishnu Patekar
wrote:
> Allwinner A83T is octa-core cortex-a7 based SoC.
> It's clock control unit and prcm, pinmux are different from previous sun8i
> series.
> Its processor cores are arragned in two clusters 4 cores each,
> similar to A80.
>
> Signed-off-by: Vis
The physical display tied to the framebuffer may have regulators
providing power to it, such as power for LCDs or interface conversion
chips.
The number of regulators in use may vary, but the regulator supply
binding can not be a list. Instead just support any named regulator
supply properties und
Hi everyone,
This is v3 of the simplefb regulator support series. This series adds
regulator claiming and enabling support for simplefb.
Changes since v3:
- Dropped extra "if" which is always true, leftover from v1.
- Updated commit message of patch 1
Sometimes the simplefb display output pa
This claims and enables regulators listed in the simple framebuffer dt
node. This is needed so that regulators powering the display pipeline
and external hardware, described in the device node and known by the
kernel code, will remain properly enabled.
Signed-off-by: Chen-Yu Tsai
Reviewed-by: Han
On Thu, Oct 22, 2015 at 02:04:41AM +0300, Sergei Shtylyov wrote:
> On R8A7790, GPIO banks 1 and 2 are missing pins 30 and 31. Correct the
> "gpio-ranges" properties of the corresponding device nodes.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> This patch is against the 'renesas-devel-20151019
On Thu, Oct 22, 2015 at 01:06:02PM +0200, Geert Uytterhoeven wrote:
> On Thu, Oct 22, 2015 at 1:05 AM, Sergei Shtylyov
> wrote:
> > On R8A7791, GPIO banks 1 and 7 are missing pins 26 to 31. Correct the
> > "gpio-ranges" properties of the GPIO1 node (GPIO7 is already correct).
> >
> > Signed-off
On Thu, Oct 22, 2015 at 10:37:54AM +0100, Sudeep Holla wrote:
>
>
> On 22/10/15 01:50, Simon Horman wrote:
> >On Wed, Oct 21, 2015 at 11:23:03AM +0100, Sudeep Holla wrote:
> >>
> >>
> >>On 21/10/15 11:18, Geert Uytterhoeven wrote:
> >>>On Wed, Oct 21, 2015 at 12:10 PM, Sudeep Holla
> >>>wrote:
On Thu, Oct 22, 2015 at 03:03:37PM +0200, Tomeu Vizoso wrote:
> On 22 October 2015 at 03:06, Rafael J. Wysocki wrote:
> > Same question as from Greg: How does a subsystem know whether or not to use
> > this function?
> Maybe I don't understand the comment, but as the commit message says,
> subsy
Allwinner A83T is octa-core cortex-a7 based SoC.
It's clock control unit and prcm, pinmux are different from previous sun8i
series.
Its processor cores are arragned in two clusters 4 cores each,
similar to A80.
Signed-off-by: Vishnu Patekar
---
Documentation/devicetree/bindings/arm/sunxi.txt | 1
Allwinner A83T is new octa-core cortex-a7 SOC.
This adds the basic dtsi, the clocks differs from
earlier sun8i SOCs.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 247 ++
1 file changed, 247 insertions(+)
create mode 100644 arch/arm/bo
H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner.
It has UART, ethernet, USB, HDMI, etc ports on it.
A83T patches are tested on this board.
It has UART, ethernet, USB, HDMI, etc ports on it.
For FEL mode it needs USB A-A(Male) cable. I used uart0 which
is multiplexed to microsd pins PF2 a
This patch series adds very basic support for Allwinner A83T SOC.
Clock, peripherals, smp support will be added later.
Allwinner A83T is octa-core cortex-a7 based SoC.
It's clock control unit and prcm, pinmux are different from previous sun8i
series.
Its processor cores are arragned in two cluster
On Thu, Oct 22, 2015 at 1:52 PM, Ray Jui wrote:
>
>
> On 10/22/2015 11:43 AM, Rob Herring wrote:
>>
>> On Mon, Oct 19, 2015 at 12:43 AM, Pramod Kumar
>> wrote:
>>>
>>> Add ngpios property to the gpio controller's DT node so that controller
>>> driver extracts total number of gpio lines present in
On Thu, Oct 15, 2015 at 12:32:20AM +0800, Chen-Yu Tsai wrote:
> The AXP223 is a new PMIC commonly paired with Allwinner A23/A33 SoCs.
> It is functionally identical to AXP221; only the regulator default
> voltage/status and the external host interface are different.
Reviwed-by: Mark Brown
signa
On Wed, Oct 21, 2015 at 01:58:59PM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
>
> This is v2 of the simplefb regulator support series. This series adds
> regulator claiming and enabling support for simplefb.
This approach seems reasonable
Acked-by: Mark Brown
signature.asc
Description: PGP sig
On Thu, Oct 22, 2015 at 04:02:13PM +0100, Russell King - ARM Linux wrote:
> If it was such a problem, then in the _eight_ days that this has been
> discussed so far, _someone_ would have sent some data showing the
> problem. I think the fact is, there is no data.
> Someone prove me wrong. Someo
On Tue, Oct 20, 2015 at 04:46:56PM +0100, Russell King - ARM Linux wrote:
> Something like this. I haven't put a lot of effort into it to change all
> the places which return an -EPROBE_DEFER, and it also looks like we need
> some helpers to report when we have only an device_node (or should that
On Fri, Sep 11, 2015 at 05:31:57PM +0530, Viresh Kumar wrote:
> +- supply-names: This is a required property, only if multiple supplies are
> + available for the device. Otherwise it is optional.
> +
> + This list is used to pass names of all the device supplies. The order of
> names
> + prese
On Thu, Oct 01, 2015 at 03:37:53PM -0500, Andrew F. Davis wrote:
> +static const struct of_device_id tps65912_regulator_of_match_table[] = {
> + { .compatible = "ti,tps65912-regulator", },
> + { /* sentinel */ },
> +};
> +MODULE_DEVICE_TABLE(of, tps65912_regulator_of_match_table);
Does th
On Sat, Oct 17, 2015 at 09:40:55AM +0530, Viresh Kumar wrote:
> Okay here is the problem statement:
> We have two supplies for a device and the device node will have
> something like:
> name1-supply = <&supply1>;
> name2-supply = <&supply2>;
> And the OPP node needs to have voltages for both of
On Thu, Oct 15, 2015 at 02:47:07PM +0100, Charles Keepax wrote:
> +This document lists regulator specific bindings, see the primary binding
> +document:
> + ../mfd/arizona.txt
> +
> +Required properties:
> +
> + - AVDD-supply, DBVDD1-supply, CPVDD-supply : Power supplies for the device,
> +a
On Mon, Oct 19, 2015 at 03:13:47PM +0100, Richard Fitzgerald wrote:
> @@ -134,6 +134,7 @@ config SND_SOC_ALL_CODECS
> select SND_SOC_WM5100 if I2C
> select SND_SOC_WM5102 if MFD_WM5102
> select SND_SOC_WM5110 if MFD_WM5110
> + select SND_SOC_CS47L24 if MFD_CS47L24
> sel
On Thu, Oct 22, 2015 at 06:51:49AM +0200, Heiko Schocher wrote:
> Am 21.10.2015 um 18:17 schrieb Mark Brown:
> >>arch/arm/boot/dts/tps65217.dtsi
> >>but, okay, removed.
> >That too is broken and should be removed :(
> Ok, I have a board which uses this regulator ... can you give me a hint,
> ho
Hello.
On 10/21/2015 05:57 AM, Chanwoo Choi wrote:
I think this patch is too much delay. I recommend you better to develop
this driver based on latest extcon-next branch[1].
[1]
https://git.kernel.org/cgit/linux/kernel/git/chanwoo/extcon.git/log/?h=extcon-next
I would really appreciate if
Hi Murali,
>>
>>
>> Again, there's other SoCs out there which have serdes. Adding 2.5k of
>> lines for vendor serdes implementations does not scale - this needs to
>> be re-thought in a way which reduces the code maintanence burden.
>>
>> Other SoCs like Marvell Armada have serdes links which can
+ Alexandre Torgue (Owner of phy-miphy28lp.c)
+ Loc Ho (Owner of phy-miphy28lp.c)
On 10/22/2015 05:56 PM, Murali Karicheri wrote:
On 10/22/2015 01:48 PM, Russell King - ARM Linux wrote:
On Thu, Oct 22, 2015 at 11:05:26AM -0400, Murali Karicheri wrote:
On 10/21/2015 08:56 AM, WingMan Kwok wro
On Thu, Oct 22, 2015 at 05:27:27PM +0800, Ley Foon Tan wrote:
> Signed-off-by: Ley Foon Tan
> ---
> include/linux/pci_ids.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index d9ba49c..08e4462 100644
> --- a/include/linux/pci_ids.h
On 10/22/2015 01:48 PM, Russell King - ARM Linux wrote:
On Thu, Oct 22, 2015 at 11:05:26AM -0400, Murali Karicheri wrote:
On 10/21/2015 08:56 AM, WingMan Kwok wrote:
On TI's Keystone platforms, several peripherals such as the
gbe ethernet switch, 10gbe ethernet switch and PCIe controller
requir
On Thu, 2015-10-22 at 15:04 +0200, Tomeu Vizoso wrote:
> On 22 October 2015 at 00:51, Scott Wood wrote:
> > On Wed, 2015-10-21 at 08:44 -0500, Rob Herring wrote:
> > > On Wed, Oct 21, 2015 at 12:54 AM, Scott Wood
> > > wrote:
> > > > On Mon, 2015-09-21 at 16:03 +0200, Tomeu Vizoso wrote:
> > > >
* Andrew F. Davis [151022 09:21]:
> Using constants for pinctrl allows better readability and removes
> redundancy with comments.
You should use the include/dt-bindings/pinctrl/omap.h macro
AM33XX_IOPAD(pa, val) while at it. Otherwise we'll end up patching
the same things again later on.
Regards
Add a regulator to control the OTG chargepath switch. The OTG
switch gets its power from pm8941_5vs1, and that should be expressed
as an usb_otg_in-supply property in the DT node for the charger driver.
The regulator name is "otg". This is used by USB code to control VBUS
direction.
Signed-off-b
On Thu, Jul 30, 2015 at 05:12:22PM +0900, Masahiro Yamada wrote:
> Device Tree bindings for two I2C controllers embedded in
> UniPhier SoCs.
>
> Signed-off-by: Masahiro Yamada
Please split this into two files with filenames matching those of the
drivers. I know they will be very similar but I'd
Hi Greg,
> On Oct 22, 2015, at 23:19 , Greg Kroah-Hartman
> wrote:
>
> On Thu, Oct 22, 2015 at 10:50:23PM +0300, Pantelis Antoniou wrote:
>> A throw once master enable switch to protect against any
>> further overlay applications if the administrator desires so.
>>
>> A kernel command line opt
On Thu, Oct 22, 2015 at 10:50:27PM +0300, Pantelis Antoniou wrote:
> Documentation for the per-overlay attributes.
>
> Signed-off-by: Pantelis Antoniou
Acked-by: Greg Kroah-Hartman
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On Thu, Oct 22, 2015 at 10:50:26PM +0300, Pantelis Antoniou wrote:
> * A per overlay can_remove sysfs attribute that reports whether
> the overlay can be removed or not due to another overlapping overlay.
>
> * A target sysfs attribute listing the target of each fragment,
> in a group named after
On Thu, Oct 22, 2015 at 10:50:25PM +0300, Pantelis Antoniou wrote:
> Document the of_overlay_disable parameter.
>
> Signed-off-by: Pantelis Antoniou
Acked-by: Greg Kroah-Hartman
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On Thu, Oct 22, 2015 at 10:50:24PM +0300, Pantelis Antoniou wrote:
> Documentation ABI entry for overlays sysfs entries.
>
> Signed-off-by: Pantelis Antoniou
Acked-by: Greg Kroah-Hartman
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On Thu, Oct 22, 2015 at 10:50:23PM +0300, Pantelis Antoniou wrote:
> A throw once master enable switch to protect against any
> further overlay applications if the administrator desires so.
>
> A kernel command line option is provided as well.
>
> Signed-off-by: Pantelis Antoniou
> ---
> driver
On Thu, Oct 22, 2015 at 10:50:22PM +0300, Pantelis Antoniou wrote:
> We are going to need the overlays to appear on sysfs with runtime
> global properties (like master enable) so turn them into kobjects.
>
> They have to be in sysfs so that people can have information about the
> overlays applied
Hello.
On 10/22/2015 04:31 PM, Geert Uytterhoeven wrote:
Due to a probe deferral of an interrupt controller[1], the Micrel
Ethernet PHY on
r8a7791/koelsch started failing to get its IRQ:
no irq domain found for /interrupt-controller@e61c !
However, of_mdiobus_register_phy() uses irq_
We are going to need the overlays to appear on sysfs with runtime
global properties (like master enable) so turn them into kobjects.
They have to be in sysfs so that people can have information about the
overlays applied in the system, i.e. where their targets are and whether
removal is possible.
A throw once master enable switch to protect against any
further overlay applications if the administrator desires so.
A kernel command line option is provided as well.
Signed-off-by: Pantelis Antoniou
---
drivers/of/overlay.c | 50 +-
1 file chan
Document the of_overlay_disable parameter.
Signed-off-by: Pantelis Antoniou
---
Documentation/kernel-parameters.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/kernel-parameters.txt
b/Documentation/kernel-parameters.txt
index 22a4b68..8ca89d9 100644
--- a/Documentation/
The first patch puts the overlays as objects in the sysfs in
/sys/firmware/devicetree/overlays.
The #2 adds a master overlay enable switch (that once is set to
disabled can't be re-enabled), while the one after that
introduces a number of default per overlay attributes.
The patch following is the
Documentation for the per-overlay attributes.
Signed-off-by: Pantelis Antoniou
---
.../ABI/testing/sysfs-firmware-devicetree-overlays | 28 ++
1 file changed, 28 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-firmware-devicetree-overlays
b/Documentation/ABI/test
* A per overlay can_remove sysfs attribute that reports whether
the overlay can be removed or not due to another overlapping overlay.
* A target sysfs attribute listing the target of each fragment,
in a group named after the name of the fragment.
Signed-off-by: Pantelis Antoniou
---
drivers/of/
Documentation ABI entry for overlays sysfs entries.
Signed-off-by: Pantelis Antoniou
---
.../ABI/testing/sysfs-firmware-devicetree-overlays | 24 ++
1 file changed, 24 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-firmware-devicetree-overlays
diff --git a
On Thu, Oct 22, 2015 at 11:53:31AM -0700, Frank Rowand wrote:
> On 10/22/2015 7:44 AM, Greg Kroah-Hartman wrote:
> >
> >
> > On Thu, Oct 22, 2015 at 11:05:11AM +0200, Tomeu Vizoso wrote:
> >> But that's moot currently because Greg believes that the time spent
> >> probing devices at boot time cou
Hi Samuel,
> Le 22 oct. 2015 à 17:44, Samuel Ortiz a écrit :
>
...
+enum nfcmrvl_phy {
+NFCMRVL_PHY_USB= 0,
+NFCMRVL_PHY_UART= 1,
+NFCMRVL_PHY_I2C= 2,
+NFCMRVL_PHY_SPI= 3,
+};
>>> Why is that part of the fw_dld header ?
>
On 19/10/15 19:07, Mark Brown wrote:
> On Mon, Oct 12, 2015 at 01:40:33PM +0100, Damien Horsley wrote:
>
>> +spin_lock_irqsave(&prl->lock, flags);
>> +reg = img_prl_out_readl(prl, IMG_PRL_OUT_CTL);
>> +ucontrol->value.integer.value[0] = !!(reg & IMG_PRL_OUT_CTL_EDGE_MASK);
>> +spin
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