On 06/11/15 11:49, Markus Pargmann wrote:
Hi,
On Thursday, November 05, 2015 07:13:41 PM Jonathan Cameron wrote:
On 04/11/15 18:53, Vesa Jääskeläinen wrote:
To continue from this "label" property idea I was wondering if we
would add it as new optional(?) file node for IIO devices.>
One could
On Fri, Nov 06, 2015 at 06:22:42PM -0800, Simran Rai wrote:
> Simran Rai (3):
> dt-bindings: sound: Add DT bindings for Broadcom Cygnus audio
> sound: soc: Add Cygnus audio DAI driver
> sound: soc: Add Cygnus audio DMA driver
To repeat what I said last time:
Please use subject lines
On Mon, Nov 02, 2015 at 04:36:15PM +, Phil Edworthy wrote:
> From: Harunobu Kurokawa
>
> R-Car H3 device is r8a7795
>
> Signed-off-by: Harunobu Kurokawa
Acked-by: Wolfram Sang
Tested-by:
Hi Eduardo,
在 2015年11月07日 02:47, Eduardo Valentin 写道:
Caesar,
On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
This series patchs are working for RK3368 on Rockchip platform.
Good to see the perseverance! :-)
I will send th patch [4-6] next version and another pacth(fix the
On Friday 06 November 2015 19:28:22 Guenter Roeck wrote:
> If OF_ADDRESS is not configured, builds can fail with errors such as
>
> drivers/net/ethernet/hisilicon/hns_mdio.c:
> In function 'hns_mdio_bus_name':
> drivers/net/ethernet/hisilicon/hns_mdio.c:411:3:
> error: implicit
Heiko,
在 2015年11月07日 03:03, Heiko Stuebner 写道:[]
[]
I call dibs on the devicetree patches :-) .
Code and dt parts are very much separate, so I'd like to take the dt parts
though my tree and arm-soc to keep further dts changes together.
Of course only once you are ok with the code parts
On Fri, Nov 6, 2015 at 3:11 PM, Kapil Hali wrote:
> Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's
> Northstar Plus CPU to the 32-bit ARM CPU device tree binding
> documentation file and create a new binding documentation for
> Northstar Plus CPU.
>
>
Le 06/11/2015 13:11, Kapil Hali a écrit :
> Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's
> Northstar Plus CPU to the 32-bit ARM CPU device tree binding
> documentation file and create a new binding documentation for
> Northstar Plus CPU.
>
> Signed-off-by: Kapil Hali
This patch implements support for APM X-Gene SoC CRC32C h/w accelerator.
DMA engine in APM X-Gene SoC is capable of doing CRC32C computations.
Signed-off-by: Rameshwar Prasad Sahu
---
drivers/crypto/Kconfig|8 ++
drivers/crypto/Makefile |1 +
This patch adds support for new feature CRC32C computations in
dmaengine framework.
Signed-of-by: Rameshwar Prasad Sahu
---
Documentation/dmaengine/provider.txt |3 +++
drivers/dma/dmaengine.c |2 ++
include/linux/dmaengine.h| 13 +
3
This patch implements support for APM X-Gene SoC CRC32C h/w accelerator driver
and adds CRC32C computations support in dmaengine framework. APM X-Gene SoC has
DMA engine capable of performing CRC32C computations.
v2 changes:
1. Added helper function in dmaengine framework
2.
This patch implements CRC32C support to APM X-Gene SoC DMA engine driver.
Basically we have DMA engine in SoC capable of doing CRC32C computations.
Signed-off-by: Rameshwar Prasad Sahu
---
drivers/dma/xgene-dma.c | 314 ---
1 files
Am Freitag, 6. November 2015, 11:46:37 schrieb Sjoerd Simons:
> Add an ethernet0 alias for the RK3288 mac interface so
> that u-boot can find the device-node and fill in the mac address on
> board that support a wired network interface.
>
> Signed-off-by: Sjoerd Simons
Hi Caesar,
Am Samstag, 7. November 2015, 23:53:30 schrieb Caesar Wang:
> 在 2015年11月07日 03:03, Heiko Stuebner 写道:[]
>
> []
>
> > I call dibs on the devicetree patches :-) .
> >
> > Code and dt parts are very much separate, so I'd like to take the dt parts
> > though my tree and arm-soc to
Hi Zain,
looks like my comment on v1 came later than your v2 submission,
so here it is again :-)
Am Freitag, 6. November 2015, 09:17:21 schrieb Zain Wang:
> The names registered are:
> ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
> You can alloc tags above in your case.
>
Sinan Kaya wrote:
+ val = val & ~(MAX_BUS_REQ_LEN_MASK << MAX_BUS_WR_REQ_BIT_POS);
+ val = val | (mgmtdev->max_write_request << MAX_BUS_WR_REQ_BIT_POS);
+ val = val & ~(MAX_BUS_REQ_LEN_MASK);
+ val = val | (mgmtdev->max_read_request);
val &= ~MAX_BUS_REQ_LEN_MASK <<
This patch adds support for hidma engine. The driver
consists of two logical blocks. The DMA engine interface
and the low-level interface. The hardware only supports
memcpy/memset and this driver only support memcpy
interface. HW and driver doesn't support slave interface.
Signed-off-by: Sinan
The Qualcomm Technologies HIDMA device has been designed
to support virtualization technology. The driver has been
divided into two to follow the hardware design.
1. HIDMA Management driver
2. HIDMA Channel driver
Each HIDMA HW consists of multiple channels. These channels
share some set of
Remove unneeded variable used to store return value.
Generated by: scripts/coccinelle/misc/returnvar.cocci
CC: Sinan Kaya
Signed-off-by: Fengguang Wu
---
hidma_ll.c |6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
---
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