ies (optional or required) are associated with
the method. The existing enable method documentation is expanded and moved
from ".../arm/cpus.txt" into new files accordingly.
Signed-off-by: Alex Elder
---
v4 - Rebased on top of v3.16-rc1.
- Added description files for recently-added
.
The use of an enable method also allows the SMP operation vector to
be assigned as a result of device tree content for these SoCs.
Signed-off-by: Alex Elder
---
Notes:
- This patch was previously posted as part of this series:
https://lkml.org/lkml/2014/6/16/580
- The binding
ies (optional or required) are associated with
the method. The existing enable method documentation is expanded and moved
from ".../arm/cpus.txt" into new files accordingly.
Signed-off-by: Alex Elder
---
v4 - Rebased on top of v3.16-rc1.
- Added description files for recently-added
ona_smp.c".
- Rebased onto v3.15-rc5
v3: - Dropped definition and use of CPU_METHOD_OF_DECLARE_SETUP()
- Added documentation for "enable-method"
- Rebased onto v3.15-rc4
v2: - Fixed a Makefile error (:= should have been +=)
- No longer set CONFIG_NR_CPUS in bcm_defconfi
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm11351.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
.
The use of an enable method also allows the SMP operation vector to
be assigned as a result of device tree content for these SoCs.
Signed-off-by: Alex Elder
---
Documentation/devicetree/bindings/arm/cpus.txt | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation
he address specified.
The location of the special register is defined in the device tree
using a "secondary-boot-reg" property in a node whose "enable-method"
matches.
Derived from code originally provided by Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/mach-bcm/Kconfig
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
currently need.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/configs/bcm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm21664.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi
index 8b36682..2016b72
ies (optional or required) are associated with
the method. The existing enable method documentation is expanded and moved
from ".../arm/cpus.txt" into new files accordingly.
Signed-off-by: Alex Elder
---
v3: - Got rid of contrived examples.
- Identified some compatible CPUs more generic
On 06/03/2014 09:42 AM, Mark Rutland wrote:
> On Tue, Jun 03, 2014 at 02:48:18PM +0100, Alex Elder wrote:
>> On 06/03/2014 05:08 AM, Mark Rutland wrote:
>>> Hi Alex,
>>>
>>> On Fri, May 30, 2014 at 11:11:54PM +0100, Alex Elder wrote:
>>>> The binding
On 06/03/2014 05:08 AM, Mark Rutland wrote:
> Hi Alex,
>
> On Fri, May 30, 2014 at 11:11:54PM +0100, Alex Elder wrote:
>> The bindings for CPU enable methods are defined in ".../arm/cpus.txt". As
>> additional 32-bit ARM CPUS are converted to use the "enabl
.
The use of an enable method also allows the SMP operation vector to
be assigned as a result of device tree content for these SoCs.
Signed-off-by: Alex Elder
---
Documentation/devicetree/bindings/arm/cpus.txt | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation
t;
- Rebased onto v3.15-rc4
v2: - Fixed a Makefile error (:= should have been +=)
- No longer set CONFIG_NR_CPUS in bcm_defconfig
- Rebased onto v3.15-rc1
Alex Elder (5):
devicetree: bindings: document Broadcom CPU enable method
ARM: add SMP support for Broadcom mobile SoCs
ARM: co
he address specified.
The location of the special register is defined in the device tree
using a "secondary-boot-reg" property in a node whose "enable-method"
matches.
Derived from code originally provided by Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/mach-bcm/Kconfig
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
currently need.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/configs/bcm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm21664.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi
index 08a44d4..a37ded1
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm11351.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
ies (optional or required) are associated with
the method. The existing enable method documentation is expanded and moved
from ".../arm/cpus.txt" into new files accordingly.
Signed-off-by: Alex Elder
---
v2: Rename "arm,psci.txt" to be "psci.txt" and fix its content
On 05/29/2014 10:20 PM, Alex Elder wrote:
> On 05/23/2014 07:53 PM, Mike Turquette wrote:
>> Quoting Alex Elder (2014-05-20 05:52:39)
>>> @@ -743,11 +746,16 @@ struct clk *kona_clk_setup(struct kona_clk *bcm_clk)
>>> clk = clk_register(NULL, &bcm_clk-&
On 05/23/2014 07:53 PM, Mike Turquette wrote:
> Quoting Alex Elder (2014-05-20 05:52:39)
>> @@ -743,11 +746,16 @@ struct clk *kona_clk_setup(struct kona_clk *bcm_clk)
>> clk = clk_register(NULL, &bcm_clk->hw);
>> if (IS_ERR(clk)) {
>>
On 05/29/2014 11:35 AM, Mike Turquette wrote:
> Quoting Alex Elder (2014-05-29 06:26:15)
>> On 05/23/2014 07:53 PM, Mike Turquette wrote:
>>> The above seems like a lot effort to go to. Why not skip all of this and
>>> just implement the prerequisite logic in the .enab
On 05/23/2014 07:53 PM, Mike Turquette wrote:
> Quoting Alex Elder (2014-05-20 05:52:39)
>> @@ -743,11 +746,16 @@ struct clk *kona_clk_setup(struct kona_clk *bcm_clk)
>> clk = clk_register(NULL, &bcm_clk->hw);
>> if (IS_ERR(clk)) {
>>
On 05/23/2014 07:33 PM, Mike Turquette wrote:
> Quoting Alex Elder (2014-05-20 05:52:38)
>> Add a flag that tracks whether a clock has already been initialized.
>> This will be used by the next patch to avoid initializing a clock
>> more than once when it's listed as a
On 05/28/2014 08:34 AM, Lorenzo Pieralisi wrote:
> On Wed, May 28, 2014 at 01:22:06PM +0100, Alex Elder wrote:
>> On 05/28/2014 05:36 AM, Lorenzo Pieralisi wrote:
>>> On Wed, May 28, 2014 at 04:30:47AM +0100, Alex Elder wrote:
>>>> On 05/27/2014 06:49 AM, Lorenzo Pier
On 05/28/2014 05:36 AM, Lorenzo Pieralisi wrote:
> On Wed, May 28, 2014 at 04:30:47AM +0100, Alex Elder wrote:
>> On 05/27/2014 06:49 AM, Lorenzo Pieralisi wrote:
>>> On Tue, May 20, 2014 at 06:43:46PM +0100, Alex Elder wrote:
>>>> Broadcom mobile SoCs use a R
On 05/27/2014 06:49 AM, Lorenzo Pieralisi wrote:
> On Tue, May 20, 2014 at 06:43:46PM +0100, Alex Elder wrote:
>> Broadcom mobile SoCs use a ROM-implemented holding pen for
>> controlled boot of secondary cores. A special register is
>> used to communicate to the ROM that a
On 05/27/2014 06:49 AM, Lorenzo Pieralisi wrote:
> On Tue, May 20, 2014 at 06:43:46PM +0100, Alex Elder wrote:
>> Broadcom mobile SoCs use a ROM-implemented holding pen for
>> controlled boot of secondary cores. A special register is
>> used to communicate to the ROM that a
ies (optional or required) are associated with
the method. The existing enable method documentation is expanded and moved
from ".../arm/cpus.txt" into new files accordingly.
Signed-off-by: Alex Elder
---
v2: Rename "arm,psci.txt" to be "psci.txt" and fix its content
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm11351.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
.
The use of an enable method also allows the SMP operation vector to
be assigned as a result of device tree content for these SoCs.
Signed-off-by: Alex Elder
---
Documentation/devicetree/bindings/arm/cpus.txt | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm11351.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm21664.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi
index 08a44d4..a37ded1
ed documentation for "enable-method"
- Rebased onto v3.15-rc4
v2: - Fixed a Makefile error (:= should have been +=)
- No longer set CONFIG_NR_CPUS in bcm_defconfig
- Rebased onto v3.15-rc1
This series is available here:
http://git.linaro.org/landing-teams/working/broadcom/kernel.gi
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
currently need.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/configs/bcm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index
he address specified.
The location of the special register is defined in the device tree
using a "secondary-boot-reg" property in a node whose "enable-method"
matches.
Derived from code originally provided by Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/mach-bcm/Kconfig
.
The use of an enable method also allows the SMP operation vector to
be assigned as a result of device tree content for these SoCs.
Signed-off-by: Alex Elder
---
Documentation/devicetree/bindings/arm/cpus.txt | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
currently need.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/configs/bcm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index
he address specified.
The location of the special register is defined in the device tree
using a "secondary-boot-reg" property in a node whose "enable-method"
matches.
Derived from code originally provided by Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/mach-bcm/Kconfig
ed a Makefile error (:= should have been +=)
- No longer set CONFIG_NR_CPUS in bcm_defconfig
- Rebased onto v3.15-rc1
This series is available here:
http://git.linaro.org/landing-teams/working/broadcom/kernel.git
Branch review/bcm-smp-v4
Alex Elder (5):
devicetree: bindings: d
Add the bus clock named "bsc3_apb" to the list of those provided by
the slave CCU.
Signed-off-by: Alex Elder
---
[Re-sent this one manually because it failed while sending. -Alex]
arch/arm/boot/dts/bcm11351.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Add bus clock support. A bus clock has a subset of the components
present in a peripheral clock (again, all optional): a gate; CCU
policy management bits; and if needed, bits to control hysteresis.
Signed-off-by: Alex Elder
---
drivers/clk/bcm/clk-kona-setup.c | 96
ct operation of "bsc3". Others can be added later as needed
(and this patch serves to show how that's done).
Signed-off-by: Alex Elder
---
drivers/clk/bcm/clk-bcm281xx.c | 13 -
include/dt-bindings/clock/bcm281xx.h | 3 ++-
2 files changed, 14 insertions(+), 2
Add a flag that tracks whether a clock has already been initialized.
This will be used by the next patch to avoid initializing a clock
more than once when it's listed as a prerequisite.
Signed-off-by: Alex Elder
---
drivers/clk/bcm/clk-kona.c | 17 +++--
drivers/clk/bcm/clk-k
lock to be specified.
There exist clocks that could specify more than one prequisite, but
almost all clocks only ever use one. We can add support for more
than one if we find we need it at some point.
Signed-off-by: Alex Elder
---
drivers/clk/bcm/clk-kona-setup.c | 16 ++
drivers/clk/bcm/
:
http://git.linaro.org/landing-teams/working/broadcom/kernel.git
Branch review/bcm-bus-clk
-Alex
Version history:
v2: Added field "p" to the previously unnamed prereq union.
Alex Elder (5):
clk: bcm281xx: add an initialized flag
clk:
On 05/15/2014 01:03 PM, Florian Fainelli wrote:
> Hi Alex,
>
> 2014-05-15 10:58 GMT-07:00 Alex Elder :
>> This patch adds SMP support for BCM281XX and BCM21664 family SoCs.
>>
>> This feature is controlled with a distinct config option such that a
>> SMP-enabled
he address specified.
The location of the special register is defined in the device tree
using a "secondary-boot-reg" property in a node whose "enable-method"
matches.
Derived from code originally provided by Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/mach-bcm/Kconfig | 18 ++
.
The use of an enable method also allows the SMP operation vector to
be assigned as a result of device tree content for these SoCs.
Signed-off-by: Alex Elder
---
Documentation/devicetree/bindings/arm/cpus.txt | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
currently need.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/configs/bcm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm21664.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi
index 08a44d4..a37ded1
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm11351.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
g
- Rebased onto v3.15-rc1
This series is available here:
http://git.linaro.org/landing-teams/working/broadcom/kernel.git
Branch review/bcm-smp-v3
Alex Elder (5):
devicetree: bindings: document Broadcom CPU enable method
ARM: add SMP support for Broadcom mobile SoCs
ARM: co
On 05/08/2014 01:48 PM, Alex Elder wrote:
> The bindings for CPU enable methods are defined in ".../arm/cpus.txt". As
> additional 32-bit ARM CPUS are converted to use the "enable-method" CPU
> property to imply a particular set of SMP operations to use, the list of
ies (optional or required) are associated with
the method. The existing enable method documentation is expanded and moved
from ".../arm/cpus.txt" into new files accordingly.
Signed-off-by: Alex Elder
---
v2: Rename "arm,psci.txt" to be "psci.txt" and fix its content
On 05/08/2014 10:13 AM, Rob Herring wrote:
> On Wed, May 7, 2014 at 6:23 PM, Alex Elder wrote:
>> The bindings for CPU enable methods are defined in ".../arm/cpus.txt". As
>> additional 32-bit ARM CPUS are converted to use the "enable-method" CPU
>>
ies (optional or required) are associated with
the method. The existing enable method documentation is expanded and moved
from ".../arm/cpus.txt" into new files accordingly.
Signed-off-by: Alex Elder
---
This series is available here:
http://git.linaro.org/landing-teams/working
he address specified.
The location of the special register is defined in the device tree
using a "secondary-boot-reg" property in a node whose "enable-method"
matches.
Derived from code originally provided by Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/mach-bcm/Kconfig | 18 ++
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
currently need.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/configs/bcm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm11351.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
.
The use of an enable method also allows the SMP operation vector to
be assigned as a result of device tree content for these SoCs.
Signed-off-by: Alex Elder
---
Documentation/devicetree/bindings/arm/cpus.txt | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation
g
- Rebased onto v3.15-rc1
This series is available here:
http://git.linaro.org/landing-teams/working/broadcom/kernel.git
Branch review/bcm-smp-v3
Alex Elder (5):
devicetree: bindings: document Broadcom CPU enable method
ARM: add SMP support for Broadcom mobile SoCs
ARM: co
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm21664.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi
index 08a44d4..a37ded1
On 05/05/2014 08:43 PM, Stephen Boyd wrote:
> On 05/05/14 15:02, Alex Elder wrote:
>> On 04/04/2014 12:55 PM, Stephen Boyd wrote:
>>> On 04/03/14 19:18, Alex Elder wrote:
>>>> +
>>>> +/*
>>>> + * Secondary startup method setup routine to extrac
On 04/04/2014 12:55 PM, Stephen Boyd wrote:
> On 04/03/14 19:18, Alex Elder wrote:
>> +
>> +/*
>> + * Secondary startup method setup routine to extract the location of
>> + * the secondary boot register from a "cpu" or "cpus" device tree
>> +
lock to be specified.
There exist clocks that could specify more than one prequisite, but
almost all clocks only ever use one. We can add support for more
than one if we find we need it at some point.
Signed-off-by: Alex Elder
---
drivers/clk/bcm/clk-kona-setup.c | 16 ++
drivers/clk/bcm/
ct operation of "bsc3". Others can be added later as needed
(and this patch serves to show how that's done).
Signed-off-by: Alex Elder
---
drivers/clk/bcm/clk-bcm281xx.c | 13 -
include/dt-bindings/clock/bcm281xx.h | 3 ++-
2 files changed, 14 insertions(+), 2
Add a flag that tracks whether a clock has already been initialized.
This will be used by the next patch to avoid initializing a clock
more than once when it's listed as a prerequisite.
Signed-off-by: Alex Elder
---
drivers/clk/bcm/clk-kona.c | 17 +++--
drivers/clk/bcm/clk-k
Add the bus clock named "bsc3_apb" to the list of those provided by
the slave CCU.
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm11351.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
ind
http://git.linaro.org/landing-teams/working/broadcom/kernel.git
Branch review/bcm-bus-clk
-Alex
Alex Elder (5):
clk: bcm281xx: add an initialized flag
clk: bcm281xx: implement prerequisite clocks
clk: bcm281xx: add bus clock support
clk: bcm281xx:
Add bus clock support. A bus clock has a subset of the components
present in a peripheral clock (again, all optional): a gate; CCU
policy management bits; and if needed, bits to control hysteresis.
Signed-off-by: Alex Elder
---
drivers/clk/bcm/clk-kona-setup.c | 96
On 04/25/2014 07:09 PM, Mike Turquette wrote:
> Quoting Alex Elder (2014-04-21 14:26:22)
>> This is series has two parts. The first two patches are changes
>> to the existing Broadcom Kona family clock code to prepare for the
>> addition of support for another SoC, bcm21664
Document the device tree binding for Broadcom BCM28164 clock control
units and clocks. This SoC uses Kona CCUs, similar to the BCM281XX
SoC family.
Signed-off-by: Alex Elder
---
.../devicetree/bindings/clock/bcm-kona-clock.txt | 39 ++
1 file changed, 39 insertions
281XX family
- Add a list of the specific BCM281XX family compatible strings.
- Reword the description of the table slightly.
Signed-off-by: Alex Elder
---
.../devicetree/bindings/clock/bcm-kona-clock.txt | 87 --
1 file changed, 47 insertions(+), 40 deletions(-)
re clock definitions will need to be added as required by
the addition of additional drivers.
Signed-off-by: Alex Elder
---
drivers/clk/bcm/Kconfig | 2 +-
drivers/clk/bcm/Makefile | 1 +
drivers/clk/bcm/clk-bcm21664.c | 290 +++
Replace the "fake" fixed-rate clocks used previously for the
bcm21664 family with "real" ones.
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm21664.dtsi | 190 +---
1 file changed, 118 insertions(+), 72 deletions(-)
diff --git
ned-off-by: Alex Elder
---
drivers/clk/bcm/clk-bcm281xx.c | 12
include/dt-bindings/clock/bcm281xx.h | 12
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm281xx.c b/drivers/clk/bcm/clk-bcm281xx.c
index 71a65a4..502a487 10
e current linus/master branch
plus the patches mentioned above--are available here:
http://git.linaro.org/git/landing-teams/working/broadcom/kernel.git
Branch review/bcm21664-clock-v2
Alex Elder (5):
clk: bcm281xx: move compatible string definitions
ARM: dts: revise kona clock binding docu
rror code to allow DT parsing errors to be
reported by the setup function.
(Note that only the first "cpu" (or "cpus") node having a matching
method is used by set_smp_ops_by_method(); this logic is not
changed.)
Signed-off-by: Alex Elder
---
arch/arm/include/asm/smp.h | 10
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm21664.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi
index 08a44d4..a37ded1
he address specified.
The location of the special register is defined in the device tree
using a "secondary-boot-reg" property in a node whose "enable-method"
matches.
Derived from code originally provided by Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/mach-bcm/Kconfig
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm11351.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
currently need.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/configs/bcm_defconfig |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index
series is available here:
http://git.linaro.org/landing-teams/working/broadcom/kernel.git
Branch review/bcm-smp-v2
Alex Elder (5):
ARM: introduce CPU_METHOD_OF_DECLARE_SETUP()
ARM: add SMP support for Broadcom mobile SoCs
ARM: configs: enable SMP in bcm_defconfig
ARM: dts: enable S
On 04/04/2014 01:56 PM, Alex Elder wrote:
> On 04/04/2014 10:30 AM, Tim Kryger wrote:
>> On Thu, Apr 3, 2014 at 7:18 PM, Alex Elder wrote:
>>
>>> diff --git a/arch/arm/mach-bcm/platsmp.c b/arch/arm/mach-bcm/platsmp.c
>>> new file mode 100644
>>> index 00
ned-off-by: Alex Elder
---
drivers/clk/bcm/clk-bcm281xx.c | 12
include/dt-bindings/clock/bcm281xx.h | 12
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm281xx.c b/drivers/clk/bcm/clk-bcm281xx.c
index 71a65a4..502a487 10
281XX family
- Add a list of the specific BCM281XX family compatible strings.
- Reword the description of the table slightly.
Signed-off-by: Alex Elder
---
.../devicetree/bindings/clock/bcm-kona-clock.txt | 87 +++-
1 file changed, 47 insertions(+), 40 deletions(-)
e current linus/master branch
plus the patches mentioned above--are available here:
http://git.linaro.org/git/landing-teams/working/broadcom/kernel.git
Branch review/bcm21664-clock-v2
-Alex
Alex Elder (5):
clk: bcm281xx: move compatible string definit
Document the device tree binding for Broadcom BCM28164 clock control
units and clocks. This SoC uses Kona CCUs, similar to the BCM281XX
SoC family.
Signed-off-by: Alex Elder
---
.../devicetree/bindings/clock/bcm-kona-clock.txt | 39
1 file changed, 39 insertions
re clock definitions will need to be added as required by
the addition of additional drivers.
Signed-off-by: Alex Elder
---
drivers/clk/bcm/Kconfig |2 +-
drivers/clk/bcm/Makefile |1 +
drivers/clk/bcm/clk-bcm21664.c | 290 ++
Replace the "fake" fixed-rate clocks used previously for the
bcm21664 family with "real" ones.
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm21664.dtsi | 190 ---
1 file changed, 118 insertions(+), 72 deletions(-)
diff --git
On 03/28/2014 04:12 PM, Alex Elder wrote:
> This series proposes creating a single implementation of the "pen
> release" (or spin-table) mechanism for starting secondary CPUs on
> ARM SMP systems. This mechanism is currently implemented at least 5
> times in the kernel, each
On 04/04/2014 12:55 PM, Stephen Boyd wrote:
> On 04/03/14 19:18, Alex Elder wrote:
>> +
>> +/*
>> + * Secondary startup method setup routine to extract the location of
>> + * the secondary boot register from a "cpu" or "cpus" device tree
>> +
On 04/04/2014 10:30 AM, Tim Kryger wrote:
> On Thu, Apr 3, 2014 at 7:18 PM, Alex Elder wrote:
>
>> diff --git a/arch/arm/mach-bcm/platsmp.c b/arch/arm/mach-bcm/platsmp.c
>> new file mode 100644
>> index 000..46a64f2
>> --- /dev/null
>> +++ b/arch/arm/
On 04/03/2014 09:18 PM, Alex Elder wrote:
> Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
> currently need.
>
> Signed-off-by: Ray Jui
> Signed-off-by: Alex Elder
> ---
> arch/arm/configs/bcm_defconfig |2 ++
> 1 file changed, 2 insertions(+
On 04/03/2014 09:18 PM, Alex Elder wrote:
> This patch adds SMP support for BCM281XX and BCM21664 family SoCs.
>
> This feature is controlled with a distinct config option such that a
> SMP-enabled multi-v7 binary can be configured to run these SoCs in
> uniprocessor mode.
rror code to allow DT parsing errors to be
reported by the setup function.
(Note that only the first "cpu" (or "cpus") node having a matching
method is used by set_smp_ops_by_method(); this logic is not
changed.)
Signed-off-by: Alex Elder
---
arch/arm/include/asm/smp.h | 10
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm21664.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi
index 08a44d4..a37ded1
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/boot/dts/bcm11351.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
he address specified.
The location of the special register is defined in the device tree
using a "secondary-boot-reg" property in a node whose "enable-method"
matches.
Derived from code originally provided by Ray Jui
Signed-off-by: Alex Elder
---
arch/arm/mach-bcm/Kconfig
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