RE: [PATCH 0/6] arm64: Simple additions to NS2 DT

+Arnd, +Olof Ping? Regards, Anup -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

RE: [PATCH v5 0/3] NAND support for Broadcom NS2 SoC

+Arnd, +Olof Regards, Anup -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

RE: [PATCH v5 2/3] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

> -Original Message- > From: Brian Norris [mailto:computersforpe...@gmail.com] > Sent: 31 October 2015 01:18 > To: Anup Patel > Cc: David Woodhouse; Linux MTD; Rob Herring; Pawel Moll; Mark Rutland; > Catalin Marinas; Will Deacon; Sudeep Holla; Ian Campbell; Kumar Gala

RE: [PATCH v5 0/3] NAND support for Broadcom NS2 SoC

> -Original Message- > From: Brian Norris [mailto:computersforpe...@gmail.com] > Sent: 31 October 2015 01:02 > To: Anup Patel > Cc: David Woodhouse; Linux MTD; Rob Herring; Pawel Moll; Mark Rutland; > Catalin Marinas; Will Deacon; Sudeep Holla; Ian Campbell; Kumar Gala

[PATCH v4 2/3] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

is issued. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- drivers/mtd/nand/brcmnand/brcmnand.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/mtd/nand/b

[PATCH v4 0/3] NAND support for Broadcom NS2 SoC

ths in ns2-svk.dts. Changes since v1: - Dropped patch3 and patch4 because we don't need to reset BRCMNAND controller for NS2. - Added patch to force 8bit mode before doing nand_scan_ident() in brcmnand_init_cs(). Anup Patel (2): mtd: brcmnand: Force 8bit mode before doing nand_scan_ident

[PATCH v4 3/3] arm64: dts: Add BRCM IPROC NAND DT node for NS2

The NAND controller on NS2 SoC is compatible with existing BRCM IPROC NAND driver so let's enable it in NS2 DT and NS2 SVK DT. This patch also fixes use of node labels in ns2-svk.dts. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Review

RE: [PATCH v4 2/3] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

> -Original Message- > From: Anup Patel [mailto:anup.pa...@broadcom.com] > Sent: 30 October 2015 11:49 > To: David Woodhouse; Brian Norris; Linux MTD > Cc: Rob Herring; Pawel Moll; Mark Rutland; Catalin Marinas; Will Deacon; > Sudeep Holla; Ian Campbell; Kumar Ga

[PATCH v5 0/3] NAND support for Broadcom NS2 SoC

h2 because these are already merged by MTD maintainer. - Avoid using absolute node paths in ns2-svk.dts. Changes since v1: - Dropped patch3 and patch4 because we don't need to reset BRCMNAND controller for NS2. - Added patch to force 8bit mode before doing nand_scan_ident() in brcmnand_init_c

RE: [PATCH v4 0/3] NAND support for Broadcom NS2 SoC

Hi All, Please disregard this patchset. There is an accidental typo in patch2. We should use ~CFG_BUS_WIDTH instead of CFG_BUS_WIDTH in patch2. I will quickly send v5 patchset to fix this. Sorry, for the noise. Regards, Anup -- To unsubscribe from this list: send the line "unsubscribe

[PATCH v5 1/3] mtd: brcmnand: factor out CFG and CFG_EXT bitfields

From: Brian Norris <computersforpe...@gmail.com> Use enum instead of magic numbers for CFG and CFG_EXT bitfields. Signed-off-by: Brian Norris <computersforpe...@gmail.com> Tested-by: Anup Patel <anup.pa...@broadcom.com> --- drivers/mtd/nand/brcmna

[PATCH v5 3/3] arm64: dts: Add BRCM IPROC NAND DT node for NS2

The NAND controller on NS2 SoC is compatible with existing BRCM IPROC NAND driver so let's enable it in NS2 DT and NS2 SVK DT. This patch also fixes use of node labels in ns2-svk.dts. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Review

[PATCH v5 2/3] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

is issued. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- drivers/mtd/nand/brcmnand/brcmnand.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/mtd/nand/b

[PATCH v4 1/3] mtd: brcmnand: factor out CFG and CFG_EXT bitfields

From: Brian Norris <computersforpe...@gmail.com> Use enum instead of magic numbers for CFG and CFG_EXT bitfields. Signed-off-by: Brian Norris <computersforpe...@gmail.com> Tested-by: Anup Patel <anup.pa...@broadcom.com> --- drivers/mtd/nand/brcmna

RE: [PATCH v3 2/2] arm64: dts: Add BRCM IPROC NAND DT node for NS2

> -Original Message- > From: Ray Jui [mailto:r...@broadcom.com] > Sent: 28 October 2015 06:17 > To: Brian Norris > Cc: Anup Patel; David Woodhouse; Linux MTD; Rob Herring; Pawel Moll; Mark > Rutland; Catalin Marinas; Will Deacon; Sudeep Holla; Ian Campbell; Kumar Gal

RE: [PATCH v3 1/2] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

> -Original Message- > From: Brian Norris [mailto:computersforpe...@gmail.com] > Sent: 28 October 2015 05:45 > To: Anup Patel > Cc: David Woodhouse; Linux MTD; Rob Herring; Pawel Moll; Mark Rutland; > Catalin Marinas; Will Deacon; Sudeep Holla; Ian Campbell; Kumar Gala

RE: [PATCH 0/6] arm64: Simple additions to NS2 DT

Ping ??? Regards, Anup -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH v3 0/2] NAND support for Broadcom NS2 SoC

fore doing nand_scan_ident() in brcmnand_init_cs(). Anup Patel (2): mtd: brcmnand: Force 8bit mode before doing nand_scan_ident() arm64: dts: Add BRCM IPROC NAND DT node for NS2 arch/arm64/boot/dts/broadcom/ns2-svk.dts | 30 -- arch/arm64/boot/dts/broadcom/ns2.dt

[PATCH v3 1/2] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

is issued. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- drivers/mtd/nand/brcmnand/brcmnand.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/mtd/nand/brcm

[PATCH v3 2/2] arm64: dts: Add BRCM IPROC NAND DT node for NS2

The NAND controller on NS2 SoC is compatible with existing BRCM IPROC NAND driver so let's enable it in NS2 DT and NS2 SVK DT. This patch also fixes use of node labels in ns2-svk.dts. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Review

RE: [PATCH v2 4/4] arm64: dts: Add BRCM IPROC NAND DT node for NS2

> -Original Message- > From: Sudeep Holla [mailto:sudeep.ho...@arm.com] > Sent: 20 October 2015 14:36 > To: Anup Patel > Cc: David Woodhouse; Brian Norris; linux-...@lists.infradead.org; Sudeep > Holla; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell; Kumar Gala; &

RE: [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller

Hi Brian, > -Original Message- > From: Brian Norris [mailto:computersforpe...@gmail.com] > Sent: 13 October 2015 02:58 > To: Anup Patel > Cc: Florian Fainelli; Scott Branden; linux-arm-ker...@lists.infradead.org; Rob > Herring; Pawel Moll; Mark Rutland; Ian Campbell; K

[PATCH v2 1/4] mtd: brcmnand: Fix pointer type-cast in brcmnand_write()

We should always type-cast pointer to "long" or "unsigned long" because size of pointer is same as machine word size. This will avoid pointer type-cast issues on both 32bit and 64bit systems. This patch fixes pointer type-cast issue in brcmnand_write() as-per above info.

[PATCH v2 3/4] mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

is issued. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- drivers/mtd/nand/brcmnand/brcmnand.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/mtd/nand/brcm

[PATCH v2 0/4] NAND support for Broadcom NS2 SoC

. Changes since v1: - Dropped patch3 and patch4 because we don't need to reset BRCMNAND controller for NS2. - Added patch to force 8bit mode before doing nand_scan_ident() in brcmnand_init_cs(). Anup Patel (4): mtd: brcmnand: Fix pointer type-cast in brcmnand_write() mtd: n

[PATCH v2 4/4] arm64: dts: Add BRCM IPROC NAND DT node for NS2

The NAND controller on NS2 SoC is compatible with existing BRCM IPROC NAND driver so let's enable it in NS2 DT and NS2 SVK DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- a

[PATCH v2 2/4] mtd: nand: Allow MTD_NAND_BRCMNAND to be selected for ARM64

The BRCM NAND driver can be re-used for Broadcom ARM64 SoCs hence this patch updates Kconfig to allow selection of MTD_NAND_BRCMNAND for ARM64. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Vikram Prakash <vikr...@broadcom.com> Reviewed-by: Ray Jui <r...@broadco

RE: [PATCH v2 1/4] mtd: brcmnand: Fix pointer type-cast in brcmnand_write()

> -Original Message- > From: Ray Jui [mailto:r...@broadcom.com] > Sent: 16 October 2015 21:06 > To: Anup Patel; David Woodhouse; Brian Norris; linux-...@lists.infradead.org > Cc: Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell; Kumar Gala; Catalin > Marinas;

RE: [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller

> -Original Message- > From: Florian Fainelli [mailto:f.faine...@gmail.com] > Sent: 07 October 2015 04:51 > To: Scott Branden; Brian Norris; Anup Patel > Cc: linux-arm-ker...@lists.infradead.org; Rob Herring; Pawel Moll; Mark > Rutland; Ian Campbell; Kumar Gal

RE: [PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller

> -Original Message- > From: Brian Norris [mailto:computersforpe...@gmail.com] > Sent: 05 October 2015 03:20 > To: Anup Patel > Cc: linux-arm-ker...@lists.infradead.org; Rob Herring; Pawel Moll; Mark > Rutland; Ian Campbell; Kumar Gala; Catalin Marinas; Will Deacon;

[PATCH 5/5] arm64: dts: Add BRCM IPROC NAND DT node for NS2

The NAND controller on NS2 SoC is compatible with existing BRCM IPROC NAND driver so let's enable it in NS2 DT and NS2 SVK DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- a

[PATCH 6/6] arm64: dts: Add I2C nodes for NS2

From: Ray Jui This patch adds iProc I2C DT nodes for NS2 and enable them for the NS2 SVK board Signed-off-by: Ray Jui Reviewed-by: Vikram Prakash Reviewed-by: Scott Branden ---

[PATCH 1/6] arm64: dts: Add L2-cache DT node for NS2

Recent kernels requires cache hierrachy to be defined via DT hence this patch updates NS2 DT accordingly. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Sandeep Tripathy <tripa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Sc

[PATCH 5/6] arm64: dts: Add IPROC RNG200 DT node for NS2

We have IPROC RNG200 hardware random number generation in NS2 SoC, lets enable it for NS2 in NS2 DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Pramod KUMAR <pramo...@broadcom.com> Reviewed-by: Vikram Prakash <

[PATCH 4/6] arm64: dts: Add ARM PMUv3 DT node in NS2 DT

The NS2 SoC has Cortex-A57 CPUs which support ARM PMUv3 so, lets enable ARM PMUv3 in NS2 DT. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Vikram Prakash <vikr...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@br

[PATCH 0/6] arm64: Simple additions to NS2 DT

We add l2-cache, SMMU, reboot, PMUv3, RNG, and I2C DT nodes for NS2 SVK. This patchset is based on v4.3-rc3 and available in ns2_dt1_v1 branch of https://github.com/Broadcom/arm64-linux.git. The patchset is tested on NS2 SVK. Anup Patel (5): arm64: dts: Add L2-cache DT node for NS2 arm64

[PATCH 2/6] arm64: dts: Add SMMU DT node for NS2

The SMMU-500 driver is already available in Linux kernel. Let's enable it for NS2 in DT. This patch keeps mmu-masters attribute empty so that driver patches can later extend this attribute when adding device DT nodes. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray

[PATCH 3/6] arm64: dts: Add syscon based reboot in DT for NS2

. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- arch/arm64/boot/dts/broadcom/ns2.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/broadco

[PATCH 1/5] mtd: brcmnand: Fix pointer type-cast in brcmnand_write()

We should always type-cast pointer to "long" or "unsigned long" because size of pointer is same as machine word size. This will avoid pointer type-cast issues on both 32bit and 64bit systems. This patch fixes pointer type-cast issue in brcmnand_write() as-per above info.

[PATCH 0/5] NAND support for Broadcom NS2 SoC

We enable NAND support for Broadcom NS2 SoC by reusing existing BRCMNAND driver. This patchset applies on-top of "arm64: Simple additions to NS2 DT" patchset and is available in ns2_nand_v1 branch of https://github.com/Broadcom/arm64-linux.git. The patchset is tested on NS2 SVK. Anu

[PATCH 2/5] mtd: nand: Allow MTD_NAND_BRCMNAND to be selected for ARM64

The BRCM NAND driver can be re-used for Broadcom ARM64 SoCs hence this patch updates Kconfig to allow selection of MTD_NAND_BRCMNAND for ARM64. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Vikram Prakash <vikr...@broadcom.com> Reviewed-by: Ray Jui <r...@broadco

[PATCH 4/5] Documentation: dt-bindings: Add info about brcm,nand-iproc-reset DT flag

This patch updates the BRCM NAND controller DT bindings documentation to add info about newly added optional flag "brcm,nand-iproc-reset". Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Pramod KUMAR <pramo...@broadcom.com> Reviewed-by: Ray Jui <r.

[PATCH 3/5] mtd: brcmnand: Optional DT flag to reset IPROC NAND controller

t the NAND controller before any commands are issued. Signed-off-by: Anup Patel <anup.pa...@broadcom.com> Reviewed-by: Pramod KUMAR <pramo...@broadcom.com> Reviewed-by: Ray Jui <r...@broadcom.com> Reviewed-by: Scott Branden <sbran...@broadcom.com> --- drivers/m

Re: [PATCH v4 5/6] Documentation: dt-bindings: Add binding info for X-Gene QMTM UIO driver

On Thu, Nov 13, 2014 at 1:15 PM, Ankit Jindal ankit.jin...@linaro.org wrote: This patch adds device tree binding documentation for X-Gene QMTM UIO driver. Signed-off-by: Ankit Jindal ankit.jin...@linaro.org Signed-off-by: Tushar Jagad tushar.ja...@linaro.org ---

Re: [PATCH Resend 0/2] arm64: Add PMU node for APM X-Gene Storm SoC

On 12 August 2014 05:17, Feng Kan f...@apm.com wrote: This patch series adds PMU node for APM X-Gene's Potenza CPU. Potenza CPU PMU is compatible with ARMv8-PMUv3. I have remove the previous notice regarding the dependancy on the GIC driver from the commit message. Feng Kan (1):

Re: [PATCH 2/2] arm: Support for platforms with split GIC cpu interface registers.

On Fri, Nov 1, 2013 at 3:43 PM, Ian Campbell ian.campb...@citrix.com wrote: At least one platform (APM Storm) places the two pages of the GIC cpu interface (and the vcpu side) at non-contiguous locations. Document two additional regions to cover this split and update the corresponding dtsi.

Re: [PATCH 2/2] arm: Support for platforms with split GIC cpu interface registers.

On Fri, Nov 22, 2013 at 12:24 PM, Anup Patel a...@brainfault.org wrote: On Fri, Nov 1, 2013 at 3:43 PM, Ian Campbell ian.campb...@citrix.com wrote: At least one platform (APM Storm) places the two pages of the GIC cpu interface (and the vcpu side) at non-contiguous locations. Document two