like expected (suspend/resume issue is fixed).
Tested-by: Bartlomiej Zolnierkiewicz
You could also add:
Reported-by: Bartlomiej Zolnierkiewicz
(since the issue got narrowed down and reported to you by me :).
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Sa
nabled in
the kernel config).
Why can't it be fixed with checking Device Tree with
of_machine_is_compatible("mediatek,mt8173")
(assuming that it can be used on arm64 like on arm32)?
> + if (IS_ERR(pdev)) {
> + pr_err("failed to register mtk-cpuf
1 +
> drivers/clk/samsung/clk-exynos3250.c| 32 ++++++--
> include/dt-bindings/clock/exynos3250.h | 1 +
> 6 files changed, 55 insertions(+), 2 deletions(-)
Reviewed-by: Bartlomiej Zolnierkiewicz
Thank you for working on this.
Best regards,
--
Bartl
so I don't focus
> that much on areas other than I still maintain.
>
> As for b) I believe all my patches have been already merged and now
> we're just waiting for Kukjin to apply Bart's patch (although it's been
> sitting on the ML since July, so probably nee
16b1a87016d69efd027714a80521dd:
>
> arm64: add PSCI CPU_SUSPEND based cpu_suspend support (2014-09-12 10:48:56
> +0100)
>
> are available in the git repository at:
>
> git://linux-arm.org/linux-2.6-lp.git for-upstream/arm-generic-cpuidle
>
> for you to fetch changes up to
tead (just like all other PHY drivers except PHY_MIPHY365X which
also should be fixed to use select).
> + help
> + Enable this support to enable the picoPHY device used by USB2
> + and USB3 controllers on STMicroelectronics STiH407 SoC families.
> +
Best regards,
--
Bar
On Monday, August 25, 2014 01:19:04 PM Bartlomiej Zolnierkiewicz wrote:
> On Monday, August 25, 2014 07:37:25 PM Chanwoo Choi wrote:
> > Hi Bartlomiej,
> >
> > On 08/25/2014 07:15 PM, Bartlomiej Zolnierkiewicz wrote:
> > >
> > > Hi,
> > >
>
On Monday, August 25, 2014 07:37:25 PM Chanwoo Choi wrote:
> Hi Bartlomiej,
>
> On 08/25/2014 07:15 PM, Bartlomiej Zolnierkiewicz wrote:
> >
> > Hi,
> >
> > On Monday, August 25, 2014 04:30:23 PM Chanwoo Choi wrote:
> >> This patch support many TRIM
/exynos_tmu_data.h
> b/drivers/thermal/samsung/exynos_tmu_data.h
> index 401bab7..87454f63 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.h
> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
> @@ -64,6 +64,9 @@
> #define EXYNOS_EMUL_CON 0x80
>
> #define EXYNOS_TRIM
https://lkml.org/lkml/2014/8/20/334
One other issue with your patch is that it modifies struct
exynos_tmu_registers and struct exynos_tmu_platform_data without
updating corresponding documentation. Please fix it.
Otherwise it looks fine to me.
Best regards,
--
Bartlomiej Zolnierkiewicz
8 SoC's.
> +
> config MMC_SH_MMCIF
> tristate "SuperH Internal MMCIF support"
> depends on MMC_BLOCK
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
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l to probe but it wont
> crash the system.
> git bisect should still work.
Unless someone bisects things related to ADC functionality..
Also patch #1 seems to break device tree ABI (the old dtb will no longer
work with the new kernel).
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Insti
#8. To make it build
the following line from patch #8 needs to be dropped:
+ spin_lock_init(&pp->conf_lock);
]
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
On Thursday, May 22, 2014 05:01:19 PM Pratyush Anand wrote:
>
> drivers/cpuidle/cpuidle-exynos.c | 29
> +-
> 6 files changed, 93 insertions(+), 12 deletions(-)
> create mode 100644
> Documentation/devicetree/bindings/arm/exynos/idle-states.txt
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institu
0..e931aee
> --- /dev/null
> +++ b/drivers/phy/phy-qcom-ipq806x-sata.c
[...]
> +static inline void qcom_ipq806x_sata_delay_us(unsigned int delay)
> +{
> + /* sleep for max. 50us more to combine processor wakeups */
> + usleep_range(delay, delay + 50);
> +}
This
iv->phys[i].phy = phy;
> + priv->phys[i].val = desc[i].val;
> + priv->phys[i].index = i;
> + phy_set_drvdata(phy, &priv->phys[i]);
> +
> + /* Make sure the PHY is off */
> + phy_berlin_sata_power_off(phy);
> + }
>
help
> + Support for 1-bit PHY controllers on SoCs from Exynos family.
> +
> endmenu
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
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mp;& MACH_ARMADA_375) || COMPILE_TEST
> + select GENERIC_PHY
> +
> config PHY_EXYNOS_MIPI_VIDEO
> tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
> depends on HAS_IOMEM
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsun
and compile testing, i.e.
depends on ARCH_MVEBU || COMPILE_TEST
> + select USB_XHCI_PLATFORM
> + ---help---
> + Say 'Y' to enable the support for the xHCI host controller
> + found in Marvell Armada 38x ARM SOCs.
> +
> endif # USB_XHCI_HCD
>
>
Hi,
Zhang, could you please review/merge this patchset?
[ We have been waiting for a review for over 3 months now.. ]
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
On Friday, February 07, 2014 03:03:46 PM Naveen Krishna Ch wrote:
> He
ynos_pmu_driver_init);
> +
> +MODULE_AUTHOR("Younggun Jang +MODULE_DESCRIPTION("Exynos PMU driver");
> +MODULE_LICENSE("GPL v2");
This driver can be build as module now but:
- exynos_sys_powerdown_conf() is not exported
- there is no exynos_pmu_driver_exit()
Also
clk_provider);
> is_init_done = true;
> @@ -2619,7 +2628,6 @@ void __init of_clk_init(const struct of_device_id
> *matches)
>*/
> if (!is_init_done)
> force = true;
> -
> }
> }
&g
get_by_name(struct device_node *np, const char *name);
> struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec);
> #else
> @@ -395,6 +397,11 @@ static inline struct clk *of_clk_get_by_name(struct
> device_node *np,
> {
> return ERR_PTR(-ENOENT);
> }
>
On Friday, March 14, 2014 12:14:03 PM Chanwoo Choi wrote:
> Hi,
>
> On 03/14/2014 01:43 AM, Bartlomiej Zolnierkiewicz wrote:
> >
> > Hi,
> >
> > On Thursday, March 13, 2014 05:17:21 PM Chanwoo Choi wrote:
> >> This patchset support device
igned-off-by: Tuan Phan
> Signed-off-by: Suman Tripathi
Reviewed-by: Bartlomiej Zolnierkiewicz
Thanks for fixing all the remaining issues.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
--
To unsubscribe from this list: send the line "
vdd_int-supply = <&buck3_reg>;
> + };
> +
> +For Exynos4x12 busfreq,
ditto
> + busfreq@106A {
> + compatible = "samsung,exynos4x12-busfreq";
> + reg = <0x106A 0x2000>, <0x106B0000 0x2000>;
> +
cover
letter is that it is improving currently unused driver (because of
DT-only mach-exynos conversion the only user was removed in June 2013
and from the reading the code I suspect that even that user hadn't
worked previously). As such this patch series should not cause any
regressions.
Best
simple and look like this:
static void xgene_ahci_host_stop(struct ata_host *host)
{
struct ahci_host_priv *hpriv = host->private_data;
ahci_platform_disable_resources(hpriv);
}
> + .driver = {
> + .name = "xgene-ahci",
> + .owner
On Wednesday, March 05, 2014 05:20:05 PM Tomasz Figa wrote:
> Hi Bartek,
>
> On 05.03.2014 17:15, Bartlomiej Zolnierkiewicz wrote:
> >
> > Hi Tomek,
> >
> > On Monday, March 03, 2014 05:02:08 PM Tomasz Figa wrote:
> >> This patch moves Exynos powe
AIN)
> - break;
> - cond_resched();
> - }
> -}
> -
> -static void exynos_read_domain_from_dt(struct device *dev)
> -{
> - struct platform_device *pd_pdev;
> - struct exynos_pm_domain *pd;
> - struct device_node *node;
>
form_[get,enable,disable]_resources()
is not used instead?
> + if (!hplat_data->phy) {
> + dev_err(dev, "no PHY available\n");
> + rc = -ENODEV;
> + goto disable_resources;
> + }
> +
> + rc = phy_init(hplat_data->phy
arning: ‘imx_ahci_resume’ defined but not used
[-Wunused-function]
[ There needs to be CONFIG_PM_SLEEP ifdef around imh_ahci_suspend()
and imx_ahci_resume(). ]
All the rest looks good.
> +static SIMPLE_DEV_PM_OPS(ahci_imx_pm_ops, imx_ahci_suspend, imx_ahci_resume);
> +
> static struct platform_driv
rc = ahci_platform_enable_resources(hpriv);
> - if (rc)
> - goto free_clk;
> + devres_remove_group(dev, NULL);
> + return hpriv;
>
> - /*
> - * Some platforms might need to prepare for mmio region access,
> - * which could be done in the
le failed");
> - return rc;
> - }
> - }
> + rc = ahci_enable_clks(dev, hpriv);
ahci_platform_enable_clks()
> + if (rc)
> + return rc;
>
> if (pdata && pdata->resume) {
> rc = pdata->resume(dev);
> @@ -317,8 +383,7 @@ static int ahci_resume(struct device *dev)
> return 0;
>
> disable_unprepare_clk:
> - if (!IS_ERR(hpriv->clk))
> - clk_disable_unprepare(hpriv->clk);
> + ahci_disable_clks(hpriv);
ahci_platform_disable_clks()
[...]
All code in question gets rewritten in patch #4/15 so the actual
problem is the broken bisectability between patch #2 and #4.
It seems too late to fix it now but in the future please remember
to build-test each patch separately (in addition to testing the whole
patchset).
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
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>
> v3:
> - Addressed review comments and rebased on 3.13-rc7
> - DT binding update moved to new patch.
>
> v2:
> - got rid of Texas Instruments SATA wrapper driver
> - adressed review comments
Thanks for fixing it.
Reviewed-by: Bartlomiej Zolnierkiewicz
Best regards,
compatible = "samsung,exynos5420-scaler";
> + reg = <0x1280 0x1000>;
> + interrupts = <0 220 0>;
> + clocks = <&clock 381>;
> + clock-names = "scaler";
> + };
Your pa
_clk_put(scaler);
vb2_dma_contig_cleanup_ctx() and pm_runtime_disable() calls on
failure are missing
> + return ret;
> +}
> +
> +static int scaler_remove(struct platform_device *pdev)
> +{
> + struct scaler_dev *scaler = platform_get_drvdata(pdev);
> +
> + scaler_unregister_m2m_
gt; + select V4L2_MEM2MEM_DEV
> + help
> + This is a v4l2 driver for Samsung EXYNOS5410/5420 SoC SCALER.
> +
> config VIDEO_SH_VEU
> tristate "SuperH VEU mem2mem video processing driver"
> depends on VIDEO_DEV && VIDEO_V4L2 && H
On Wednesday, January 08, 2014 06:39:52 PM Yuvaraj Kumar wrote:
> On Tue, Jan 7, 2014 at 7:52 PM, Bartlomiej Zolnierkiewicz
> wrote:
> >
> > Hi,
> >
> > On Thursday, January 02, 2014 07:03:23 PM Yuvaraj Kumar wrote:
> >> On Tue, Dec 31, 2013 at 9:00 PM
Hi,
On Thursday, January 02, 2014 07:03:23 PM Yuvaraj Kumar wrote:
> On Tue, Dec 31, 2013 at 9:00 PM, Bartlomiej Zolnierkiewicz
> wrote:
> >> @@ -8,3 +8,4 @@ obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) +=
> >> phy-exynos-mipi-video.o
> >> obj-$(CONFIG_PHY_MVEBU_
@@ -231,16 +232,23 @@
> };
>
> sata@122F {
> - compatible = "samsung,exynos5-sata-ahci";
> + compatible = "snps,dwc-ahci";
> + samsung,sata-freq = <66>;
> reg = <0x122F 0x1ff>;
&
either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +#define EXYNOS5_SATA_RESET 0x4
> +#define EXYNOS5_SATA_MODE0 0x10
> +#define EXYNOS5_SATA_CTRL0 0x14
> +#define EXYNOS5_SATA_STAT0 0x18
This one seem
gulator_dev *regulator" (which can be declared inside "for" loop)
instead of an array.
> + dev_err(&pdev->dev,
> + "Regulator init failed for ID %d with
> error: %d\n",
> + i
On Wednesday, November 20, 2013 06:54:34 PM Bartlomiej Zolnierkiewicz wrote:
>
> Hi Krzysztof,
>
> On Wednesday, November 20, 2013 03:12:11 PM Krzysztof Kozlowski wrote:
> > MAX14577 chip is a multi-function device which includes MUIC,
> > charger and voltage regulator.
return -ENODEV;
> + }
> +
> + if (max14577->dev->of_node) {
> + int ret = max14577_regulator_dt_parse_pdata(pdev, pdata);
> + if (ret)
> + return ret;
> + }
> +
> + info = devm_kzalloc(&pd
of RTC
support there should be an exception from the generic rule and RTC
should be enabled for all EXYNOS boards (we have RTC driver config
option already enabled in our exynos_defconfig and we are also already
enabling RTC device explicitly in EXYNOS5250 dtsi file).
Best regards,
--
Bartlom
ng?
> bad, because it introduces a change in DT binding that is not needed yet
> and might turn out to be insufficient for future SoCs.
>
> This patch will be okay, if a need for explicit mask specification shows
> up in future, though.
Agreed.
Best regards,
--
Bartlomiej Zolnie
new bit field intclr_fall_shift to handle the
> offset for exyns5250 and exynos5440
> Also removes the unused macros EXYNOS_TMU_FALL_INT_SHIFT and
> EXYNOS5440_TMU_FALL_INT_SHIFT, inten_fall_shift field
Thanks for fixing this. All three patches look good to me now.
Reviewed-by: Bart
alphabetically, make exynso5420 come before
> exynso5440
>b. Reduce code duplication in passing platform data by introducing a
> common macro
> Bartlomiej Zolnierkiewicz Thanks for review and suggestions
> Changes since v4:
> None
> Changes since v5:
> None
&g
Hi,
On Wednesday, November 06, 2013 06:47:56 PM Naveen Krishna Ch wrote:
> Hello Bartlomiej,
>
> My reply is very long delayed sorry.
>
> On 17 October 2013 15:33, Bartlomiej Zolnierkiewicz
> wrote:
> >
> > Hi Naveen,
> >
> > On Thursday, October 17,
EXYNOS_TMU_FALL_INT_SHIFT16
> #define EXYNOS_TMU_CLEAR_RISE_INT0x111
> #define EXYNOS_TMU_CLEAR_FALL_INT(0x111 << 12)
> +#define EXYNOS5250_TMU_CLEAR_FALL_INT_SHIFT 12
The better name would be EXYNOS_TMU_CLEAR_FALL_INT_SHIFT because it is
also used on EXYNOS4412.
[ I was a bit too quick with hitting the Send button.. ]
On Wednesday, October 16, 2013 12:06:21 PM Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> On Wednesday, October 16, 2013 08:21:30 AM Naveen Krishna Chatradhi wrote:
> > On Exynos5250, the FALL interrupt related en, sta
XYNOS5250_TMU_CLEAR_FALL_INT_SHIFT 12
The better name would be EXYNOS_TMU_CLEAR_FALL_INT_SHIFT because
it is also used on EXYNOS4412.
Also in patch #3 you should define EXYNOS5420_TMU_CLEAR_FALL_INT_SHIFT
instead of re-using EXYNOS_TMU_FALL_INT_SHIFT.
In this patch (#1) EXYNOS*_TMU_FALL_INT_SHIFT shoul
On Monday, October 14, 2013 10:18:03 AM Eduardo Valentin wrote:
> On 11-10-2013 11:57, Bartlomiej Zolnierkiewicz wrote:
> >
> > Hi,
> >
> > On Friday, October 11, 2013 11:10:38 AM Eduardo Valentin wrote:
> >> Hi Naveen,
> >>
> >>
Hi,
On Friday, October 11, 2013 11:10:38 AM Eduardo Valentin wrote:
> Hi Naveen,
>
> On 09-10-2013 10:03, Bartlomiej Zolnierkiewicz wrote:
> >
> > Hi,
> >
> > All patches (#1-#3) look good to me, FWIW you can add:
> >
> > Reviewed-by: Bartlom
Hi,
All patches (#1-#3) look good to me, FWIW you can add:
Reviewed-by: Bartlomiej Zolnierkiewicz
Please note that (at least) patch #3 conflicts with Lukasz's EXYNOS4412
fixup patchset:
https://lkml.org/lkml/2013/10/9/35
It is up to Eduardo to resolve this but it pro
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