add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes in v7: None
Changes in v6:
- update the document, since the bridge device has been deleted.
Changes in v5:
o bindings/display/rockchip/
Chris Zhong (5):
drm/rockchip: return a true clock rate to adjusted_mode
Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver
drm: rockchip: Support Synopsys DW MIPI DSI
ARM: dts: rockchip: add rk3288 mipi_dsi nodes
ARM: dts: rockchip: add support
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v7:
- Move the lcd_en control to act8846 dts
Changes in v6: None
Changes in v5:
- add a blank line befor lcd_en
Changes in v4
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v7: None
Changes in v6: None
Changes in v5:
- modify the clk name to SCLK_MIPIDSI_24M
Changes in v4: None
Changes in v3: None
arch/ar
Hi Heiko
Thanks for your reminder.
I have post the v6.1 mipi patch with the atomic support.
<https://patchwork.kernel.org/patch/7881781/>
On 12/17/2015 05:29 PM, Heiko Stübner wrote:
Hi Chris,
Am Mittwoch, 16. Dezember 2015, 18:10:10 schrieb Chris Zhong:
The rk3288 MIPI DSI is a Sy
mode_fixup
Changes in v3:
- move dw_mipi_dsi_rockchip.txt to bindings/display/rockchip/
Chris Zhong (5):
drm/rockchip: return a true clock rate to adjusted_mode
Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver
drm: rockchip: Support Synopsys DW MIPI DSI
ARM: dts: roc
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v6: None
Changes in v5:
- add a blank line befor lcd_en
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk3288-evb.dts
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v6: None
Changes in v5:
- modify the clk name to SCLK_MIPIDSI_24M
Changes in v4: None
Changes in v3: None
arch/arm/boot/dts/rk328
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes in v6:
- update the document, since the bridge device has been deleted.
Changes in v5: None
Changes in v4:
vcc_wl and vcc_lcd are 2 gpio switches for rk3288-evb-act8846 board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
arch/arm/boot/dts/rk3288-evb-act8846.dts | 34
1 file changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.
According to the schematic, the name of REG8 should be vcc_tp, rather
than vcca_tp.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
arch/arm/boot/dts/rk3288-evb-act8846.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts
Rk3288-evb-act8846 and rk3288-evb-rk808 are the power boards of
rk3288-evb, they provide the same power supply interface to the
motherboard. Sort out them, put the public part to rk3288-evb.dtsi,
such as gmac and cpu-supply, leaving only the power section.
Signed-off-by: Chris Zhong <z...@r
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v5:
- change the mipidsi clk to SCLK_MIPIDSI_24M
Changes in v4: None
Changes in v3: None
Changes in v2:
- add the mipi clk id in a single patch
include/dt-bi
- move dw_mipi_dsi_rockchip.txt to bindings/display/rockchip/
Changes in v2:
- add the mipi clk id in a single patch
Chris Zhong (9):
clk: rockchip: add id for mipidsi sclk on rk3288
clk: rockchip: add mipidsi clocks on rk3288
drm/rockchip: return a true clock rate to adjusted_mode
drm:
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v5:
- modify the clk name to SCLK_MIPIDSI_24M
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rk328
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v5:
- add a blank line befor lcd_en
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rk3288-evb.dts
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- move dw_mipi_dsi_rockchip.txt to bindings/display/rockch
From: Liu Ying <ying@freescale.com>
This patch adds device tree bindings for Synopsys DesignWare MIPI DSI
host controller DRM bridge driver.
Signed-off-by: Liu Ying <ying@freescale.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Acked-by: Rob Herring <r...@kern
isplay/bridge
move dw_mipi_dsi_rockchip.txt to bindings/display/rockchip/
move boe,tv080wum-nl0.txt to bindings/display/panel/
Changes in v2:
add the mipi clk id in a single patch
As Thierry.Reding comment, add a documentation for this panel.
Chris Zhong (11):
clk: rockchip: add id for mipids
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rk3288-evb.dtsi | 20 +++-
1 file chang
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes in v4: None
Changes in v3:
move dw_mipi_dsi_rockchip.txt to bindings/display/rockchip/
Changes in v2: None
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rk3288.dtsi | 39 +++
1 file c
This binding specifies a set of common properties for display panels. It
can be used as a basis by bindings for specific panels.
Bindings for three specific panels are provided to show how the
simple panel binding can be used.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Acked-by: Rob H
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicet
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v4: None
Changes in v3: None
Changes in v2:
add the mipi clk id in a single patch
include/dt-bindings/clock/rk3288-cru.h | 1 +
1 file changed, 1 insertion(+)
From: Liu Ying <ying@freescale.com>
This patch adds device tree bindings for Synopsys DesignWare MIPI DSI
host controller DRM bridge driver.
Signed-off-by: Liu Ying <ying@freescale.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v4:
remove gpr pro
Hi Emil
On 11/19/2015 10:41 PM, Emil Velikov wrote:
On 19 November 2015 at 03:35, Chris Zhong <z...@rock-chips.com> wrote:
The rk3288 MIPI DSI is a Synopsys DesignWare MIPI DSI host controller
IP. This series adds support for a Synopsys DesignWare MIPI DSI host
controller DRM bridge
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v3:
move dw_mipi_dsi_rockchip.txt to bindings/display/rockchip/
Changes in v2: None
.../display/rockchip/dw_mipi_dsi_rockchip.txt
tation for this panel.
Chris Zhong (10):
clk: rockchip: add id for mipidsi sclk on rk3288
clk: rockchip: add mipidsi clocks on rk3288
drm/rockchip: return a true clock rate to adjusted_mode
drm/bridge: Add Synopsys DesignWare MIPI DSI host controller driver
drm: rockchip: Support Synopsys DesignWar
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v3: None
Changes in v2:
add the mipi clk id in a single patch
include/dt-bindings/clock/rk3288-cru.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/incl
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rk3288.dtsi | 39 +++
1 file changed, 39 inse
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rk3288-evb.dtsi | 20 +++-
1 file changed, 19 insertions(+), 1 de
This binding specifies a set of common properties for display panels. It
can be used as a basis by bindings for specific panels.
Bindings for three specific panels are provided to show how the
simple panel binding can be used.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes
From: Liu Ying <ying@freescale.com>
This patch adds device tree bindings for Synopsys DesignWare MIPI DSI
host controller DRM bridge driver.
Signed-off-by: Liu Ying <ying@freescale.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v3:
move t
Hi Rob
On 11/02/2015 11:06 PM, Rob Herring wrote:
On Sat, Oct 31, 2015 at 7:56 AM, Chris Zhong <z...@rock-chips.com> wrote:
Your subject should be more specific with the panel name.
I'll write more specific in subject next version.
This binding specifies a set of common prop
This binding specifies a set of common properties for display panels. It
can be used as a basis by bindings for specific panels.
Bindings for three specific panels are provided to show how the
simple panel binding can be used.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes
From: Liu Ying <ying@freescale.com>
This patch adds device tree bindings for Synopsys DesignWare MIPI DSI
host controller DRM bridge driver.
Signed-off-by: Liu Ying <ying@freescale.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
.../d
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
.../bindings/video/dw_mipi_dsi_rockchip.txt| 56 ++
1 file changed, 56 insertions(+)
create mode 100644
Documen
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
arch/arm/boot/dts/rk3288.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/ar
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2:
add vendor prefix for boe
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bi
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
arch/arm/boot/dts/rk3288-evb.dtsi | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2:
add the mipi clk id in a single patch
include/dt-bindings/clock/rk3288-cru.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings
2:
add the mipi clk id in a single patch
add vendor prefix for boe
As Thierry.Reding comment, add a documentation for this panel.
Chris Zhong (11):
clk: rockchip: add id for mipidsi sclk on rk3288
clk: rockchip: add mipidsi clocks on rk3288
drm/rockchip: return a true clock rate to adjuste
On 10/17/2015 05:39 AM, Stephen Boyd wrote:
On 10/10, Chris Zhong wrote:
sclk_mipidsi_24m is the gating of mipi dsi phy.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Acked-by: Stephen Boyd <sb...@codeaurora.org>
drivers/clk/rockchip/clk-rk3288.c | 2 +-
include
only use the MIPI DSI video mode.
The MIPI DSI feature is tested on rk3288 evb board, backport them to
chrome os kernel v3.14, and it can display normally.
This patchset is base on the patchset from ying@freescale.com.
<http://www.spinics.net/lists/dri-devel/msg77181.html>
Chris Zh
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../bindings/video/dw_mipi_dsi_rockchip.txt| 56 ++
1 file changed, 56 insertions(+)
create mode 100644
Documentation/devicetree/bi
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
arch/arm/boot/dts/rk3288-evb.dtsi | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
arch/arm/boot/dts/rk3288.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/rk328
From: Liu Ying <ying@freescale.com>
This patch adds device tree bindings for Synopsys DesignWare MIPI DSI
host controller DRM bridge driver.
Signed-off-by: Liu Ying <ying@freescale.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../devicetree/b
sclk_mipidsi_24m is the gating of mipi dsi phy.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3288.c | 2 +-
include/dt-bindings/clock/rk3288-cru.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk328
add the description about dvs1, dvs2, and add the example.
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes in v4:
- Remove the description about dvs-ok
Changes in v3:
- Modify the syntax error
Changes in v2:
- increase description
the multiline commenting
Chris Zhong (2):
mfd: dt-bindings: add the description about dvs gpio for rk808
regulator: rk808: fixed the overshoot when adjust voltage
Documentation/devicetree/bindings/mfd/rk808.txt | 8 +-
drivers/regulator/rk808-regulator.c | 219
On 05/06/2015 02:10 AM, Doug Anderson wrote:
Chris,
On Mon, May 4, 2015 at 7:07 PM, Chris Zhong z...@rock-chips.com wrote:
Add support for 4 Japanese keys
Signed-off-by: Chris Zhong z...@rock-chips.com
---
arch/arm/boot/dts/cros-ec-keyboard.dtsi | 4
1 file changed, 4 insertions
If you needn't the wakeup event of gpio-charger, this patch can help.
Please set gpio-charger,disable-wakeup in gpio-charger node.
Chris Zhong (2):
dt-bindings: add disable-wakeup property for gpio-charger
power: gpio-charger: support disable the wakeup event
Documentation/devicetree
add disable-wakeup for gpio-charger, if you set this property, system
will not wakeup by gpio-charger.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Documentation/devicetree/bindings/power_supply/gpio-charger.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation
.
When dvs1/dvs2 pin change, dvsok would be pull down, and it would be pull up
once the regulating is complete.
Changes in v3:
- Modify the syntax error
Changes in v2:
- increase description about dvs pins
- modify the multiline commenting
Chris Zhong (2):
mfd: dt-bindings: add the description
add the description about dvs1, dvs2, dvsok, and add the example.
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes in v3:
- Modify the syntax error
Changes in v2:
- increase description about dvs pins
Documentation/devicetree
.
When dvs1/dvs2 pin change, dvsok would be pull down, and it would be pull up
once the regulating is complete.
Changes in v2:
- increase description about dvs pins
- modify the multiline commenting
Chris Zhong (2):
mfd: dt-bindings: add the description about dvs gpio for rk808
regulator
add the description about dvs1, dvs2, dvsok, and add the example.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v2:
- increase description about dvs pins
Documentation/devicetree/bindings/mfd/rk808.txt | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff
On 12/11/2014 03:06 PM, Joe Perches wrote:
On Thu, 2014-12-11 at 14:52 +0800, Yunzhi Li wrote:
On 2014/12/11 14:37, Joe Perches wrote:
On Thu, 2014-12-11 at 11:57 +0530, Kishon Vijay Abraham I wrote:
[]
So If I have to write something on bit 0, I have to set bit 16.
If I have to write
.
When dvs1/dvs2 pin change, dvsok would be pull down, and it would be pull up
once the regulating is complete.
Chris Zhong (2):
regulator: rk808: add dvs support
mfd: dt-bindings: add the description about dvs gpio for rk808
Documentation/devicetree/bindings/mfd/rk808.txt | 10 +-
drivers
add the description about dvs1, dvs2, dvsok, and add the example.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Documentation/devicetree/bindings/mfd/rk808.txt | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/rk808.txt
b
On 12/02/2014 09:26 AM, Kevin Hilman wrote:
Doug Anderson diand...@chromium.org writes:
Hi,
On Mon, Dec 1, 2014 at 2:08 PM, Doug Anderson diand...@chromium.org wrote:
Hi,
On Mon, Dec 1, 2014 at 11:51 AM, Kevin Hilman khil...@kernel.org wrote:
Chris Zhong z...@rock-chips.com writes
Add suspend-voltages and necessary pin-states for suspend on
rk3288-evb-rk808 boards. global_pwroff would be pulled high when
RK3288 entering suspend, this pin is a sleep signal for RK808, so
RK808 could goto sleep mode, and some regulators would be disable.
Signed-off-by: Chris Zhong z...@rock
The pmu-sram is used to store resume code, suspend/resume need get the
address of it. Therefore add a binding and documentation for it.
Signed-off-by: Tony Xie x...@rock-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes in v10
of gpio6_c6 save and restore to pinctrl-rockchip
Changes in v2:
- add the regulator calls in prepare and finish.
- add the pinmux of gpio6_c6 save and restore
- put rockchip,rk3288-pmu-sram to first
Chris Zhong (4):
ARM: rockchip: add suspend and resume for RK3288
ARM: rockchip: Add pmu-sram binding
-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
Changes in v10: None
Changes in v9: None
Changes in v8:
- add ddr pinctrl for suspend
Changes in v7: None
Changes in v6:
- change pmu_intmem
On 12/01/2014 01:26 PM, Doug Anderson wrote:
Chris,
On Mon, Nov 24, 2014 at 11:32 PM, Chris Zhong z...@rock-chips.com wrote:
add pmu sram node for suspend, add global_pwroff pinctrl.
The pmu sram is used to store the resume code.
global_pwroff is held low level at work, it would be pull
On 12/02/2014 06:08 AM, Doug Anderson wrote:
Hi,
On Mon, Dec 1, 2014 at 11:51 AM, Kevin Hilman khil...@kernel.org wrote:
Chris Zhong z...@rock-chips.com writes:
devices, since we still lack power_domain driver, so the other power rail
of rk3288 need keep power on.
I have tested it on rk3288
On 11/27/2014 06:52 AM, Doug Anderson wrote:
Chris,
On Mon, Nov 24, 2014 at 11:32 PM, Chris Zhong z...@rock-chips.com wrote:
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot
The maximum cpu frequency of rk3288 can up to 1.8Ghz, but the vdd_cpu need set
to 1.4v. I've tested these patches on rk3288 evb board.
Chris Zhong (2):
ARM: dts: rockchip: change the max voltage of cpu to 1.4v
ARM: dts: rk3288: change the max clk of cpu to 1.8Ghz
arch/arm/boot/dts/rk3288
The maximum cpu frequency of rk3288 can up to 1.8Ghz,
and it need to set the vdd_cpu to 1.4v correspondingly.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
arch/arm/boot/dts/rk3288.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi
If the cpu frequencies up to 1.8Ghz, we need set the vdd_cpu to 1.4v.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
arch/arm/boot/dts/rk3288-evb-rk808.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts
b/arch/arm/boot/dts/rk3288
Add suspend-voltages and necessary pin-states for suspend on
rk3288-evb-rk808 boards. global_pwroff would be pulled high when
RK3288 entering suspend, this pin is a sleep signal for RK808, so
RK808 could goto sleep mode, and some regulators would be disable.
Signed-off-by: Chris Zhong z...@rock
The pmu-sram is used to store resume code, suspend/resume need get the
address of it. Therefore add a binding and documentation for it.
Signed-off-by: Tony Xie x...@rock-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes in v9
,rk3288-pmu-sram to first
Chris Zhong (4):
ARM: rockchip: add suspend and resume for RK3288
ARM: rockchip: Add pmu-sram binding
ARM: dts: add RK3288 suspend support
ARM: dts: rockchip: add suspend settings for rk3288-evb-rk808
.../devicetree/bindings/arm/rockchip/pmu-sram.txt | 16
-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- change pmu_intmem@ff72 to sram@ff72
Changes in v5:
- change
of gpio6_c6 save and restore to pinctrl-rockchip
Changes in v2:
- add the regulator calls in prepare and finish.
- add the pinmux of gpio6_c6 save and restore
- put rockchip,rk3288-pmu-sram to first
Chris Zhong (4):
ARM: rockchip: add suspend and resume for RK3288
ARM: rockchip: Add pmu-sram binding
-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
Changes in v8:
- add ddr pinctrl for suspend
Changes in v7: None
Changes in v6:
- change pmu_intmem@ff72 to sram@ff72
Changes in v5:
- change size to 4k
global_pwroff would be pull to high when RK3288 entering suspend,
this pin is a sleep signal for RK808, so RK808 could goto sleep
mode, and some regulators would be disable.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v8:
- keep all except cputp power rail on during suspend
The pmu-sram is used to store resume code, suspend/resume need get the
address of it. Therefore add a binding and documentation for it.
Signed-off-by: Tony Xie x...@rock-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes in v8
Hi Kevin
On 11/08/2014 06:48 AM, Kevin Hilman wrote:
Chris Zhong z...@rock-chips.com writes:
RK3288 can shut down the cpu, gpu and other device controllers in suspend,
and it will pull the GLOBAL_PWROFF pin to high in the final stage of the
process of suspend, pull the pin to low again when
to pinctrl-rockchip
Changes in v2:
- __raw_readl/__raw_writel replaced by readl_relaxed/writel_relaxed
- add the regulator calls in prepare and finish.
- add the pinmux of gpio6_c6 save and restore
- put rockchip,rk3288-pmu-sram to first
Chris Zhong (5):
clk: rockchip: RK3288: add suspend and resume
-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
Changes in v7: None
Changes in v6:
- change pmu_intmem@ff72 to sram@ff72
Changes in v5:
- change size to 4k
Changes in v4: None
Changes
global_pwroff would be pull to high when RK3288 entering suspend,
this pin is a sleep signal for RK808, so RK808 could goto sleep
mode, and some regulators would be disable.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v7:
- add regulator-state-mem sub node for suspend
Changes
The pmu-sram is used to store resume code, suspend/resume need get the
address of it. Therefore add a binding and documentation for it.
Signed-off-by: Tony Xie x...@rock-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes in v7
On thing I wonder is if the binding should say that the suspend voltage is
independent of the runtime one and it may be outside of the runtime range?
Best regards,
Javier
Reviewed-by: Chris Zhong z...@rock-chips.com
--
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:
- move the pinmux of gpio6_c6 save and restore to pinctrl-rockchip
Changes in v2:
- __raw_readl/__raw_writel replaced by readl_relaxed/writel_relaxed
- add the regulator calls in prepare and finish.
- add the pinmux of gpio6_c6 save and restore
- put rockchip,rk3288-pmu-sram to first
Chris Zhong
global_pwroff would be pull to high when RK3288 entering suspend,
this pin is a sleep signal for RK808, so RK808 could goto sleep
mode, and some regulators would be disable.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes
-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
Changes in v6:
- change pmu_intmem@ff72 to sram@ff72
Changes in v5:
- change size to 4k
Changes in v4: None
Changes in v3: None
Changes
The pmu-sram is used to store resume code, suspend/resume need get the
address of it. Therefore add a binding and documentation for it.
Signed-off-by: Tony Xie x...@rock-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes in v6
suspend/resume functions
Chris Zhong (5):
pinctrl: rockchip: save and restore gpio6_c6 pinmux in suspend/resume
clk: rockchip: RK3288: add suspend and resume
ARM: rockchip: add suspend and resume for RK3288
ARM: rockchip: Add pmu-sram binding
ARM: dts: add RK3288 suspend support
From: Chris z...@rock-chips.com
support suspend/resume of pinctrl, it allows handling sleep mode
for hogged pins in pinctrl
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v4:
- use SIMPLE_DEV_PM_OPS for suspend/resume struct
Changes in v3: None
Changes in v2: None
drivers
Save and restore the gpio6_c6 pinmux setting, since Maskrom of RK3288
would modify it to sdmmc0_det, so it need to be restored to the correct
setting after resume from Maskrom.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
save and restore some clks, which might be changed in suspend.
Signed-off-by: Tony Xie x...@rock-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- __raw_readl/__raw_writel replaced by readl_relaxed/writel_relaxed
drivers/clk
It's a basic version of suspend and resume for rockchip, it only support RK3288
now.
Signed-off-by: Tony Xie x...@rock-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v4:
- remove grf regmap
Changes in v3:
- move the pinmux of gpio6_c6 save and restore to pinctrl
The pmu-sram is used to store resume code, suspend/resume need get the
address of it. Therefore add a binding and documentation for it.
Signed-off-by: Tony Xie x...@rock-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
pinctrl
as part of the PMIC config.
Signed-off-by: Tony Xie x...@rock-chips.com
Signed-off-by: Chris Zhong z...@rock-chips.com
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- put rockchip,rk3288-pmu-sram to first
arch/arm/boot/dts/rk3288.dtsi | 11 +++
1 file changed, 11
- rename the documentation
Adviced by Doug Anderson
- update the example
Adviced by Mark Rutland
- remove pwm-reg-period
Chris Zhong (2):
regulator: pwm-regulator: get voltage and duty table from dts
dt-bindings: add devicetree bindings for pwm regulator
.../bindings/regulator/pwm-regulator.txt
rename st-pwm to pwm-regulator. And support getting voltage duty table from
device tree, other platforms can also use this driver without any modify.
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
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