implementation to support non-sequential reads for consistency with
other misc/eeprom drivers.
Tested on a custom Freescale VF610-based platform, with an AT93C46D
device attached via dspi2. The spi-gpio driver was used to allow the
necessary non-byte-sized transfers.
Signed-off-by: Cory Tusar
' signal
prior to accessing the EEPROM.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
Acked-by: Rob Herring <r...@kernel.org>
Tested-by: Chris Healy <chris.he...@zii.aero>
---
.../devicetree/bindings/misc/eeprom-93xx46.txt | 25 ++
This commit adds support to the eeprom_93x46 driver allowing a GPIO line
to function as a 'select' or 'enable' signal prior to accessing the
EEPROM.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
Tested-by: Chris Healy <chris.he...@zii.aero>
Reviewed-by: Vladimir
This commit implements bindings in the eeprom_93xx46 driver allowing
device word size and read-only attributes to be specified via
devicetree.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
Tested-by: Chris Healy <chris.he...@zii.aero>
Reviewed-by: Vladimir Zapolskiy <
ee additions into a single patch.
- Clarified compatible string shall be only one of the supported values.
- Renamed the 'select-gpio' binding to 'select-gpios'.
Cory Tusar (5):
misc: eeprom_93xx46: Fix 16-bit read and write accesses.
Documentation: devicetree: Add DT bindings to eeprom_93xx46 dr
.
This commit fixes 16-bit read and write accesses by shifting the offset
parameter to account for this difference between a byte offset and a
word-based address.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
Tested-by: Chris Healy <chris.he...@zii.aero>
---
drivers/misc/eeprom/eeprom_
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 12/21/2015 07:19 PM, Vladimir Zapolskiy wrote:
>
>
> With best wishes,
> Vladimir
>
> On 10.12.2015 06:00, Cory Tusar wrote:
>> Atmel devices in this family have some quirks not found in other similar
>> chips - th
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 12/21/2015 07:12 PM, Vladimir Zapolskiy wrote:
> Hi Cory,
>
> On 10.12.2015 06:00, Cory Tusar wrote:
>> This commit implements bindings in the eeprom_93xx46 driver allowing
>> device word size and read-only attribute
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 12/21/2015 07:30 PM, Vladimir Zapolskiy wrote:
> Hi Cory,
>
> On 10.12.2015 06:00, Cory Tusar wrote:
>> This commit adds support to the eeprom_93x46 driver allowing a GPIO line
>> to function as a 'select' or 'enable' sign
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 12/21/2015 07:01 PM, Vladimir Zapolskiy wrote:
> Hi Cory,
>
> On 10.12.2015 06:00, Cory Tusar wrote:
>> This commit documents bindings to be added to the eeprom_93xx46 driver
>> which will allow:
>>
>> - Device w
implementation to support non-sequential reads for consistency with
other misc/eeprom drivers.
Tested on a custom Freescale VF610-based platform, with an AT93C46D
device attached via dspi2. The spi-gpio driver was used to allow the
necessary non-byte-sized transfers.
Signed-off-by: Cory Tusar
This commit adds support to the eeprom_93x46 driver allowing a GPIO line
to function as a 'select' or 'enable' signal prior to accessing the
EEPROM.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
Tested-by: Chris Healy <chris.he...@zii.aero>
---
drivers/misc/eeprom/eeprom_9
' signal
prior to accessing the EEPROM.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
Acked-by: Rob Herring <r...@kernel.org>
Tested-by: Chris Healy <chris.he...@zii.aero>
---
.../devicetree/bindings/misc/eeprom-93xx46.txt | 25 ++
This commit implements bindings in the eeprom_93xx46 driver allowing
device word size and read-only attributes to be specified via
devicetree.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
Tested-by: Chris Healy <chris.he...@zii.aero>
---
drivers/misc/eeprom/eeprom_9
inding to 'select-gpios'.
Cory Tusar (5):
misc: eeprom_93xx46: Fix 16-bit read and write accesses.
Documentation: devicetree: Add DT bindings to eeprom_93xx46 driver.
misc: eeprom_93xx46: Implement eeprom_93xx46 DT bindings.
misc: eeprom_93xx46: Add quirks to support Atmel AT93C46D device.
.
This commit fixes 16-bit read and write accesses by shifting the offset
parameter to account for this difference between a byte offset and a
word-based address.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
Tested-by: Chris Healy <chris.he...@zii.aero>
---
drivers/misc/eeprom/eeprom_
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/19/2015 01:05 AM, Vladimir Zapolskiy wrote:
> On 19.11.2015 05:29, Cory Tusar wrote:
>> This commit adds support to the eeprom_93x46 driver allowing a GPIO line
>> to function as a 'select' or 'enable' signal prior to accessin
.
This commit fixes 16-bit read and write accesses by shifting the offset
parameter to account for this difference between a byte offset and a
word-based address.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
drivers/misc/eeprom/eeprom_93xx46.c | 4 ++--
1 file changed, 2 insertions
This commit adds support to the eeprom_93x46 driver allowing a GPIO line
to function as a 'select' or 'enable' signal prior to accessing the
EEPROM.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
drivers/misc/eeprom/eeprom_93xx46.c | 35 +++
i
Documentation/devictree additions into a single patch.
- Clarified compatible string shall be only one of the supported values.
- Renamed the 'select-gpio' binding to 'select-gpios'.
Cory Tusar (5):
misc: eeprom_93xx46: Fix 16-bit read and write accesses.
Documentation: devicetree: Add DT bindings
' signal
prior to accessing the EEPROM.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
Acked-by: Rob Herring <r...@kernel.org>
---
.../devicetree/bindings/misc/eeprom-93xx46.txt | 25 ++
1 file changed, 25 insertions(+)
diff --git a/Documentatio
implementation to support non-sequential reads for consistency with
other misc/eeprom drivers.
Tested on a custom Freescale VF610-based platform, with an AT93C46D
device attached via dspi2. The spi-gpio driver was used to allow the
necessary non-byte-sized transfers.
Signed-off-by: Cory Tusar
This commit implements bindings in the eeprom_93xx46 driver allowing
device word size and read-only attributes to be specified via
devicetree.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
drivers/misc/eeprom/eeprom_93xx46.c | 49 +
Chao Fu <b44...@freescale.com>
> CC: Cory Tusar <cory.tu...@pid1solutions.com>
Acked-by: Cory Tusar <cory.tu...@pid1solutions.com>
> CC: Cosmin Stoica <cosminstefan.sto...@freescale.com>
> CC: Frank Li <frank...@freescale.com>
> CC: Fugang Duan <b38...
s, so relicense the vf*colibri* files to this combination.
>
> CCs were acquired using:
> git shortlog -sne --no-merges arch/arm/boot/dts/vf*colibri*
>
> CC: Bhuvanchandra DV <bhuvanchandra...@toradex.com>
> CC: Cory Tusar <cory.tu...@pid1solutions.com>
Acked-by: Co
s, so relicense the vf610-twr.dts file to this combination.
>
> CCs were acquired using (updated some email addresses):
> git shortlog -sne --no-merges arch/arm/boot/dts/vf610-cosmic.dts
>
> CC: Cory Tusar <cory.tu...@pid1solutions.com>
Acked-by: Cory Tusar <cory.tu..
s, so relicense the vf610-twr.dts file to this combination.
>
> CCs were acquired using (updated some email addresses):
> git shortlog -sne --no-merges arch/arm/boot/dts/vf610-twr.dts
>
> CC: Bill Pringlemeir <bprin...@sympatico.ca>
> CC: Chao Fu <b44..
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/21/2015 01:36 PM, Vladimir Zapolskiy wrote:
> On 21.11.2015 06:40, Cory Tusar wrote:
>> -BEGIN PGP SIGNED MESSAGE-
>> Hash: SHA1
>>
>> On 11/19/2015 12:50 AM, Vladimir Zapolskiy wrote:
>>> Hi Cory,
>
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/19/2015 12:59 AM, Vladimir Zapolskiy wrote:
> On 19.11.2015 05:29, Cory Tusar wrote:
>> Atmel devices in this family have some quirks not found in other similar
>> chips - they do not support a sequential read of the entire EEP
s...
We'd had a board which only included a device on QSPI0_B_CS0, whereas
the driver assumed that the channels would be populated in order (e.g.
QSPI0_A_CS0 first and then QSPI0_B_CS0)...that configuration was what
originally drove my changes.
- -Cory
> On Wed, Jul 08, 2015 at 04:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/19/2015 12:50 AM, Vladimir Zapolskiy wrote:
> Hi Cory,
>
> On 19.11.2015 05:29, Cory Tusar wrote:
>> This commit implements bindings in the eeprom_93xx46 driver allowing
>> device word size and read-only attribute
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/19/2015 09:00 AM, Andrew F. Davis wrote:
> On 11/18/2015 11:50 PM, Vladimir Zapolskiy wrote:
>> Hi Cory,
>>
>> On 19.11.2015 05:29, Cory Tusar wrote:
>>> This commit implements bindings in the eeprom_93xx46 driver
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/19/2015 09:59 AM, Rob Herring wrote:
> On Wed, Nov 18, 2015 at 10:29:38PM -0500, Cory Tusar wrote:
>> This commit documents bindings to be added to the eeprom_93xx46 driver
>> which will allow:
>>
>> - Device word si
Extend the existing Vybrid DSPI devicetree implementation to also
describe the dspi2 and dspi3 functional blocks.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
arch/arm/boot/dts/vfxxx.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/ar
Per the Vybrid Reference Manual (section 3.8.6.1), dspi0 has 6 chip
select signals associated with it, while dspi1 has only 4.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
arch/arm/boot/dts/vfxxx.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
This commit adds support to the eeprom_93x46 driver allowing a GPIO line
to function as a 'select' or 'enable' signal prior to accessing the
EEPROM.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
drivers/misc/eeprom/eeprom_93xx46.c | 26 ++
include
.
This commit fixes 16-bit read and write accesses by shifting the offset
parameter to account for this difference between a byte offset and a
word-based address.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
drivers/misc/eeprom/eeprom_93xx46.c | 4 ++--
1 file changed, 2 insertions
implementation to support non-sequential reads for consistency with
other misc/eeprom drivers.
Tested on a custom Freescale VF610-based platform, with an AT93C46D
device attached via dspi2. The spi-gpio driver was used to allow the
necessary non-byte-sized transfers.
Signed-off-by: Cory Tusar
' signal
prior to accessing the EEPROM.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
.../devicetree/bindings/misc/eeprom-93xx46.txt | 25 ++
1 file changed, 25 insertions(+)
diff --git a/Documentation/devicetree/bindings/misc/eeprom-93xx46.
This commit implements bindings in the eeprom_93xx46 driver allowing
device word size and read-only attributes to be specified via
devicetree.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
drivers/misc/eeprom/eeprom_93xx46.c | 62 +
.
- Clarified compatible string shall be only one of the supported values.
- Renamed the 'select-gpio' binding to 'select-gpios'.
Cory Tusar (5):
misc: eeprom_93xx46: Fix 16-bit read and write accesses.
Documentation: devicetree: Add DT bindings to eeprom_93xx46 driver.
misc: eeprom_93xx46
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/17/2015 03:59 PM, Rob Herring wrote:
> On Mon, Nov 16, 2015 at 11:16:35PM -0500, Cory Tusar wrote:
>> This commit documents an additional devicetree binding in the
>> eeprom_93x46 driver allowing a GPIO line to functi
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/17/2015 03:53 PM, Rob Herring wrote:
> On Mon, Nov 16, 2015 at 11:16:31PM -0500, Cory Tusar wrote:
>> This commit documents bindings to be added to the eeprom_93xx46 driver
>> which allow device word size and read-only attributes
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/17/2015 03:56 PM, Rob Herring wrote:
> On Mon, Nov 16, 2015 at 11:16:33PM -0500, Cory Tusar wrote:
>> This commit adds a compatible string to the eeprom_93xx46 devicetree
>> bindings in support of Atmel AT93C46D devices.
&
-based selection of the device (e.g. for use with an SPI bus
mux).
Additionally, an address aliasing issue with 16-bit read and write
accesses in the eeprom_93xx46 driver discovered during testing is fixed.
Cory Tusar (7):
misc: eeprom: 93xx46: Fix 16-bit read and write accesses.
misc: eeprom
.
This commit fixes 16-bit read and write accesses by shifting the offset
parameter to account for this difference between a byte offset and a
word-based address.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
drivers/misc/eeprom/eeprom_93xx46.c | 4 ++--
1 file changed, 2 insertions
a platform
device.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
.../devicetree/bindings/misc/eeprom-93xx46.txt | 20
1 file changed, 20 insertions(+)
diff --git a/Documentation/devicetree/bindings/misc/eeprom-93xx46.txt
b/Documentation/devicetr
This commit adds a compatible string to the eeprom_93xx46 devicetree
bindings in support of Atmel AT93C46D devices.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
Documentation/devicetree/bindings/misc/eeprom-93xx46.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
implementation to support non-sequential reads for consistency with
other misc/eeprom drivers.
Tested on a custom Freescale VF610-based platform, with an AT93C46D
device attached via dspi2. The spi-gpio driver was used to allow the
necessary non-byte-sized transfers.
Signed-off-by: Cory Tusar
This commit documents an additional devicetree binding in the
eeprom_93x46 driver allowing a GPIO line to function as a 'select'
or 'enable' signal prior to accessing the EEPROM.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
Documentation/devicetree/bindings/misc/eeprom-93xx
This commit implements bindings in the eeprom_93xx46 driver allowing
device word size and read-only attributes to be specified via
devicetree.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
drivers/misc/eeprom/eeprom_93xx46.c | 62 +
This commit adds support to the eeprom_93x46 driver allowing a GPIO line
to function as a 'select' or 'enable' signal prior to accessing the
EEPROM.
Signed-off-by: Cory Tusar <cory.tu...@pid1solutions.com>
---
drivers/misc/eeprom/eeprom_93xx46.c | 26 ++
include
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 07/09/2015 02:13 AM, Stefan Agner wrote:
On 2015-07-09 08:07, Holger Schurig wrote:
Cory Tusar (1):
ARM: dts: vfxxx: Include support for esdhc0 functionality.
arch/arm/boot/dts/vfxxx.dtsi | 11 +++
1 file changed, 11 insertions
This commit enables the qspi0 functional block, and maps the two
flash devices connected to QSPI0_A_CS0 and QSPI0_B_CS0 to individual MTD
devices.
Tested using mtd_readtest, mtd_speedtest, and mtd_stresstest on a Rev. H
TWR board.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
arch
Extend the existing Vybrid eSDHC devicetree implementation to also
describe the esdhc0 functional block.
Tested on a custom VF610-based board with a Toshiba THGBM1G5D2EBAI7 eMMC
module attached to esdhc0.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
arch/arm/boot/dts/vfxxx.dtsi
Currently, only esdhc1 is described in vfxxx.dtsi. This quick patch
adds support for esdhc0 also.
Regards,
-Cory
Cory Tusar (1):
ARM: dts: vfxxx: Include support for esdhc0 functionality.
arch/arm/boot/dts/vfxxx.dtsi | 11 +++
1 file changed, 11 insertions(+)
--
2.3.6
to QSPI0_A_CS0 and QSPI0_B_CS0. MTD tests passed
for all devices (readtest, speedtest, and stresstest), and independent
access to both devices was verified on the TWR system.
Regards,
-Cory
Changes since RFC:
- Rebased onto 4.2-rc1
- Moved the qspi1 node under aips1 where it belongs.
Cory Tusar (7):
ARM
and then configures for that frequency as part of the prepare() method
prior to accessing a given device.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
drivers/mtd/spi-nor/fsl-quadspi.c | 41 +++
1 file changed, 16 insertions(+), 25 deletions(-)
diff --git
the flash layout parsing logic and allow for non-contiguous
and non-homogeneous chip combinations.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
drivers/mtd/spi-nor/fsl-quadspi.c | 116 --
1 file changed, 60 insertions(+), 56 deletions(-)
diff --git
Both 'reg' and 'reg-names' are required properties according to binding
documentation, and both should contain two items.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
Acked-by: Stefan Agner ste...@agner.ch
---
arch/arm/boot/dts/vfxxx.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1
This commit extends the existing Vybrid QSPI devicetree implementation
to also describe the qspi1 functional block.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
Reviewed-by: Stefan Agner ste...@agner.ch
---
arch/arm/boot/dts/vfxxx.dtsi | 13 +
1 file changed, 13 insertions
Add Micron (mt25ql02gc) 256 MiB flash to the list of supported devices.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
drivers/mtd/spi-nor/spi-nor.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index d78831b
-by: Cory Tusar cory.tu...@pid1solutions.com
---
.../devicetree/bindings/mtd/fsl-quadspi.txt| 15 +-
drivers/mtd/spi-nor/fsl-quadspi.c | 166 +
2 files changed, 106 insertions(+), 75 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/fsl
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 07/02/2015 09:44 AM, Stefan Agner wrote:
On 2015-07-01 22:20, Cory Tusar wrote:
This commit extends the existing Vybrid QSPI devicetree implementation
to also describe the qspi1 functional block.
Signed-off-by: Cory Tusar cory.tu
This commit enables the qspi0 functional block, and maps the two
flash devices connected to QSPI0_A_CS0 and QSPI0_B_CS0 to individual MTD
devices.
Tested using mtd_readtest, mtd_speedtest, and mtd_stresstest on a Rev. H
TWR board.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
arch
Add Micron (mt25ql02gc) 256 MiB flash to the list of supported devices.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
drivers/mtd/spi-nor/spi-nor.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index d78831b
and then configures for that frequency as part of the prepare() method
prior to accessing a given device.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
drivers/mtd/spi-nor/fsl-quadspi.c | 41 +++
1 file changed, 16 insertions(+), 25 deletions(-)
diff --git
to QSPI0_A_CS0 and QSPI0_B_CS0. MTD tests passed
for all devices (readtest, speedtest, and stresstest), and independent
access to both devices was verified on the TWR system.
Regards,
-Cory
Cory Tusar (7):
ARM: dts: vf610: Add missing QuadSPI register mapping and names.
ARM: dts: vfxxx: Include support
-by: Cory Tusar cory.tu...@pid1solutions.com
---
.../devicetree/bindings/mtd/fsl-quadspi.txt| 15 +-
drivers/mtd/spi-nor/fsl-quadspi.c | 166 +
2 files changed, 106 insertions(+), 75 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/fsl
Both 'reg' and 'reg-names' are required properties according to binding
documentation, and both should contain two items.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
arch/arm/boot/dts/vfxxx.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot
This commit extends the existing Vybrid QSPI devicetree implementation
to also describe the qspi1 functional block.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
arch/arm/boot/dts/vfxxx.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts
the flash layout parsing logic and allow for non-contiguous
and non-homogeneous chip combinations.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
drivers/mtd/spi-nor/fsl-quadspi.c | 116 --
1 file changed, 60 insertions(+), 56 deletions(-)
diff --git
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 06/16/2015 04:50 AM, Stefan Agner wrote:
On 2015-06-15 02:19, Cory Tusar wrote:
This commit extends the existing Vybrid I2C support to cover buses i2c1,
i2c2, and i2c3. Based in (very) large part on an initial patch by
Stefan Agner
This commit extends the existing Vybrid I2C support to cover buses i2c1,
i2c2, and i2c3. Based in (very) large part on an initial patch by
Stefan Agner that was just lacking a couple of DMA assignments.
Signed-off-by: Cory Tusar cory.tu...@pid1solutions.com
---
arch/arm/boot/dts/vfxxx.dtsi | 41
This commit includes a minor nomenclature fixup for boards based on the
Freescale VF610 SoC and which make use of the alternate RMII1_RXD1
functionality for pin PTC12. This brings the macro name in-line with
both the datasheet and other similar macros.
Signed-off-by: Cory Tusar cory.tu
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