Re: [PATCH 00/10] add support SATA for BMIPS_GENERIC

On Fri, Oct 23, 2015 at 1:35 PM, Brian Norris wrote: > On Thu, Oct 22, 2015 at 09:51:30PM -0700, Florian Fainelli wrote: >> 2015-10-22 20:58 GMT-07:00 Tejun Heo : >> I think we have a bit too many compatible strings defined, I need to >> lookup

Re: [PATCH V3 3/4] ASoC: tas571x: New driver for TI TAS571x power amplifiers

On Mon, May 4, 2015 at 4:45 AM, Mark Brown broo...@kernel.org wrote: On Sun, May 03, 2015 at 05:00:18PM -0700, Kevin Cernekee wrote: + if (dev-of_node) { + const struct of_device_id *of_id; + + of_id = of_match_device(tas571x_of_match, dev

[PATCH V3 2/4] ASoC: tas571x: Add DT binding document

Document the bindings for the soon-to-be-added tas571x driver. Signed-off-by: Kevin Cernekee cerne...@chromium.org --- .../devicetree/bindings/sound/tas571x.txt | 41 ++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound

Re: [PATCH V2 1/4] regmap: cache: Add was_reset argument to regcache_sync_region()

On Sat, Apr 25, 2015 at 4:32 AM, Mark Brown broo...@kernel.org wrote: On Fri, Apr 24, 2015 at 03:36:45PM -0700, Kevin Cernekee wrote: index 116655d92269..ece122a6fdeb 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -438,7 +438,7 @@ bool regmap_can_raw_write(struct regmap

Re: [PATCH 2/3] ASoC: tas571x: New driver for TI TAS571x power amplifiers

On Fri, Apr 24, 2015 at 2:28 AM, Mark Brown broo...@kernel.org wrote: On Thu, Apr 23, 2015 at 05:47:49PM -0700, Kevin Cernekee wrote: This is mostly working OK, but regcache_sync() assumes that the hardware registers have been reset back to the default values. The pdn GPIO doesn't actually

[PATCH V2 4/4] MAINTAINERS: Add entry for tas571x ASoC codec driver

Add self as maintainer for the new driver. Signed-off-by: Kevin Cernekee cerne...@chromium.org --- MAINTAINERS | 6 ++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index ea0001760035..15153fc37cc4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9878,6 +9878,12 @@ L

[PATCH V2 3/4] ASoC: tas571x: New driver for TI TAS571x power amplifiers

Introduce a new codec driver for the Texas Instruments TAS5711/TAS5717/TAS5719 power amplifier chips. These chips are typically used to take an I2S digital audio input and drive 10-20W into a pair of speakers. Signed-off-by: Kevin Cernekee cerne...@chromium.org --- sound/soc/codecs/Kconfig

[PATCH V2 1/4] regmap: cache: Add was_reset argument to regcache_sync_region()

-by: Kevin Cernekee cerne...@chromium.org --- drivers/base/regmap/internal.h| 5 ++- drivers/base/regmap/regcache-lzo.c| 2 +- drivers/base/regmap/regcache-rbtree.c | 5 ++- drivers/base/regmap/regcache.c| 75 --- drivers/media/radio/radio-si476x.c

[PATCH V2 0/4] tas571x amplifier driver

registers that don't contain their power-on-reset values Kevin Cernekee (4): regmap: cache: Add was_reset argument to regcache_sync_region() ASoC: tas571x: Add DT binding document ASoC: tas571x: New driver for TI TAS571x power amplifiers MAINTAINERS: Add entry for tas571x ASoC codec

[PATCH V2 2/4] ASoC: tas571x: Add DT binding document

Document the bindings for the soon-to-be-added tas571x driver. Signed-off-by: Kevin Cernekee cerne...@chromium.org --- .../devicetree/bindings/sound/tas571x.txt | 41 ++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound

Re: [PATCH V2 1/4] regmap: cache: Add was_reset argument to regcache_sync_region()

On Fri, Apr 24, 2015 at 3:36 PM, Kevin Cernekee cerne...@chromium.org wrote: regcache_sync() and regcache_sync_region() currently assume that the hardware has just emerged from a clean reset, and that all registers are in their default states. But that isn't the only possibility; the device

Re: [PATCH 2/3] ASoC: tas571x: New driver for TI TAS571x power amplifiers

On Sat, Apr 18, 2015 at 9:16 AM, Kevin Cernekee cerne...@chromium.org wrote: + case SND_SOC_BIAS_OFF: + /* Note that this kills I2C accesses. */ + assert_pdn = 1; No, the GPIO set associated with it kills I2C access. I'd also expect to see the regmap being marked

Re: [alsa-devel] [PATCH 2/3] ASoC: tas571x: New driver for TI TAS571x power amplifiers

On Thu, Apr 16, 2015 at 5:57 AM, Lars-Peter Clausen l...@metafoo.de wrote: On 04/15/2015 11:42 PM, Kevin Cernekee wrote: Introduce a new codec driver for the Texas Instruments TAS5711/TAS5717/TAS5719 power amplifier chips. These chips are typically used to take an I2S digital audio input

Re: [PATCH 1/3] ASoC: tas571x: Add DT binding document

Resending from the correct account. On Sat, Apr 18, 2015 at 4:16 AM, Mark Brown broo...@kernel.org wrote: On Wed, Apr 15, 2015 at 02:42:19PM -0700, Kevin Cernekee wrote: +- VDD-supply: regulator phandle for the AVDD/DVDD/HP_VDD supply This is clearly not correct - if there are three

Re: [PATCH 1/3] ASoC: tas571x: Add DT binding document

On Sat, Apr 18, 2015 at 4:16 AM, Mark Brown broo...@kernel.org wrote: On Wed, Apr 15, 2015 at 02:42:19PM -0700, Kevin Cernekee wrote: +- VDD-supply: regulator phandle for the AVDD/DVDD/HP_VDD supply This is clearly not correct - if there are three separate physical supplies there should

Re: [PATCH 1/3] ASoC: tas571x: Add DT binding document

On Mon, Apr 20, 2015 at 3:03 PM, Mark Brown broo...@kernel.org wrote: On Mon, Apr 20, 2015 at 02:18:56PM -0700, Kevin Cernekee wrote: On Sat, Apr 18, 2015 at 4:16 AM, Mark Brown broo...@kernel.org wrote: On Wed, Apr 15, 2015 at 02:42:19PM -0700, Kevin Cernekee wrote: +- VDD-supply

Re: [PATCH 2/3] ASoC: tas571x: New driver for TI TAS571x power amplifiers

On Mon, Apr 20, 2015 at 5:21 AM, Mark Brown broo...@kernel.org wrote: On Sat, Apr 18, 2015 at 01:07:07PM -0700, Kevin Cernekee wrote: On Sat, Apr 18, 2015 at 10:11 AM, Mark Brown broo...@kernel.org wrote: Someone trying to use the atmel_wm8904 driver with something other than a wm8904

Re: [PATCH 2/3] ASoC: tas571x: New driver for TI TAS571x power amplifiers

On Sat, Apr 18, 2015 at 4:36 AM, Mark Brown broo...@kernel.org wrote: On Wed, Apr 15, 2015 at 02:42:20PM -0700, Kevin Cernekee wrote: +static int tas571x_set_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + /* + * TAS5717

Re: [PATCH 2/3] ASoC: tas571x: New driver for TI TAS571x power amplifiers

On Sat, Apr 18, 2015 at 10:11 AM, Mark Brown broo...@kernel.org wrote: On Sat, Apr 18, 2015 at 09:16:36AM -0700, Kevin Cernekee wrote: On Sat, Apr 18, 2015 at 4:36 AM, Mark Brown broo...@kernel.org wrote: +static int tas571x_set_sysclk(struct snd_soc_dai *dai

[PATCH 2/3] ASoC: tas571x: New driver for TI TAS571x power amplifiers

Introduce a new codec driver for the Texas Instruments TAS5711/TAS5717/TAS5719 power amplifier chips. These chips are typically used to take an I2S digital audio input and drive 10-20W into a pair of speakers. Signed-off-by: Kevin Cernekee cerne...@chromium.org --- sound/soc/codecs/Kconfig

[PATCH 1/3] ASoC: tas571x: Add DT binding document

Document the bindings for the soon-to-be-added tas571x driver. Signed-off-by: Kevin Cernekee cerne...@chromium.org --- .../devicetree/bindings/sound/tas571x.txt | 34 ++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound

[PATCH 3/3] MAINTAINERS: Add entry for tas571x ASoC codec driver

Add self as maintainer for the new driver. Signed-off-by: Kevin Cernekee cerne...@chromium.org --- MAINTAINERS | 6 ++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c72a7baec55c..d7d848f840d0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9847,6 +9847,12 @@ L

[PATCH V4 4/5] serial: 8250: Add support for big-endian MMIO accesses

Add cases for UPIO_MEM32BE wherever there are currently cases handling UPIO_MEM32. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- drivers/tty/serial/8250/8250_core.c | 20 drivers/tty/serial/8250/8250_early.c | 5 + 2 files changed, 25 insertions(+) diff --git

[PATCH V4 0/5] Add big-endian MMIO support to serial8250

V3-V4: Rebase on Linus' head of tree Tweak documentation per Grant's request Drop the of_earlycon patches in favor of Peter's series Kevin Cernekee (5): of: Add helper function to check MMIO register endianness of/fdt: Add endianness helper function for early init code of: Document

[PATCH V4 5/5] serial: of_serial: Support big-endian register accesses

If the device node has a big-endian property and 32-bit registers, tell the serial driver to use UPIO_MEM32BE instead of UPIO_MEM32. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- drivers/tty/serial/of_serial.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers

[PATCH V4 2/5] of/fdt: Add endianness helper function for early init code

Provide a libfdt-based equivalent for of_device_is_big_endian(), suitable for use in the early_init_* functions. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- drivers/of/fdt.c | 19 +++ include/linux/of_fdt.h | 2 ++ 2 files changed, 21 insertions(+) diff --git

[PATCH V4 1/5] of: Add helper function to check MMIO register endianness

to the contrary, so that will be our fallback. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- drivers/of/base.c | 23 +++ include/linux/of.h | 6 ++ 2 files changed, 29 insertions(+) diff --git a/drivers/of/base.c b/drivers/of/base.c index 8f165b112e03

[PATCH V4 3/5] of: Document {little,big,native}-endian bindings

These apply to newly converted drivers, like serial8250/libahci/... The examples were adapted from the regmap bindings document. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- .../devicetree/bindings/common-properties.txt | 60 ++ 1 file changed, 60 insertions

Re: [PATCH V3 5/7] serial: earlycon: Set UPIO_MEM32BE based on DT properties

On Sat, Mar 28, 2015 at 10:01 AM, Peter Hurley pe...@hurleysoftware.com wrote: I know these got ACKs already but as you point out in the commit log, earlycon _will_ need reg-io-width, reg-offset and reg-shift. Since the distinction between early_init_dt_scan_chosen_serial() and

Re: [PATCH V6 15/25] MIPS: BMIPS: Flush the readahead cache after DMA

On Wed, Mar 25, 2015 at 2:23 AM, Ralf Baechle r...@linux-mips.org wrote: On Thu, Dec 25, 2014 at 09:49:10AM -0800, Kevin Cernekee wrote: BMIPS 3300/435x/438x CPUs have a readahead cache that is separate from the L1/L2. During a DMA operation, accesses adjacent to a DMA buffer may cause parts

Re: [PATCH V3 3/7] of: Document {little,big,native}-endian bindings

On Mon, Mar 2, 2015 at 5:14 AM, Peter Hurley pe...@hurleysoftware.com wrote: On 11/24/2014 06:36 PM, Kevin Cernekee wrote: These apply to newly converted drivers, like serial8250/libahci/... The examples were adapted from the regmap bindings document. Signed-off-by: Kevin Cernekee cerne

Re: [PATCH V3 3/7] of: Document {little,big,native}-endian bindings

On Mon, Mar 2, 2015 at 8:08 AM, Peter Hurley pe...@hurleysoftware.com wrote: On 03/02/2015 09:56 AM, Kevin Cernekee wrote: On Mon, Mar 2, 2015 at 5:14 AM, Peter Hurley pe...@hurleysoftware.com wrote: On 11/24/2014 06:36 PM, Kevin Cernekee wrote: These apply to newly converted drivers, like

Re: [PATCH V3 3/7] of: Document {little,big,native}-endian bindings

On Mon, Mar 2, 2015 at 9:45 AM, Peter Hurley pe...@hurleysoftware.com wrote: This doesn't change the behavior of pre-existing drivers that implement the *-endian properties in a different way. There are not many of these drivers and they can be documented as special cases. Yeah, ok, as long

Re: [PATCH V3 0/7] serial: Configure {big,native}-endian MMIO accesses via DT

:36:15 -0800 , Kevin Cernekee cerne...@gmail.com wrote: My last submission attempted to work around serial driver coexistence problems on multiplatform kernels. Since there are still questions surrounding the best way to solve that problem, this patch series will focus

Re: [v7,2/3] i2c: iproc: Add Broadcom iProc I2C Driver

irq_of_parse_and_map(). Other than that it looks fine to me, so for all three patches in the series: Reviewed-by: Kevin Cernekee cerne...@chromium.org + iproc_i2c-irq = irq; + + ret = devm_request_irq(iproc_i2c-device, irq, bcm_iproc_i2c_isr, 0, +pdev-name

Re: [v7,2/3] i2c: iproc: Add Broadcom iProc I2C Driver

On Fri, Feb 6, 2015 at 2:48 PM, Dmitry Torokhov d...@chromium.org wrote: On Fri, Feb 6, 2015 at 2:31 PM, Kevin Cernekee cerne...@chromium.org wrote: On Mon, Jan 19, 2015 at 01:51:49PM -0800, Ray Jui wrote: + + dev_dbg(iproc_i2c-device, xfer %c, addr=0x%02x, len=%d\n, + (msg

[PATCH V6 00/25] Generic BMIPS kernel

-directories MIPS: Add dtbs_install target Brian Norris (1): irqchip: brcmstb-l2: don't clear wakeable interrupts at init time Kevin Cernekee (22): MIPS: bcm3384: Fix outdated use of mips_cpu_intc_init() MIPS: Create a common asm/mach-generic/war.h MIPS: bcm3384: Rename bcm3384 target to bmips

[PATCH V6 23/25] MIPS: BMIPS: Refresh BCM3384 DTS files

The DT bindings for this platform have changed as the bootloader and product requirements evolved. In particular, there are both Linux-on-Zephyr and Linux-on-Viper configurations. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/boot/dts/brcm/bcm3384.dtsi| 109

[PATCH V6 09/25] irqchip: bcm7120-l2: Split STB-specific logic into its own function

dedicated L1 lines - one enable/status pair (32 bits only) Much of the driver code can be shared with BCM3380-style controllers, but in order to do this cleanly, let's split out the BCM7xxx-specific logic first. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- .../interrupt-controller/brcm,bcm7120

[PATCH V6 04/25] MIPS: Create a common asm/mach-generic/war.h

11 platforms require at least one of these workarounds to be enabled; 22 platforms do not. In the latter case we can fall back to a generic version. Note that this also deletes an orphaned reference to RM9000_CDEX_SMP_WAR. Suggested-by: Arnd Bergmann a...@arndb.de Signed-off-by: Kevin Cernekee

[PATCH V6 06/25] irqchip: Update docs regarding irq_domain_add_tree()

Several drivers now use this API, including the ARM GIC driver, so remove the outdated comment. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- Documentation/IRQ-domain.txt | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/IRQ-domain.txt b/Documentation/IRQ

[PATCH V6 14/25] MIPS: Reorder MIPS_L1_CACHE_SHIFT priorities

MIPS_L1_CACHE_SHIFT_x option is selected, Kconfig sets CONFIG_MIPS_L1_CACHE_SHIFT to the highest value. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/Kconfig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 31bbec0

[PATCH V6 03/25] MIPS: Add dtbs_install target

From: Andrew Bresticker abres...@chromium.org Add the dtbs_install Makefile target to install the dtb files into $INSTALL_DTBS_PATH. Signed-off-by: Andrew Bresticker abres...@chromium.org Tested-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/Makefile | 5 + 1 file changed, 5 insertions

[PATCH V6 17/25] MIPS: BMIPS: Rewrite DMA code to use dma-ranges property

This is a more standardized way of handling DMA remapping, and it is suitable for the memory map found on BCM3384. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bmips/dma.c | 100 ++ 1 file changed, 68 insertions(+), 32 deletions

[PATCH V6 22/25] MIPS: BMIPS: Enable additional peripheral and CPU support in defconfig

Also, add an LE defconfig for set-top box (BCM7xxx). This will allow the BMIPS kernel to run on several non-BCM3384 platforms. Signed-off-by: Kevin Cernekee cerne...@gmail.com Signed-off-by: Jaedon Shin jaedon.s...@gmail.com --- arch/mips/Kconfig | 18 +-- arch/mips

[PATCH V6 25/25] MIPS: BMIPS: Add DTS files for several platforms

Most of the supported chips use legacy (non-DT) bootloaders, so they will need to select an appropriate builtin DTB at compile time until the bootloader is updated. Provide suitable DTS files, and a means to compile one of them into the kernel image. Signed-off-by: Kevin Cernekee cerne

[PATCH V6 20/25] MIPS: BMIPS: Delete the irqchip driver from irq.c

BCM3384/BCM63xx can use the common drivers/irqchip/irq-bcm7120-l2.c for this purpose; BCM7xxx will use drivers/irqchip/irq-bcm7038-l1.c. We no longer need this code under arch/mips. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- .../devicetree/bindings/mips/brcm/bcm3384-intc.txt | 37

[PATCH V6 24/25] MIPS: BMIPS: Update DT bindings to reflect new SoC support

Add an entry for each supported Broadcom SoC. Signed-off-by: Kevin Cernekee cerne...@gmail.com Signed-off-by: Jaedon Shin jaedon.s...@gmail.com --- Documentation/devicetree/bindings/mips/brcm/cm-dsl.txt | 11 --- Documentation/devicetree/bindings/mips/brcm/soc.txt| 12 2

[PATCH V6 10/25] irqchip: bcm7120-l2: Add support for BCM3380-style controllers

These controllers support multiple enable/status pairs (64+ IRQs), can put the enable/status words at different offsets, and do not support multiple parent IRQs. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- .../interrupt-controller/brcm,bcm3380-l2-intc.txt | 41 drivers

[PATCH V6 08/25] irqchip: bcm7120-l2: Refactor driver for arbitrary IRQEN/IRQSTAT offsets

. This patch changes the plumbing but doesn't yet provide a way for users to instantiate a controller with arbitrary IRQEN/IRQSTAT offsets. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- drivers/irqchip/irq-bcm7120-l2.c | 41 +++- 1 file changed, 28

[PATCH V6 21/25] MIPS: BMIPS: Use a non-default FIXADDR_TOP setting

This will be required to support BMIPS3300 platforms. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/include/asm/mach-bmips/spaces.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 arch/mips/include/asm/mach-bmips/spaces.h diff --git a/arch/mips

[PATCH V6 01/25] MIPS: bcm3384: Fix outdated use of mips_cpu_intc_init()

This function was renamed to mips_cpu_irq_of_init(), so fix it to avoid a compile error. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bcm3384/irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/bcm3384/irq.c b/arch/mips/bcm3384/irq.c index

[PATCH V6 19/25] MIPS: BMIPS: Add quirks for several Broadcom platforms

A couple of chips require special handling in order to make SMP secondary boot and/or exception vectors work correctly. Take care of these in setup.c. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bmips/setup.c | 101 +++- 1 file

[PATCH V6 07/25] irqchip: brcmstb-l2: don't clear wakeable interrupts at init time

an interrupt as soon as they call request_irq(). (This is technically already the correct development practice, but some drivers probably expect not to receive interrupts until they have performed some I/O.) Signed-off-by: Brian Norris computersforpe...@gmail.com Signed-off-by: Kevin Cernekee cerne

[PATCH V6 18/25] MIPS: BMIPS: Remove bogus bus name

There is no bcm3384 bus so let's just remove it to avoid confusion. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bmips/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/bmips/setup.c b/arch/mips/bmips/setup.c index 5099109..ac402ed 100644

[PATCH V6 15/25] MIPS: BMIPS: Flush the readahead cache after DMA

-by: Kevin Cernekee cerne...@gmail.com Signed-off-by: Jaedon Shin jaedon.s...@gmail.com --- arch/mips/mm/dma-default.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index af5f046..38ee47a 100644 --- a/arch/mips/mm/dma-default.c

[PATCH V6 16/25] MIPS: BMIPS: Document the firmware-kernel DTB interface

Add a new section covering the Generic BMIPS machine type. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- Documentation/devicetree/booting-without-of.txt | 28 + 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/booting-without-of.txt b

[PATCH V6 05/25] MIPS: bcm3384: Rename bcm3384 target to bmips

This platform is configured primarily through device tree, and we can reuse the same code to support a bunch of other chips. Change the name to reflect this. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/Kbuild.platforms | 2 +- arch/mips

[PATCH V6 12/25] MIPS: Let __dt_register_buses accept a single bus type

Some machines only have one bus type to register (e.g. simple-bus). Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/kernel/prom.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c index 452d435..e303cb1 100644

[PATCH V6 11/25] irqchip: Add new driver for BCM7038-style level 1 interrupt controllers

exists on the ARM BCM7xxx chips, but typically the ARM GIC is used instead. So this driver is primarily intended for MIPS STB chips. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- .../interrupt-controller/brcm,bcm7038-l1-intc.txt | 52 drivers/irqchip/Kconfig

[PATCH V6 02/25] MIPS: Move device-trees into vendor sub-directories

From: Andrew Bresticker abres...@chromium.org Move the MIPS device-trees into the appropriate vendor sub-directories. Signed-off-by: Andrew Bresticker abres...@chromium.org Tested-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/Makefile | 2 +- arch/mips

[PATCH V6 13/25] MIPS: Fall back to the generic restart notifier

If the machine doesn't set its own _machine_restart callback, call the common do_kernel_restart() instead. This allows arch-independent reset drivers from drivers/power/reset/ to be used to reboot the machine. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/kernel/reset.c | 2

Re: [PATCH 1/2] MIPS: Move device-trees into vendor sub-directories

On Tue, Dec 23, 2014 at 8:07 AM, Florian Fainelli f.faine...@gmail.com wrote: 2014-12-22 15:27 GMT-08:00 Andrew Bresticker abres...@chromium.org: Move the MIPS device-trees into the appropriate vendor sub-directories. Signed-off-by: Andrew Bresticker abres...@chromium.org ---

Re: [PATCH V2 1/2] MIPS: Move device-trees into vendor sub-directories

patches in the series: Tested-by: Kevin Cernekee cerne...@gmail.com -- To unsubscribe from this list: send the line unsubscribe devicetree in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

Re: [PATCH V5 13/23] MIPS: BMIPS: Flush the readahead cache after DMA

On Sat, Dec 20, 2014 at 4:44 AM, Jonas Gorski j...@openwrt.org wrote: On Sat, Dec 20, 2014 at 2:39 AM, Kevin Cernekee cerne...@gmail.com wrote: On Mon, Dec 15, 2014 at 1:43 AM, Jonas Gorski j...@openwrt.org wrote: On Fri, Dec 12, 2014 at 11:07 PM, Kevin Cernekee cerne...@gmail.com wrote: BMIPS

Re: [PATCH V5 13/23] MIPS: BMIPS: Flush the readahead cache after DMA

On Mon, Dec 15, 2014 at 1:43 AM, Jonas Gorski j...@openwrt.org wrote: On Fri, Dec 12, 2014 at 11:07 PM, Kevin Cernekee cerne...@gmail.com wrote: BMIPS 3300/435x/438x CPUs have a readahead cache that is separate from the L1/L2. During a DMA operation, accesses adjacent to a DMA buffer may

[PATCH V5 21/23] MIPS: BMIPS: Refresh BCM3384 DTS files

The DT bindings for this platform have changed as the bootloader and product requirements evolved. In particular, there are both Linux-on-Zephyr and Linux-on-Viper configurations. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/boot/dts/bcm3384.dtsi| 109

[PATCH V5 23/23] MIPS: BMIPS: Add DTS files for several platforms

Most of the supported chips use legacy (non-DT) bootloaders, so they will need to select an appropriate builtin DTB at compile time until the bootloader is updated. Provide suitable DTS files, and a means to compile one of them into the kernel image. Signed-off-by: Kevin Cernekee cerne

[PATCH V5 22/23] MIPS: BMIPS: Update DT bindings to reflect new SoC support

Add an entry for each supported Broadcom SoC. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- Documentation/devicetree/bindings/mips/brcm/cm-dsl.txt | 11 --- Documentation/devicetree/bindings/mips/brcm/soc.txt| 12 2 files changed, 12 insertions(+), 11 deletions

[PATCH V5 19/23] MIPS: BMIPS: Use a non-default FIXADDR_TOP setting

This will be required to support BMIPS3300 platforms. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/include/asm/mach-bmips/spaces.h | 18 ++ 1 file changed, 18 insertions(+) create mode 100644 arch/mips/include/asm/mach-bmips/spaces.h diff --git a/arch/mips

[PATCH V5 20/23] MIPS: BMIPS: Enable additional peripheral and CPU support in defconfig

Also, add an LE defconfig for set-top box (BCM7xxx). This will allow the BMIPS kernel to run on several non-BCM3384 platforms. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/Kconfig | 18 +-- arch/mips/configs/bmips_be_defconfig | 9 +++- arch/mips

[PATCH V5 16/23] MIPS: BMIPS: Remove bogus bus name

There is no bcm3384 bus so let's just remove it to avoid confusion. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bmips/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/bmips/setup.c b/arch/mips/bmips/setup.c index 5099109..ac402ed 100644

[PATCH V5 14/23] MIPS: BMIPS: Document the firmware-kernel DTB interface

Add a new section covering the Generic BMIPS machine type. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- Documentation/devicetree/booting-without-of.txt | 28 + 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/booting-without-of.txt b

[PATCH V5 17/23] MIPS: BMIPS: Add quirks for several Broadcom platforms

A couple of chips require special handling in order to make SMP secondary boot and/or exception vectors work correctly. Take care of these in setup.c. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bmips/setup.c | 101 +++- 1 file

[PATCH V5 18/23] MIPS: BMIPS: Delete the irqchip driver from irq.c

BCM3384/BCM63xx can use the common drivers/irqchip/irq-bcm7120-l2.c for this purpose; BCM7xxx will use drivers/irqchip/irq-bcm7038-l1.c. We no longer need this code under arch/mips. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- .../devicetree/bindings/mips/brcm/bcm3384-intc.txt | 37

[PATCH V5 15/23] MIPS: BMIPS: Rewrite DMA code to use dma-ranges property

This is a more standardized way of handling DMA remapping, and it is suitable for the memory map found on BCM3384. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bmips/dma.c | 100 ++ 1 file changed, 68 insertions(+), 32 deletions

[PATCH V5 13/23] MIPS: BMIPS: Flush the readahead cache after DMA

-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/mm/dma-default.c | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index af5f046..ee6d12c 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c @@ -18,6 +18,7

[PATCH V5 10/23] MIPS: Let __dt_register_buses accept a single bus type

Some machines only have one bus type to register (e.g. simple-bus). Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/kernel/prom.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c index 452d435..e303cb1 100644

[PATCH V5 09/23] irqchip: Add new driver for BCM7038-style level 1 interrupt controllers

exists on the ARM BCM7xxx chips, but typically the ARM GIC is used instead. So this driver is primarily intended for MIPS STB chips. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- .../interrupt-controller/brcm,bcm7038-l1-intc.txt | 52 drivers/irqchip/Kconfig

[PATCH V5 12/23] MIPS: Reorder MIPS_L1_CACHE_SHIFT priorities

MIPS_L1_CACHE_SHIFT_x option is selected, Kconfig sets CONFIG_MIPS_L1_CACHE_SHIFT to the highest value. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/Kconfig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 31bbec0

[PATCH V5 08/23] irqchip: bcm7120-l2: Add support for BCM3380-style controllers

These controllers support multiple enable/status pairs (64+ IRQs), can put the enable/status words at different offsets, and do not support multiple parent IRQs. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- .../interrupt-controller/brcm,bcm3380-l2-intc.txt | 41 drivers

[PATCH V5 06/23] irqchip: bcm7120-l2: Refactor driver for arbitrary IRQEN/IRQSTAT offsets

. This patch changes the plumbing but doesn't yet provide a way for users to instantiate a controller with arbitrary IRQEN/IRQSTAT offsets. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- drivers/irqchip/irq-bcm7120-l2.c | 41 +++- 1 file changed, 28

[PATCH V5 05/23] irqchip: brcmstb-l2: don't clear wakeable interrupts at init time

an interrupt as soon as they call request_irq(). (This is technically already the correct development practice, but some drivers probably expect not to receive interrupts until they have performed some I/O.) Signed-off-by: Brian Norris computersforpe...@gmail.com Signed-off-by: Kevin Cernekee cerne

[PATCH V5 11/23] MIPS: Fall back to the generic restart notifier

If the machine doesn't set its own _machine_restart callback, call the common do_kernel_restart() instead. This allows arch-independent reset drivers from drivers/power/reset/ to be used to reboot the machine. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/kernel/reset.c | 2

[PATCH V5 07/23] irqchip: bcm7120-l2: Split STB-specific logic into its own function

dedicated L1 lines - one enable/status pair (32 bits only) Much of the driver code can be shared with BCM3380-style controllers, but in order to do this cleanly, let's split out the BCM7xxx-specific logic first. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- .../interrupt-controller/brcm,bcm7120

[PATCH V5 03/23] MIPS: bcm3384: Rename bcm3384 target to bmips

This platform is configured primarily through device tree, and we can reuse the same code to support a bunch of other chips. Change the name to reflect this. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/Kbuild.platforms | 2 +- arch/mips

[PATCH V5 04/23] irqchip: Update docs regarding irq_domain_add_tree()

Several drivers now use this API, including the ARM GIC driver, so remove the outdated comment. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- Documentation/IRQ-domain.txt | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/IRQ-domain.txt b/Documentation/IRQ

[PATCH V5 02/23] MIPS: Create a common asm/mach-generic/war.h

11 platforms require at least one of these workarounds to be enabled; 22 platforms do not. In the latter case we can fall back to a generic version. Note that this also deletes an orphaned reference to RM9000_CDEX_SMP_WAR. Suggested-by: Arnd Bergmann a...@arndb.de Signed-off-by: Kevin Cernekee

[PATCH V5 00/23] Generic BMIPS kernel

in other subsystems (like the native-endian serial8250/DT patches). For 3.19 you'll want the first patch at the minimum (because the build is currently broken). Brian Norris (1): irqchip: brcmstb-l2: don't clear wakeable interrupts at init time Kevin Cernekee (22): MIPS: bcm3384: Fix outdated use

[PATCH V5 01/23] MIPS: bcm3384: Fix outdated use of mips_cpu_intc_init()

This function was renamed to mips_cpu_irq_of_init(), so fix it to avoid a compile error. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/bcm3384/irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/bcm3384/irq.c b/arch/mips/bcm3384/irq.c index

Re: [PATCH V4 08/16] irqchip: Add new driver for BCM7038-style level 1 interrupt controllers

On Mon, Dec 1, 2014 at 8:09 AM, Jonas Gorski j...@openwrt.org wrote: I'm not that firm in interrupt controller terminology, but can this be a level 1 interrupt controller if it has a parent interrupt controller? Isn't the parent the level 1 interrupt controller? Or would the parent then be a

[PATCH 1/2] m32r: Fix ioread8 definition

This should be readb(), not read(). Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/m32r/include/asm/io.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/m32r/include/asm/io.h b/arch/m32r/include/asm/io.h index 4010f1f..343ae4c 100644 --- a/arch/m32r/include

[PATCH 2/2] m32r: Add missing big-endian I/O accessors

declaration of function 'ioread32be' [-Werror=implicit-function-declaration] return ioread32be(p-membase + offset); ^ cc1: some warnings being treated as errors Compile-tested only. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/m32r/include/asm/io.h | 6 ++ 1 file changed

[PATCH V2 1/2] m32r: Fix ioread8 definition

This should be readb(), not read(). Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/m32r/include/asm/io.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/m32r/include/asm/io.h b/arch/m32r/include/asm/io.h index 4010f1f..343ae4c 100644 --- a/arch/m32r/include

[PATCH V2 2/2] m32r: Add missing big-endian I/O accessors

declaration of function 'ioread32be' [-Werror=implicit-function-declaration] return ioread32be(p-membase + offset); ^ cc1: some warnings being treated as errors Compile-tested only. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- arch/m32r/include/asm/io.h | 6 ++ 1 file changed

[PATCH V4 02/16] irqchip: brcmstb-l2: don't clear wakeable interrupts at init time

an interrupt as soon as they call request_irq(). (This is technically already the correct development practice, but some drivers probably expect not to receive interrupts until they have performed some I/O.) Signed-off-by: Brian Norris computersforpe...@gmail.com Signed-off-by: Kevin Cernekee cerne

[PATCH V4 16/16] MIPS: BMIPS: Add DTS files for several platforms

Most of the supported chips use legacy (non-DT) bootloaders, so they will need to select an appropriate builtin DTB at compile time until the bootloader is updated. Provide suitable DTS files, and a means to compile one of them into the kernel image. Signed-off-by: Kevin Cernekee cerne

[PATCH V4 14/16] MIPS: BMIPS: Document the firmware-kernel DTB interface

Add a new section covering the Generic BMIPS machine type. Signed-off-by: Kevin Cernekee cerne...@gmail.com --- Documentation/devicetree/booting-without-of.txt | 28 + 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/booting-without-of.txt b

[PATCH V4 12/16] MIPS: Create a common asm/mach-generic/war.h

11 platforms require at least one of these workarounds to be enabled; 22 platforms do not. In the latter case we can fall back to a generic version. Note that this also deletes an orphaned reference to RM9000_CDEX_SMP_WAR. Suggested-by: Arnd Bergmann a...@arndb.de Signed-off-by: Kevin Cernekee

[PATCH V4 13/16] MIPS: BMIPS: Flush the readahead cache after DMA

-by: Kevin Cernekee cerne...@gmail.com --- arch/mips/mm/dma-default.c | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index af5f046e627e..ee6d12cb7588 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c

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