Re: [PATCH v3 1/5] spi: introduce mmap read support for spi flash devices

2015-11-13 Thread Mike Looijmans
could go one step further and implement a generic DMA-through-mmap access to QSPI flash. Mike. Kind regards, Mike Looijmans System Expert TOPIC Embedded Products Eindhovenseweg 32-C, NL-5683 KH Best Postbus 440, NL-5680 AK Best Telefoon: +31 (0) 499 33 69 79 Telefax: +31 (0) 499 33 69 70 E

Re: [PATCH 3/3] fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000

2015-10-12 Thread Mike Looijmans
t reason. Using the "bin" format in the driver keeps it simple and singular. Userspace tools can add whatever wrappers and headers they feel appropriate to it, these checks don't belong in the driver since they will be application specific. For example, some users would want to verify that

Re: [PATCH 3/3] fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000

2015-10-12 Thread Mike Looijmans
On 12-10-15 14:38, Michal Simek wrote: Hi Mike, On 10/12/2015 02:22 PM, Mike Looijmans wrote: On 12-10-15 13:16, Michal Simek wrote: +static int zynq_fpga_ops_write(struct fpga_manager *mgr, +const char *buf, size_t count) +{ + struct zynq_fpga_priv *priv

Re: [PATCH v2] Add driver for the si514 clock generator chip

2015-10-02 Thread Mike Looijmans
On 02-10-15 01:34, Stephen Boyd wrote: On 09/17, Mike Looijmans wrote: This patch adds the driver and devicetree documentation for the Silicon Labs SI514 clock generator chip. This is an I2C controlled oscilator capable of generating clock signals ranging from 100kHz s/oscilator/oscillator

[PATCH v3] Add driver for the si514 clock generator chip

2015-10-02 Thread Mike Looijmans
This patch adds the driver and devicetree documentation for the Silicon Labs SI514 clock generator chip. This is an I2C controlled oscillator capable of generating clock signals ranging from 100kHz to 250MHz. Signed-off-by: Mike Looijmans <mike.looijm...@topic.nl> --- v3: After revie

[PATCH] Add driver for the si514 clock generator chip

2015-09-17 Thread Mike Looijmans
This patch adds the driver and devicetree documentation for the Silicon Labs SI514 clock generator chip. This is an I2C controlled oscilator capable of generating clock signals ranging from 100kHz to 250MHz. Signed-off-by: Mike Looijmans <mike.looijm...@topic.nl> --- .../devicetree/bi

[PATCH v2] Add driver for the si514 clock generator chip

2015-09-17 Thread Mike Looijmans
This patch adds the driver and devicetree documentation for the Silicon Labs SI514 clock generator chip. This is an I2C controlled oscilator capable of generating clock signals ranging from 100kHz to 250MHz. Signed-off-by: Mike Looijmans <mike.looijm...@topic.nl> --- v2: Fix e-mail addres

Re: [RFC] improve binding for linux,wdt-gpio

2015-07-30 Thread Mike Looijmans
. ... Kind regards, Mike Looijmans System Expert TOPIC Embedded Products Eindhovenseweg 32-C, NL-5683 KH Best Postbus 440, NL-5680 AK Best Telefoon: +31 (0) 499 33 69 79 Telefax: +31 (0) 499 33 69 70 E-mail: mike.looijm...@topicproducts.com Website: www.topicproducts.com Please consider

[PATCH v4] Add TI CDCE925 I2C controlled clock synthesizer driver

2015-06-02 Thread Mike Looijmans
and Y3 derive from PLL1 Y4 and Y5 derive from PLL2 Given a target output frequency, the driver will set the PLL and divider to best approximate the desired output. Signed-off-by: Mike Looijmans mike.looijm...@topic.nl --- v2: Coding style check Add devicetree binding documentation v3: Remove clk

Re: [PATCH v3] Add TI CDCE925 I2C controlled clock synthesizer driver

2015-06-02 Thread Mike Looijmans
On 02-06-15 09:50, Paul Bolle wrote: On Mon, 2015-06-01 at 12:13 +0200, Mike Looijmans wrote: --- /dev/null +++ b/drivers/clk/clk-cdce925.c +static int cdce925_regmap_i2c_write( + void *context, const void *data, size_t count) + dev_dbg(i2c-dev, %s(%u) %#x %#x\n, __func__

Re: [PATCH v3] Add TI CDCE925 I2C controlled clock synthesizer driver

2015-06-02 Thread Mike Looijmans
On 02-06-15 09:50, Paul Bolle wrote: On Mon, 2015-06-01 at 12:13 +0200, Mike Looijmans wrote: --- /dev/null +++ b/drivers/clk/clk-cdce925.c +static int cdce925_regmap_i2c_write( + void *context, const void *data, size_t count) + dev_dbg(i2c-dev, %s(%u) %#x %#x\n, __func__

[PATCH v3] Add TI CDCE925 I2C controlled clock synthesizer driver

2015-06-01 Thread Mike Looijmans
and Y3 derive from PLL1 Y4 and Y5 derive from PLL2 Given a target output frequency, the driver will set the PLL and divider to best approximate the desired output. Signed-off-by: Mike Looijmans mike.looijm...@topic.nl --- v2: Coding style check Add devicetree binding documentation v3: Remove clk

Re: [PATCH v2] Add TI CDCE925 I2C controlled clock synthesizer driver

2015-05-29 Thread Mike Looijmans
On 28-05-15 23:48, Michael Turquette wrote: Hi Mike, Quoting Mike Looijmans (2014-12-03 23:26:15) This driver supports the TI CDCE925 programmable clock synthesizer. The chip contains two PLLs with spread-spectrum clocking support and five output dividers. The driver only supports

Re: [PATCH v2] Add TI CDCE925 I2C controlled clock synthesizer driver

2015-03-10 Thread Mike Looijmans
On 12-01-15 04:04, Mike Turquette wrote: On Thu, Jan 8, 2015 at 11:01 PM, Mike Looijmans mike.looijm...@topic.nl wrote: Just a ping to inform if you've had had time to look at this? Its in the queue for review this week. A lot to catch up on after the holidays. Thanks for the ping. Just

Re: [PATCH v2] Add TI CDCE925 I2C controlled clock synthesizer driver

2015-01-08 Thread Mike Looijmans
Just a ping to inform if you've had had time to look at this? Mike. On 12/04/2014 08:26 AM, Mike Looijmans wrote: This driver supports the TI CDCE925 programmable clock synthesizer. The chip contains two PLLs with spread-spectrum clocking support and five output dividers. The driver only

Re: [PATCH v2] Add TI CDCE925 I2C controlled clock synthesizer driver

2014-12-09 Thread Mike Looijmans
Just a ping to ask for attention. Anyone care to review, comment or otherwise provide some feedback? On 12/04/2014 08:26 AM, Mike Looijmans wrote: This driver supports the TI CDCE925 programmable clock synthesizer. The chip contains two PLLs with spread-spectrum clocking support and five

[PATCH v2] Add TI CDCE925 I2C controlled clock synthesizer driver

2014-12-04 Thread Mike Looijmans
and Y3 derive from PLL1 Y4 and Y5 derive from PLL2 Given a target output frequency, the driver will set the PLL and divider to best approximate the desired output. Signed-off-by: Mike Looijmans mike.looijm...@topic.nl --- v2: Coding style check Add devicetree binding documentation

[PATCH] Add devicetree binding documentation for the LTC2941/LTC2943 driver

2014-10-28 Thread Mike Looijmans
This adds the devicetree binding documentation for the LTC2941 and LTC2943 driver. These are I2C connected battery gas gauge ICs. Signed-off-by: Mike Looijmans mike.looijm...@topic.nl --- .../devicetree/bindings/power/ltc2941.txt | 27 1 file changed, 27

Re: [PATCH v2 2/5] ARM: zynq: dt: Convert to preprocessor includes

2014-04-07 Thread Mike Looijmans
writing these DTS by hand which is not our case - at least for majority of our customers. I write them by hand. Is there any other way? Mike. Met vriendelijke groet / kind regards, Mike Looijmans TOPIC Embedded Systems Eindhovenseweg 32-C, NL-5683 KH Best Postbus 440, NL-5680 AK Best Telefoon

Re: [PATCH v2] mmc: sdhci: add quirk for broken write protect detection

2014-03-20 Thread Mike Looijmans
is SD0_WP_CD_SEL, and 0x002E sets CD to pin 46 and WP to pin 0, not to EMIO as I specified in the design. Eli: Maybe you have the same issue as Mike. Can you please check it? Met vriendelijke groet / kind regards, Mike Looijmans TOPIC Embedded Systems Eindhovenseweg 32-C, NL-5683 KH

Re: [PATCH v2] mmc: sdhci: add quirk for broken write protect detection

2014-03-06 Thread Mike Looijmans
logic level the wp happens to think it's wired. I just want to be able to tell the driver that the WP line is free-floating-and-might-have-any-random-value-at-any-given-moment which is a bit long, so I'd go for disable-wp instead. Mike. Met vriendelijke groet / kind regards, Mike Looijmans

[PATCH] sdhci: Add a quirk to disable write-protect

2014-02-23 Thread Mike Looijmans
When a board does not have the WP line wired at all, the card may be detected as read-only. Add a quirk and a device property to disable WP detection. Signed-off-by: Mike Looijmans mike.looijm...@topic.nl --- drivers/mmc/host/sdhci-pltfm.c |3 +++ drivers/mmc/host/sdhci.c |3