On 12/10/2015 3:38 PM, Rob Herring wrote:
diff --git a/MAINTAINERS b/MAINTAINERS
index 69c8a9c..415b731 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
[..]
@@ -1202,6 +1209,7 @@ M:Santosh Shilimkar
L:linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
S
On 11/23/2015 8:54 AM, Murali Karicheri wrote:
Currently kernel crash randomly when K2L EVM is booted without
clk_ignore_unused in the bootargs. This workaround is not needed
on other K2 devices such as K2HK and K2E and with this fix, we can
remove the workaround altogether. netcp driver on K2L u
On 10/15/2015 9:02 AM, Murali Karicheri wrote:
On 10/14/2015 11:41 AM, santosh shilimkar wrote:
10/14/2015 7:17 AM, Murali Karicheri wrote:
This patch series enable accumulator queue support for K2 SoCs.
Accumulator
queues are a type of qmss queue that is monitored by the PDSP firmware
and
10/14/2015 7:17 AM, Murali Karicheri wrote:
This patch series enable accumulator queue support for K2 SoCs. Accumulator
queues are a type of qmss queue that is monitored by the PDSP firmware and
accumulated. Host is interrupted by PDSP firmware when packets become
available in a ring buffer share
On 10/13/2015 9:14 AM, Murali Karicheri wrote:
Santosh,
On 10/13/2015 12:01 PM, santosh shilimkar wrote:
On 10/13/2015 6:56 AM, Murali Karicheri wrote:
On 10/12/2015 03:46 PM, Murali Karicheri wrote:
This patch series enable accumulator queue support for K2 SoCs.
Santosh, Arnd,
Could you
On 10/13/2015 6:56 AM, Murali Karicheri wrote:
On 10/12/2015 03:46 PM, Murali Karicheri wrote:
This patch series enable accumulator queue support for K2 SoCs.
Santosh, Arnd,
Could you please review and let me know if there is any comment. If
looks good, could you please merge to v4.4 next br
Nishant,
On 9/25/2015 10:38 AM, Nishanth Menon wrote:
On 09/25/2015 11:15 AM, santosh shilimkar wrote:
9/25/2015 9:01 AM, Nishanth Menon wrote:
[..]
Please refresh the series commit messages based on the
discussion so far and repost. Will pick it up then.
Thanks. I will do so (probably
9/25/2015 9:01 AM, Nishanth Menon wrote:
On 09/25/2015 10:18 AM, santosh shilimkar wrote:
On 9/25/2015 7:50 AM, Nishanth Menon wrote:
[...]
But, how about userspace
needing to know which SoC they are on, without needing to depend on
board->soc mapping? How do we help resolve that?
Why
On 9/25/2015 7:50 AM, Nishanth Menon wrote:
On 09/24/2015 10:54 AM, Murali Karicheri wrote:
[...]
ti,omap3 is the family of omap3 devices similar to keystone. ti,omap3450
is required if there is an exceptional treatment required for ti,omap3450.
In keystone case so far there is no case of excep
Nishant,
On 9/22/2015 9:08 AM, Nishanth Menon wrote:
Keystone2 devices are used on more platforms than just Texas
Instruments reference evaluation platforms called EVMs. Providing a
generic compatible "ti,keystone" is not sufficient to differentiate
various SoC definitions possible on various pl
On 9/16/2015 10:01 AM, Murali Karicheri wrote:
On 09/15/2015 05:20 PM, santosh shilimkar wrote:
On 9/15/2015 11:14 AM, Murali Karicheri wrote:
On 09/09/2015 12:38 PM, Murali Karicheri wrote:
[..]
Santosh,
I have checked v4.3-rc1 and I don't see it. Did you send the pull
request?
The
On 9/15/2015 11:14 AM, Murali Karicheri wrote:
On 09/09/2015 12:38 PM, Murali Karicheri wrote:
On 09/04/2015 11:53 PM, santosh.shilim...@oracle.com wrote:
On 9/4/15 5:46 PM, Murali Karicheri wrote:
To help the user, print the PDSP file name as part of
knav_queue_load_pdsp(). This will be usefu
9/2/2015 10:58 AM, Murali Karicheri wrote:
On 09/02/2015 01:24 PM, santosh shilimkar wrote:
On 9/2/2015 9:35 AM, Murali Karicheri wrote:
Santosh,
---Cut---
I suspected the same. I know back then we started with SERDES code
with NETCP but as you already know, its a separate
On 9/2/2015 9:35 AM, Murali Karicheri wrote:
Santosh,
On 09/02/2015 11:50 AM, santosh shilimkar wrote:
On 9/2/2015 8:31 AM, Kwok, WingMan wrote:
-Original Message-
From: santosh.shilim...@oracle.com
[mailto:santosh.shilim...@oracle.com]
Sent: Tuesday, September 01, 2015 5:19 PM
To
On 9/2/2015 8:31 AM, Kwok, WingMan wrote:
-Original Message-
From: santosh.shilim...@oracle.com [mailto:santosh.shilim...@oracle.com]
Sent: Tuesday, September 01, 2015 5:19 PM
To: Kwok, WingMan; robh...@kernel.org; pawel.m...@arm.com;
mark.rutl...@arm.com; ijc+devicet...@hellion.org.uk
On 8/24/2015 6:36 AM, Franklin S Cooper Jr. wrote:
Hi Santosh,
All the patches except this one are in linux-next.
Yes I noticed it. I will queue this up for next merge window.
Thanks for reminder.
Regards,
Santosh
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On 7/31/2015 7:20 AM, Murali Karicheri wrote:
On 05/29/2015 12:04 PM, Murali Karicheri wrote:
All of the keystone devices have a separate register to hold post
divider value for main pll clock. Currently the fixed-postdiv
value used for k2hk/l/e SoCs works by sheer luck as u-boot happens to
use
fixed-postdiv
value used for k2hk/l/e SoCs works by sheer luck as u-boot happens to
use a value of 2 for this. Now that we have fixed this in the pll
clock driver change the dt bindings for the same.
Signed-off-by: Murali Karicheri
---
Acked-by: Santosh Shilimkar
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To unsubscribe from this list
On 7/22/2015 5:32 AM, Franklin S Cooper Jr wrote:
Add ti,keystone-spi to the compatible field for the SPI node. This new
entry insures that the proper prescaler limit is used for keystone devices
Signed-off-by: Franklin S Cooper Jr
---
Once the binding and driver makes it, I can pick this up.
On 7/1/2015 6:05 AM, Vitaly Andrianov wrote:
On 07/01/2015 08:41 AM, Mark Rutland wrote:
On Wed, Jul 01, 2015 at 01:13:04PM +0100, Vitaly Andrianov wrote:
This commit adds definition for cpu_on, cpu_off and cpu_suspend
commands.
These definitions must match the corresponding PSCI definitions
On 6/25/2015 2:02 PM, Stephen Boyd wrote:
On 06/25/2015 08:04 AM, santosh shilimkar wrote:
On 6/25/2015 7:31 AM, Vitaly Andrianov wrote:
This patch series adds support for arm L1/L2 ecc and ddr3 ecc error
handling
for Keystone devices
Change Log
v2:
- removing unused and sorting headers of
On 6/25/2015 7:31 AM, Vitaly Andrianov wrote:
This patch series adds support for arm L1/L2 ecc and ddr3 ecc error handling
for Keystone devices
Change Log
v2:
- removing unused and sorting headers of keystone.c are moved to a separate
patch.
- l1l2 ecc and ddr3 ecc error handling are split i
On 6/18/2015 3:37 PM, Michael Turquette wrote:
Quoting Murali Karicheri (2015-05-29 09:04:12)
Main PLL controller has post divider bits in a separate register in
pll controller. Use the value from this register instead of fixed
divider when available.
Signed-off-by: Murali Karicheri
Applied
On 11/26/2014 12:49 AM, Viresh Kumar wrote:
Fixing Santosh's email id as he switched employer ..
Yeah I did ;-)
On 26 November 2014 at 14:16, Viresh Kumar wrote:
DT based cpufreq drivers doesn't require much support from platform code now a
days as most of the stuff is moved behind generic
Grygorii,
On 11/25/2014 6:53 AM, Grygorii Strashko wrote:
Hi Russell,
On 11/25/2014 04:04 PM, Russell King - ARM Linux wrote:
On Tue, Nov 25, 2014 at 03:30:20PM +0200, Grygorii Strashko wrote:
On 11/25/2014 02:09 PM, Arnd Bergmann wrote:
It might be possible to do this implicitly if the driv
On 10/29/2014 1:28 PM, Murali Karicheri wrote:
v2: Some more minor edits based on comments
Thanks for quick update. I will queue these up as
mentioned.
Regards,
Santosh
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Santosh.
CC: Santosh Shilimkar
CC: Greg Kroah-Hartman
CC: Rob Herring
CC: Pawel Moll
CC: Mark Rutland
CC: Ian Campbell
CC: Kumar Gala
CC: Russell King
CC: devicetree@vger.kernel.org
Murali Karicheri (4):
ARM: keystone: add pcie related options
ARM: keystone: defconfig: add options to
On 10/29/2014 09:45 AM, Murali Karicheri wrote:
K2E SoC has a second PCI port based on Synopsis Designware PCIe h/w.
Add DT bindings to support PCI controller for port 1 for this SoC.
Signed-off-by: Murali Karicheri
CC: Santosh Shilimkar
CC: Rob Herring
CC: Pawel Moll
CC: Mark Rutland
CC
On 10/29/2014 09:45 AM, Murali Karicheri wrote:
Add common DT bindings to support PCI controller driver for port 0 on all of
the K2 SoCs that has Synopsis Designware based pcie h/w.
Signed-off-by: Murali Karicheri
CC: Santosh Shilimkar
CC: Rob Herring
CC: Pawel Moll
CC: Mark Rutland
CC
/lkml/2014/10/20/248
v1: https://lkml.org/lkml/2014/9/29/382
[1] "[PATCH/RFC 0/4] of: Register clocks for Runtime PM with PM core"
https://lkml.org/lkml/2014/4/24/1118
[2] "[RFC PATCH 0/4] ARM: keystone: pm: switch to use generic pm domains"
https://lkml.org/lkml/2014/9
On 10/22/2014 08:58 AM, Kevin Hilman wrote:
Grygorii Strashko writes:
Hi Santosh,
On 10/21/2014 09:05 PM, Santosh Shilimkar wrote:
On 10/20/2014 05:56 AM, Grygorii Strashko wrote:
This patch switches Keystone 2 PM code to use Generic PM domains
instead of PM clock domains because of the
On 10/20/2014 05:56 AM, Grygorii Strashko wrote:
This patch switches Keystone 2 PM code to use Generic PM domains
instead of PM clock domains because of the lack of DT support
for the last.
Reviewed-by: Kevin Hilman
Signed-off-by: Grygorii Strashko
---
.../bindings/power/ti,keystone-powerdom
Kevin, Rafael,
On 10/20/2014 05:56 AM, Grygorii Strashko wrote:
From: Geert Uytterhoeven
The existing pm_clk_add() allows to pass a clock by con_id. However,
when referring to a specific clock from DT, no con_id is available.
Add pm_clk_add_clk(), which allows to specify the struct clk * dire
On Monday 29 September 2014 10:38 AM, Grygorii Strashko wrote:
> Attach Keystone 2s nodes for NetCP, NetCPx, QMSS, KNAV-DMA devices
> to the TI Keystone 2 Generic PM Controller.
>
> Signed-off-by: Grygorii Strashko
> ---
> arch/arm/boot/dts/k2hk-evm.dts | 7 +++
> 1 file changed, 7 insertion
On Monday 29 September 2014 10:38 AM, Grygorii Strashko wrote:
> This patch switches Keystone 2 PM code to use Generic PM domains
> instead of PM clock domains because of the lack of DT support
> for the last.
>
> Signed-off-by: Grygorii Strashko
> ---
> .../devicetree/bindings/power/ti,keystone
On Wednesday 01 October 2014 06:37 AM, Grygorii Strashko wrote:
> Hi Snatosh,
>
> This small set of DTS fixes for Keystone 2 SoCs, which
> I've done while testing kernel boot on linux-next (3.18).
>
> Grygorii Strashko (4):
> ARM: dts: keystone: fix io range for usb_phy
> ARM: dts: keystone-k
On Monday 29 September 2014 04:12 PM, David Miller wrote:
> From: Santosh Shilimkar
> Date: Mon, 29 Sep 2014 16:02:24 -0400
>
>> We are badly missing mainline network driver support for the Keystone
>> and hence I request you to help here.
>
> It is absolutely no
On Monday 29 September 2014 03:52 PM, David Miller wrote:
> From: Santosh Shilimkar
> Date: Thu, 25 Sep 2014 13:48:36 -0400
>
>> +static inline int gbe_phy_link_status(struct gbe_slave *slave)
>> +{
>> +if (!slave->phy)
>> +return
From: Sandeep Nair
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
MAINTAINERS |7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index aefa948..4821dcf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9117,6 +9117,13 @@ F: drivers
|-> Ethernet Port 3
Common driver supports GBE as well XGBE network processors.
Cc: Rob Herring
Cc: Grant Likely
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: David Miller
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
v4->v5
Sorry to spin v5 quickly but I missed few check-patch warnings which
were pointed by Joe Perches(thanks). I folded his changes [5] along with
few more check-patch warning fixes. I would like get this in for v3.18
merge window if David is happy with this version.
v3->v4
Couple of fixes in in
On Thursday 25 September 2014 10:29 AM, Joe Perches wrote:
> On Thu, 2014-09-25 at 10:03 -0400, Santosh Shilimkar wrote:
>> From: Sandeep Nair
>>
>> The network coprocessor (NetCP) is a hardware accelerator that processes
>> Ethernet packets. NetCP has a gigabit Ethe
From: Sandeep Nair
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
MAINTAINERS |7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index aefa948..4821dcf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9117,6 +9117,13 @@ F: drivers
|-> Ethernet Port 3
Common driver supports GBE as well XGBE network processors.
Cc: Rob Herring
Cc: Grant Likely
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: David Miller
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
v3->v4
Couple of fixes in in error path as pointed [4] out by David. Rest of
the patches are unchanged from v3. I would like get this in for v3.18
merge window if David is happy with this version.
v2->v3
Update v3 after incorporating Jamal and David Miller'scomment/suggestion
from earlier versions
On Wednesday 24 September 2014 04:43 PM, David Miller wrote:
> From: Santosh Shilimkar
> Date: Wed, 24 Sep 2014 15:51:15 -0400
>
>> Here is an updated version with above fixed. Not posting the entire
>> series again since its just small update on the patch.
>
>
|-> Ethernet Port 3
Common driver supports GBE as well XGBE network processors.
Cc: Rob Herring
Cc: Grant Likely
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: David Miller
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
From: Sandeep Nair
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
MAINTAINERS |6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 134483f..7b1c41d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9038,6 +9038,12 @@ F: drivers
Update v3 after incorporating Jamal and David Miller's comment/suggestion
from earlier versions [1] [2]. I would like to get these merged for upcoming
3.18 merge window if there are no concerns on this version.
After per the discussion here [3], the controversial custom exports have
been dropped n
On Thursday 11 September 2014 06:07 PM, Doug Anderson wrote:
> Santosh,
>
> On Thu, Sep 11, 2014 at 2:31 PM, Santosh Shilimkar
> wrote:
>>> +Required properties:
>>> +- compatible: should be one of:
>>> + - "rockchip,rk3188-iodomain" for rk31
On Thursday 11 September 2014 05:00 PM, Doug Anderson wrote:
> From: Heiko Stübner
>
> IO domain voltages on some Rockchip SoCs are variable but need to be
> kept in sync between the regulators and the SoC using a special
> register.
>
> A specific example using rk3288:
> - If the regulator hook
On Thursday 11 September 2014 11:40 AM, Murali Karicheri wrote:
> Fix incorrect clock names for usb1, pcie1 and domain register
> offset for pcie1 clock nodes on K2E EVM
>
> Signed-off-by: Murali Karicheri
> ---
Thanks Murali. I will queue this up.
> arch/arm/boot/dts/k2e-clocks.dtsi |6 +++
Dave,
On Monday 08 September 2014 10:41 AM, Santosh Shilimkar wrote:
> Hi Dave,
>
> On 8/22/14 3:45 PM, Santosh Shilimkar wrote:
>> Hi David,
>>
>> On Thursday 21 August 2014 07:36 PM, David Miller wrote:
>>> From: Santosh Shilimkar
>>> Date: Fr
On Wednesday 10 September 2014 07:33 AM, Jamal Hadi Salim wrote:
> On 09/09/14 11:19, Santosh Shilimkar wrote:
>
>> All the documentation is open including packet accelerator offload
>> in ti.com.
>
> Very nice.
> Would you do me a kindness and point to the switch int
On Tuesday 09 September 2014 07:44 AM, Jamal Hadi Salim wrote:
> On 09/08/14 10:41, Santosh Shilimkar wrote:
>
>>> The NetCP plugin module infrastructure use all the standard kernel
>>> infrastructure and its very tiny.
>
> So i found this manual here:
>
Hi Dave,
On 8/22/14 3:45 PM, Santosh Shilimkar wrote:
Hi David,
On Thursday 21 August 2014 07:36 PM, David Miller wrote:
From: Santosh Shilimkar
Date: Fri, 15 Aug 2014 11:12:39 -0400
Update version after incorporating David Miller's comment from earlier
posting [1]. I would like t
On Thursday 28 August 2014 03:36 PM, Doug Anderson wrote:
> These two patches add support for automatically configuring the IO
> voltage domains on rk3188 and rk3288 SoCs. The first patch adds some
> new notification types to the regulator code. It's used by the second
> patch which actually impl
On Thursday 21 August 2014 10:48 PM, Stephen Hemminger wrote:
> On Fri, 15 Aug 2014 11:12:41 -0400
> Santosh Shilimkar wrote:
>
>> NetCP driver has a plug-in module architecture where each of the NetCP
>> sub-modules exist as a loadable kernel module which plug in to the net
Hi David,
On Thursday 21 August 2014 07:36 PM, David Miller wrote:
> From: Santosh Shilimkar
> Date: Fri, 15 Aug 2014 11:12:39 -0400
>
>> Update version after incorporating David Miller's comment from earlier
>> posting [1]. I would like to get these merged for upcomi
|-> Ethernet Port 3
Common driver supports GBE as well XGBE network processors.
Cc: Rob Herring
Cc: Grant Likely
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: David Miller
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
From: Sandeep Nair
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
MAINTAINERS |6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 134483f..7b1c41d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9038,6 +9038,12 @@ F: drivers
Update version after incorporating David Miller's comment from earlier
posting [1]. I would like to get these merged for upcoming 3.18 merge
window if there are no concerns on this version.
The network coprocessor (NetCP) is a hardware accelerator that processes
Ethernet packets. NetCP has a gigab
Bergmann
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
firmware/Makefile |1 +
.../keystone/qmss_pdsp_acc48_k2_le_1_0_0_8.fw.ihex | 110
2 files changed, 111 insertions(+)
create mode 100644 firmware/keystone
rring
Cc: Mark Rutland
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
.../bindings/soc/ti/keystone-navigator-dma.txt | 111
1 file changed, 111 insertions(+)
create mode 100644
Documentation/devicetree/bindings/soc/ti/keystone-navigator-dma.txt
Navigator QMSS driver
Santosh Shilimkar (3):
Documentation: dt: soc: add Keystone Navigator DMA bindings
soc: ti: add Keystone Navigator DMA support
MAINTAINERS: Add Keystone Multicore Navigator drivers entry
.../bindings/soc/ti/keystone-navigator-dma.txt | 111 ++
.../bindings/
rring
Cc: Mark Rutland
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
drivers/soc/ti/Kconfig | 10 +
drivers/soc/ti/Makefile |1 +
drivers/soc/ti/knav_dma.c | 813 +++
include/linux/soc/ti/knav_dma.h |
Signed-off-by: Santosh Shilimkar
---
MAINTAINERS |9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c2066f4..e5b1179 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9051,6 +9051,15 @@ F: drivers/misc/tifm*
F: drivers/mmc/host/tifm_sd.c
F
Rutland
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
drivers/Kconfig |2 +
drivers/soc/Kconfig |1 +
drivers/soc/Makefile |1 +
drivers/soc/ti/Kconfig | 21 +
drivers/soc/ti/Makefile |4 +
drivers/soc
Rutland
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
.../bindings/soc/ti/keystone-navigator-qmss.txt| 232
1 file changed, 232 insertions(+)
create mode 100644
Documentation/devicetree/bindings/soc/ti/keystone-navigator-qmss.txt
diff --git
a
On Thursday 24 July 2014 02:52 PM, Suman Anna wrote:
> Hi,
>
> On 07/24/2014 01:12 PM, Jassi Brar wrote:
>> On 24 July 2014 22:52, Santosh Shilimkar wrote:
>>> On Thursday 24 July 2014 01:19 PM, Jassi Brar wrote:
>>>> On 23 July 2014 20:40, Linus Walleij wro
On Thursday 24 July 2014 01:19 PM, Jassi Brar wrote:
> On 23 July 2014 20:40, Linus Walleij wrote:
>> On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
>> wrote:
>>
>>> From: Murali Karicheri
>>>
>>> On Keystone SOCs, ARM host can send interrupts to DSP cores using the
>>> DSP GPIO controller
On Thursday 24 July 2014 11:23 AM, Linus Walleij wrote:
> On Thu, Jul 24, 2014 at 4:21 PM, Santosh Shilimkar
> wrote:
>> On Thursday 24 July 2014 10:12 AM, Linus Walleij wrote:
>>> On Wed, Jul 23, 2014 at 5:25 PM, Santosh Shilimkar
>>> wrote:
>>>
>>&g
On Thursday 24 July 2014 10:12 AM, Linus Walleij wrote:
> On Wed, Jul 23, 2014 at 5:25 PM, Santosh Shilimkar
> wrote:
>
>> I will try to answer this. This IP is indeed a GPIO block
>> but the IO's are used just OUTPUT lines from Linux
>> HOST perspective. The
On Wednesday 23 July 2014 11:10 AM, Linus Walleij wrote:
> On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
> wrote:
>
>> From: Murali Karicheri
>>
>> On Keystone SOCs, ARM host can send interrupts to DSP cores using the
>> DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ sign
On Sunday 20 July 2014 08:07 AM, Viresh Kumar wrote:
> On 19 July 2014 20:54, Santosh Shilimkar wrote:
>> Sorry for jumping late
>
> No, you aren't late. Its just 2 days old thread :)
>
>> but one of the point I was raising as part of your
>> other series was
Viresh,
On Saturday 19 July 2014 10:46 AM, Viresh Kumar wrote:
> On 19 July 2014 03:22, Olof Johansson wrote:
>> What is the current API that is being broken, in your opinion?
>
> So, currently the nodes doesn't have any such property. And drivers
> consider all of them as sharing clocks, for eg
Hi Jason,
On Friday 18 July 2014 08:59 AM, Jason Cooper wrote:
> Grygorii,
>
> On Mon, Jul 14, 2014 at 06:27:57PM +0300, Grygorii Strashko wrote:
>> On Keystone SOCs, DSP cores can send interrupts to ARM
>> host using the IRQ controller IP. It provides 28 IRQ
>> signals to ARM. The IRQ handler ru
On Wednesday 09 July 2014 09:14 AM, Strashko, Grygorii wrote:
> Add DT definitions for Keystone 2 MDIO module and Ethernet PHYs for Keystone
> EVMK2HX evm. And enable MDIO support for Keystone 2 SoCs.
>
> Grygorii Strashko (3):
> ARM: dts: keystone: add mdio devices entries
> ARM: dts: keyston
PHYs from DT only in case if PHY child nodes are explicitly
> + * defined to support backward compatibility with DTs which assume that
> + * Davinci MDIO will always scan the bus for PHYs detection.
> + */
multi line comment is not as per coding style. Please fix that.
Patch as such
em
> See http://www.ti.com/lit/ug/spruhj5/spruhj5.pdf
>
> Hence, reuse Davinci MDIO driver for Keystone 2 and
> enable TI networking for Keystone 2 devices
>
> Signed-off-by: Grygorii Strashko
> ---
Looks good to me.
Reviewed-by: Santosh Shilimkar
> .../devicetree/bin
the DW core driver
> functions and required modification in some to support
> the old DW h/w based Keystone driver.
>
> Please review and let me know if you have any comments.
>
> CC: Santosh Shilimkar
> CC: Russell King
> CC: Grant Likely
> CC: Rob Herring
> CC:
On Tuesday 08 July 2014 11:43 AM, Grygorii Strashko wrote:
> The clocks tree for Keystone 2 NTCP devices should be
> defined as following:
> [refclk] - board dependent
> |- - PLL clock
> |- - fixed factor clock div=3 mul=1
>|- - gated clock
>|- - gated clock
>|- -
On Friday 20 June 2014 03:46 PM, Rob Herring wrote:
> On Fri, Jun 20, 2014 at 2:02 PM, Santosh Shilimkar
> wrote:
>> On Friday 20 June 2014 02:56 PM, Arnd Bergmann wrote:
>>> On Friday 20 June 2014 13:17:43 Santosh Shilimkar wrote:
>>>>>&g
On Friday 20 June 2014 02:56 PM, Arnd Bergmann wrote:
> On Friday 20 June 2014 13:17:43 Santosh Shilimkar wrote:
>>>> + dma-coherent;
>>>> + dma-ranges;
>>>> +
>>>> + dwc3@269000
ne 11, 2014 12:21 AM
>>> To: linux-arm-ker...@lists.infradead.org; linux-ker...@vger.kernel.org;
>>> linux-...@vger.kernel.org; devicetree@vger.kernel.org; linux-
>>> d...@vger.kernel.org
>>> Cc: Murali Karicheri; Santosh Shilimkar; Russell King; Grant Likely; Rob
>>> H
On Friday 20 June 2014 11:50 AM, Rob Herring wrote:
> On Fri, Jun 20, 2014 at 10:04 AM, Santosh Shilimkar
> wrote:
>> On Monday 09 June 2014 09:59 AM, Santosh Shilimkar wrote:
>>> On Sunday 08 June 2014 10:13 PM, Fabio Estevam wrote:
>>>> On Thu, Jun 5, 20
eries posted to the mailing list.
>>>
>>> CC: Santosh Shilimkar
>>> CC: Russell King
>>> CC: Grant Likely
>>> CC: Rob Herring
>>> CC: Mohit Kumar
>>> CC: Jingoo Han
>>> CC: Bjorn Helgaas
>>> CC: Pratyush Anand
&g
On Monday 09 June 2014 09:59 AM, Santosh Shilimkar wrote:
> On Sunday 08 June 2014 10:13 PM, Fabio Estevam wrote:
>> On Thu, Jun 5, 2014 at 12:22 PM, Santosh Shilimkar
>> wrote:
>>> Recently we introduced the generic device tree infrastructure for couple of
>>>
Charles,
On Thursday 19 June 2014 03:33 AM, Charles Garcia-Tobin wrote:
>
>
>> -Original Message-----
>> From: Santosh Shilimkar [mailto:santosh.shilim...@ti.com]
>> Sent: 18 June 2014 20:27
>> To: Lo
On Wednesday 18 June 2014 05:09 PM, Nicolas Pitre wrote:
> On Wed, 18 Jun 2014, Santosh Shilimkar wrote:
>
>> On Wednesday 18 June 2014 04:51 PM, Nicolas Pitre wrote:
>>> On Wed, 18 Jun 2014, Santosh Shilimkar wrote:
>>>
>>>> On Wednesday 18 J
On Wednesday 18 June 2014 04:51 PM, Nicolas Pitre wrote:
> On Wed, 18 Jun 2014, Santosh Shilimkar wrote:
>
>> On Wednesday 18 June 2014 01:36 PM, Lorenzo Pieralisi wrote:
>> [..]
>>> + To correctly specify idle states timing and energy related properties,
>&g
On Wednesday 18 June 2014 01:36 PM, Lorenzo Pieralisi wrote:
> On Fri, Jun 13, 2014 at 06:33:35PM +0100, Nicolas Pitre wrote:
[..]
> Ok, a minor tweak to the diagram above, min-residency should include
> energy costs related to idle entry and exit, but not the exit-latency
> itself, as long as the
-skip properties from DT,
> merged path#8 for checkpatch warning to other relevant
> patches and fixed comments for other patches.
>
I scanned entire series again including your updates on Jason's
comments. All look good to my eyes.
Hopefully after this series now, we can actua
On Friday 13 June 2014 09:10 AM, Jason Cooper wrote:
> On Fri, Jun 13, 2014 at 12:26:10PM +0530, Sricharan R wrote:
>> On Thursday 12 June 2014 07:35 PM, Jason Cooper wrote:
> ...
>>> Do you have other changes outside of irqchip depending on this series?
>>> If so, I can set up a topic branch for y
On Sunday 08 June 2014 10:13 PM, Fabio Estevam wrote:
> On Thu, Jun 5, 2014 at 12:22 PM, Santosh Shilimkar
> wrote:
>> Recently we introduced the generic device tree infrastructure for couple of
>> DMA
>> bus parameter, dma-ranges and dma-coherent. Update the documentati
Gala
Signed-off-by: Grygorii Strashko
Signed-off-by: Santosh Shilimkar
---
Documentation/devicetree/booting-without-of.txt | 60 +++
1 file changed, 60 insertions(+)
diff --git a/Documentation/devicetree/booting-without-of.txt
b/Documentation/devicetree/booting-without-
On Monday 02 June 2014 03:00 PM, Arnd Bergmann wrote:
> On Monday 02 June 2014 11:54:36 Santosh Shilimkar wrote:
>>
>> On Monday 02 June 2014 11:06 AM, Arnd Bergmann wrote:
>>> On Monday 02 June 2014 09:24:50 Santosh Shilimkar wrote:
>>>> On Monday 02 June 2014
Arnd,
On Monday 02 June 2014 11:06 AM, Arnd Bergmann wrote:
> On Monday 02 June 2014 09:24:50 Santosh Shilimkar wrote:
>> On Monday 02 June 2014 02:37 AM, Shawn Guo wrote:
>>> On Thu, Apr 24, 2014 at 11:30:00AM -0400, Santosh Shilimkar wrote:
>>>> Here is an up
On Monday 02 June 2014 02:37 AM, Shawn Guo wrote:
> On Thu, Apr 24, 2014 at 11:30:00AM -0400, Santosh Shilimkar wrote:
>> Here is an updated v3 of the series. Series introduces support for setting up
>> dma parameters based on device tree properties like 'dma-ranges' and
&
On Thursday 29 May 2014 03:24 PM, Arnd Bergmann wrote:
> On Thursday 29 May 2014 10:08:10 Santosh Shilimkar wrote:
>> On Thursday 29 May 2014 10:01 AM, Linus Walleij wrote:
>>> On Wed, May 28, 2014 at 4:04 PM, Santosh Shilimkar
>>> wrote:
>>>> On Wednes
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